Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 1 | /* |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 2 | * Blackfin core clock scaling |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 3 | * |
Michael Hennerich | 8944b5a | 2011-02-28 21:23:36 +0000 | [diff] [blame] | 4 | * Copyright 2008-2011 Analog Devices Inc. |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 5 | * |
Robin Getz | 96f1050 | 2009-09-24 14:11:24 +0000 | [diff] [blame] | 6 | * Licensed under the GPL-2 or later. |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <linux/kernel.h> |
Paul Gortmaker | 6a550b9 | 2011-08-09 16:54:30 -0400 | [diff] [blame] | 10 | #include <linux/module.h> |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 11 | #include <linux/types.h> |
| 12 | #include <linux/init.h> |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 13 | #include <linux/clk.h> |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 14 | #include <linux/cpufreq.h> |
| 15 | #include <linux/fs.h> |
Graf Yang | 7998a87 | 2010-03-08 03:01:35 +0000 | [diff] [blame] | 16 | #include <linux/delay.h> |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 17 | #include <asm/blackfin.h> |
| 18 | #include <asm/time.h> |
Mike Frysinger | 761ec44 | 2009-10-15 17:12:05 +0000 | [diff] [blame] | 19 | #include <asm/dpmc.h> |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 20 | |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 21 | |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 22 | /* this is the table of CCLK frequencies, in Hz */ |
Viresh Kumar | 5070158 | 2013-03-30 16:25:15 +0530 | [diff] [blame] | 23 | /* .driver_data is the entry in the auxiliary dpm_state_table[] */ |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 24 | static struct cpufreq_frequency_table bfin_freq_table[] = { |
| 25 | { |
| 26 | .frequency = CPUFREQ_TABLE_END, |
Viresh Kumar | 5070158 | 2013-03-30 16:25:15 +0530 | [diff] [blame] | 27 | .driver_data = 0, |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 28 | }, |
| 29 | { |
| 30 | .frequency = CPUFREQ_TABLE_END, |
Viresh Kumar | 5070158 | 2013-03-30 16:25:15 +0530 | [diff] [blame] | 31 | .driver_data = 1, |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 32 | }, |
| 33 | { |
| 34 | .frequency = CPUFREQ_TABLE_END, |
Viresh Kumar | 5070158 | 2013-03-30 16:25:15 +0530 | [diff] [blame] | 35 | .driver_data = 2, |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 36 | }, |
| 37 | { |
| 38 | .frequency = CPUFREQ_TABLE_END, |
Viresh Kumar | 5070158 | 2013-03-30 16:25:15 +0530 | [diff] [blame] | 39 | .driver_data = 0, |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 40 | }, |
| 41 | }; |
| 42 | |
| 43 | static struct bfin_dpm_state { |
| 44 | unsigned int csel; /* system clock divider */ |
| 45 | unsigned int tscale; /* change the divider on the core timer interrupt */ |
| 46 | } dpm_state_table[3]; |
| 47 | |
Graf Yang | 6c2b707 | 2010-01-27 11:16:32 +0000 | [diff] [blame] | 48 | #if defined(CONFIG_CYCLES_CLOCKSOURCE) |
Vitja Makarov | 1bfb4b2 | 2008-05-07 11:41:26 +0800 | [diff] [blame] | 49 | /* |
Michael Hennerich | 8944b5a | 2011-02-28 21:23:36 +0000 | [diff] [blame] | 50 | * normalized to maximum frequency offset for CYCLES, |
Graf Yang | 6c2b707 | 2010-01-27 11:16:32 +0000 | [diff] [blame] | 51 | * used in time-ts cycles clock source, but could be used |
| 52 | * somewhere also. |
Vitja Makarov | 1bfb4b2 | 2008-05-07 11:41:26 +0800 | [diff] [blame] | 53 | */ |
| 54 | unsigned long long __bfin_cycles_off; |
| 55 | unsigned int __bfin_cycles_mod; |
Graf Yang | 6c2b707 | 2010-01-27 11:16:32 +0000 | [diff] [blame] | 56 | #endif |
Vitja Makarov | 1bfb4b2 | 2008-05-07 11:41:26 +0800 | [diff] [blame] | 57 | |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 58 | /**************************************************************************/ |
Graf Yang | 6c2b707 | 2010-01-27 11:16:32 +0000 | [diff] [blame] | 59 | static void __init bfin_init_tables(unsigned long cclk, unsigned long sclk) |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 60 | { |
| 61 | |
Graf Yang | 6c2b707 | 2010-01-27 11:16:32 +0000 | [diff] [blame] | 62 | unsigned long csel, min_cclk; |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 63 | int index; |
| 64 | |
Graf Yang | 6c2b707 | 2010-01-27 11:16:32 +0000 | [diff] [blame] | 65 | /* Anomaly 273 seems to still exist on non-BF54x w/dcache turned on */ |
Sonic Zhang | 7f3aee3 | 2009-05-07 10:04:19 +0000 | [diff] [blame] | 66 | #if ANOMALY_05000273 || ANOMALY_05000274 || \ |
Sonic Zhang | 7c7d027 | 2012-07-17 13:40:15 +0800 | [diff] [blame] | 67 | (!(defined(CONFIG_BF54x) || defined(CONFIG_BF60x)) \ |
| 68 | && defined(CONFIG_BFIN_EXTMEM_DCACHEABLE)) |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 69 | min_cclk = sclk * 2; |
| 70 | #else |
| 71 | min_cclk = sclk; |
| 72 | #endif |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 73 | |
| 74 | #ifndef CONFIG_BF60x |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 75 | csel = ((bfin_read_PLL_DIV() & CSEL) >> 4); |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 76 | #else |
| 77 | csel = bfin_read32(CGU0_DIV) & 0x1F; |
| 78 | #endif |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 79 | |
James Cosin | 810f151 | 2012-08-20 11:55:36 +0800 | [diff] [blame] | 80 | for (index = 0; (cclk >> index) >= min_cclk && csel <= 3 && index < 3; index++, csel++) { |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 81 | bfin_freq_table[index].frequency = cclk >> index; |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 82 | #ifndef CONFIG_BF60x |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 83 | dpm_state_table[index].csel = csel << 4; /* Shift now into PLL_DIV bitpos */ |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 84 | #else |
| 85 | dpm_state_table[index].csel = csel; |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 86 | #endif |
James Cosin | 810f151 | 2012-08-20 11:55:36 +0800 | [diff] [blame] | 87 | dpm_state_table[index].tscale = (TIME_SCALE >> index) - 1; |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 88 | |
Michael Hennerich | a10101d | 2008-10-28 14:18:29 +0800 | [diff] [blame] | 89 | pr_debug("cpufreq: freq:%d csel:0x%x tscale:%d\n", |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 90 | bfin_freq_table[index].frequency, |
| 91 | dpm_state_table[index].csel, |
| 92 | dpm_state_table[index].tscale); |
| 93 | } |
Graf Yang | 6c2b707 | 2010-01-27 11:16:32 +0000 | [diff] [blame] | 94 | return; |
| 95 | } |
| 96 | |
| 97 | static void bfin_adjust_core_timer(void *info) |
| 98 | { |
| 99 | unsigned int tscale; |
| 100 | unsigned int index = *(unsigned int *)info; |
| 101 | |
| 102 | /* we have to adjust the core timer, because it is using cclk */ |
| 103 | tscale = dpm_state_table[index].tscale; |
| 104 | bfin_write_TSCALE(tscale); |
| 105 | return; |
| 106 | } |
| 107 | |
| 108 | static unsigned int bfin_getfreq_khz(unsigned int cpu) |
| 109 | { |
| 110 | /* Both CoreA/B have the same core clock */ |
| 111 | return get_cclk() / 1000; |
| 112 | } |
| 113 | |
Bob Liu | 3a3cf0d | 2012-05-17 14:21:22 +0800 | [diff] [blame] | 114 | #ifdef CONFIG_BF60x |
Markus Elfring | d23f8ca | 2015-12-21 22:12:26 +0100 | [diff] [blame^] | 115 | static int cpu_set_cclk(int cpu, unsigned long new) |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 116 | { |
| 117 | struct clk *clk; |
| 118 | int ret; |
| 119 | |
| 120 | clk = clk_get(NULL, "CCLK"); |
| 121 | if (IS_ERR(clk)) |
| 122 | return -ENODEV; |
| 123 | |
| 124 | ret = clk_set_rate(clk, new); |
| 125 | clk_put(clk); |
| 126 | return ret; |
| 127 | } |
Bob Liu | 3a3cf0d | 2012-05-17 14:21:22 +0800 | [diff] [blame] | 128 | #endif |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 129 | |
Viresh Kumar | 9c0ebcf | 2013-10-25 19:45:48 +0530 | [diff] [blame] | 130 | static int bfin_target(struct cpufreq_policy *policy, unsigned int index) |
Graf Yang | 6c2b707 | 2010-01-27 11:16:32 +0000 | [diff] [blame] | 131 | { |
Bob Liu | 3a3cf0d | 2012-05-17 14:21:22 +0800 | [diff] [blame] | 132 | #ifndef CONFIG_BF60x |
| 133 | unsigned int plldiv; |
| 134 | #endif |
Graf Yang | 7998a87 | 2010-03-08 03:01:35 +0000 | [diff] [blame] | 135 | static unsigned long lpj_ref; |
| 136 | static unsigned int lpj_ref_freq; |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 137 | unsigned int old_freq, new_freq; |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 138 | int ret = 0; |
Graf Yang | 7998a87 | 2010-03-08 03:01:35 +0000 | [diff] [blame] | 139 | |
Graf Yang | 6c2b707 | 2010-01-27 11:16:32 +0000 | [diff] [blame] | 140 | #if defined(CONFIG_CYCLES_CLOCKSOURCE) |
| 141 | cycles_t cycles; |
| 142 | #endif |
| 143 | |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 144 | old_freq = bfin_getfreq_khz(0); |
| 145 | new_freq = bfin_freq_table[index].frequency; |
Graf Yang | 6c2b707 | 2010-01-27 11:16:32 +0000 | [diff] [blame] | 146 | |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 147 | #ifndef CONFIG_BF60x |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 148 | plldiv = (bfin_read_PLL_DIV() & SSEL) | dpm_state_table[index].csel; |
| 149 | bfin_write_PLL_DIV(plldiv); |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 150 | #else |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 151 | ret = cpu_set_cclk(policy->cpu, new_freq * 1000); |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 152 | if (ret != 0) { |
| 153 | WARN_ONCE(ret, "cpufreq set freq failed %d\n", ret); |
| 154 | return ret; |
Graf Yang | 6c2b707 | 2010-01-27 11:16:32 +0000 | [diff] [blame] | 155 | } |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 156 | #endif |
| 157 | on_each_cpu(bfin_adjust_core_timer, &index, 1); |
| 158 | #if defined(CONFIG_CYCLES_CLOCKSOURCE) |
| 159 | cycles = get_cycles(); |
| 160 | SSYNC(); |
| 161 | cycles += 10; /* ~10 cycles we lose after get_cycles() */ |
| 162 | __bfin_cycles_off += (cycles << __bfin_cycles_mod) - (cycles << index); |
| 163 | __bfin_cycles_mod = index; |
| 164 | #endif |
| 165 | if (!lpj_ref_freq) { |
| 166 | lpj_ref = loops_per_jiffy; |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 167 | lpj_ref_freq = old_freq; |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 168 | } |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 169 | if (new_freq != old_freq) { |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 170 | loops_per_jiffy = cpufreq_scale(lpj_ref, |
Viresh Kumar | d4019f0 | 2013-08-14 19:38:24 +0530 | [diff] [blame] | 171 | lpj_ref_freq, new_freq); |
Viresh Kumar | b43a7ff | 2013-03-24 11:56:43 +0530 | [diff] [blame] | 172 | } |
| 173 | |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 174 | return ret; |
Graf Yang | 6c2b707 | 2010-01-27 11:16:32 +0000 | [diff] [blame] | 175 | } |
| 176 | |
Steven Miao | 9690031 | 2012-05-16 17:49:52 +0800 | [diff] [blame] | 177 | static int __bfin_cpu_init(struct cpufreq_policy *policy) |
Graf Yang | 6c2b707 | 2010-01-27 11:16:32 +0000 | [diff] [blame] | 178 | { |
| 179 | |
| 180 | unsigned long cclk, sclk; |
| 181 | |
| 182 | cclk = get_cclk() / 1000; |
| 183 | sclk = get_sclk() / 1000; |
| 184 | |
| 185 | if (policy->cpu == CPUFREQ_CPU) |
| 186 | bfin_init_tables(cclk, sclk); |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 187 | |
Michael Hennerich | d887a1c | 2009-09-25 09:03:21 +0000 | [diff] [blame] | 188 | policy->cpuinfo.transition_latency = 50000; /* 50us assumed */ |
| 189 | |
Viresh Kumar | e2889e2 | 2013-09-16 18:56:09 +0530 | [diff] [blame] | 190 | return cpufreq_table_validate_and_show(policy, bfin_freq_table); |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 191 | } |
| 192 | |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 193 | static struct cpufreq_driver bfin_driver = { |
Viresh Kumar | 00ff424 | 2013-10-03 20:27:59 +0530 | [diff] [blame] | 194 | .verify = cpufreq_generic_frequency_table_verify, |
Viresh Kumar | 9c0ebcf | 2013-10-25 19:45:48 +0530 | [diff] [blame] | 195 | .target_index = bfin_target, |
Michael Hennerich | a10101d | 2008-10-28 14:18:29 +0800 | [diff] [blame] | 196 | .get = bfin_getfreq_khz, |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 197 | .init = __bfin_cpu_init, |
| 198 | .name = "bfin cpufreq", |
Viresh Kumar | 00ff424 | 2013-10-03 20:27:59 +0530 | [diff] [blame] | 199 | .attr = cpufreq_generic_attr, |
Michael Hennerich | e6c91b6 | 2008-04-25 04:58:29 +0800 | [diff] [blame] | 200 | }; |
| 201 | |
| 202 | static int __init bfin_cpu_init(void) |
| 203 | { |
| 204 | return cpufreq_register_driver(&bfin_driver); |
| 205 | } |
| 206 | |
| 207 | static void __exit bfin_cpu_exit(void) |
| 208 | { |
| 209 | cpufreq_unregister_driver(&bfin_driver); |
| 210 | } |
| 211 | |
| 212 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); |
| 213 | MODULE_DESCRIPTION("cpufreq driver for Blackfin"); |
| 214 | MODULE_LICENSE("GPL"); |
| 215 | |
| 216 | module_init(bfin_cpu_init); |
| 217 | module_exit(bfin_cpu_exit); |