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David Howells607ca462012-10-13 10:46:48 +01001/*
2 * include/linux/serial.h
3 *
4 * Copyright (C) 1992 by Theodore Ts'o.
5 *
6 * Redistribution of this file is permitted under the terms of the GNU
7 * Public License (GPL)
8 */
9
10#ifndef _UAPI_LINUX_SERIAL_H
11#define _UAPI_LINUX_SERIAL_H
12
13#include <linux/types.h>
14
15#include <linux/tty_flags.h>
16
17
18struct serial_struct {
19 int type;
20 int line;
21 unsigned int port;
22 int irq;
23 int flags;
24 int xmit_fifo_size;
25 int custom_divisor;
26 int baud_base;
27 unsigned short close_delay;
28 char io_type;
29 char reserved_char[1];
30 int hub6;
31 unsigned short closing_wait; /* time to wait before closing */
32 unsigned short closing_wait2; /* no longer used... */
33 unsigned char *iomem_base;
34 unsigned short iomem_reg_shift;
35 unsigned int port_high;
36 unsigned long iomap_base; /* cookie passed into ioremap */
37};
38
39/*
40 * For the close wait times, 0 means wait forever for serial port to
41 * flush its output. 65535 means don't wait at all.
42 */
43#define ASYNC_CLOSING_WAIT_INF 0
44#define ASYNC_CLOSING_WAIT_NONE 65535
45
46/*
47 * These are the supported serial types.
48 */
49#define PORT_UNKNOWN 0
50#define PORT_8250 1
51#define PORT_16450 2
52#define PORT_16550 3
53#define PORT_16550A 4
54#define PORT_CIRRUS 5 /* usurped by cyclades.c */
55#define PORT_16650 6
56#define PORT_16650V2 7
57#define PORT_16750 8
58#define PORT_STARTECH 9 /* usurped by cyclades.c */
59#define PORT_16C950 10 /* Oxford Semiconductor */
60#define PORT_16654 11
61#define PORT_16850 12
62#define PORT_RSA 13 /* RSA-DV II/S card */
63#define PORT_MAX 13
64
65#define SERIAL_IO_PORT 0
66#define SERIAL_IO_HUB6 1
67#define SERIAL_IO_MEM 2
Peter Hurley647f1622015-03-01 10:24:28 -050068#define SERIAL_IO_MEM32 3
69#define SERIAL_IO_AU 4
70#define SERIAL_IO_TSI 5
71#define SERIAL_IO_MEM32BE 6
Masahiro Yamadabd94c402015-10-28 12:46:05 +090072#define SERIAL_IO_MEM16 7
David Howells607ca462012-10-13 10:46:48 +010073
74#define UART_CLEAR_FIFO 0x01
75#define UART_USE_FIFO 0x02
76#define UART_STARTECH 0x04
77#define UART_NATSEMI 0x08
78
79
80/*
81 * Multiport serial configuration structure --- external structure
82 */
83struct serial_multiport_struct {
84 int irq;
85 int port1;
86 unsigned char mask1, match1;
87 int port2;
88 unsigned char mask2, match2;
89 int port3;
90 unsigned char mask3, match3;
91 int port4;
92 unsigned char mask4, match4;
93 int port_monitor;
94 int reserved[32];
95};
96
97/*
98 * Serial input interrupt line counters -- external structure
99 * Four lines can interrupt: CTS, DSR, RI, DCD
100 */
101struct serial_icounter_struct {
102 int cts, dsr, rng, dcd;
103 int rx, tx;
104 int frame, overrun, parity, brk;
105 int buf_overrun;
106 int reserved[9];
107};
108
109/*
110 * Serial interface for controlling RS485 settings on chips with suitable
111 * support. Set with TIOCSRS485 and get with TIOCGRS485 if supported by your
112 * platform. The set function returns the new state, with any unsupported bits
113 * reverted appropriately.
114 */
115
116struct serial_rs485 {
117 __u32 flags; /* RS485 feature flags */
118#define SER_RS485_ENABLED (1 << 0) /* If enabled */
119#define SER_RS485_RTS_ON_SEND (1 << 1) /* Logical level for
120 RTS pin when
121 sending */
122#define SER_RS485_RTS_AFTER_SEND (1 << 2) /* Logical level for
123 RTS pin after sent*/
124#define SER_RS485_RX_DURING_TX (1 << 4)
Jan Kiszkae8759ad2017-05-13 09:29:04 +0200125#define SER_RS485_TERMINATE_BUS (1 << 5) /* Enable bus
126 termination
127 (if supported) */
David Howells607ca462012-10-13 10:46:48 +0100128 __u32 delay_rts_before_send; /* Delay before send (milliseconds) */
129 __u32 delay_rts_after_send; /* Delay after send (milliseconds) */
130 __u32 padding[5]; /* Memory is cheap, new structs
131 are a royal PITA .. */
132};
133
134#endif /* _UAPI_LINUX_SERIAL_H */