blob: 391698bcac5b2f840f5e29b1d6ebb80f6128b1ae [file] [log] [blame]
Rich Felker5a846ab2016-03-17 23:09:37 +00001/*
2 * arch/sh/mm/cache-j2.c
3 *
4 * Copyright (C) 2015-2016 Smart Energy Instruments, Inc.
5 *
6 * Released under the terms of the GNU GPL v2.0.
7 */
8
9#include <linux/init.h>
10#include <linux/mm.h>
11#include <linux/cpumask.h>
12
13#include <asm/cache.h>
14#include <asm/addrspace.h>
15#include <asm/processor.h>
16#include <asm/cacheflush.h>
17#include <asm/io.h>
18
19#define ICACHE_ENABLE 0x1
20#define DCACHE_ENABLE 0x2
21#define CACHE_ENABLE (ICACHE_ENABLE | DCACHE_ENABLE)
22#define ICACHE_FLUSH 0x100
23#define DCACHE_FLUSH 0x200
24#define CACHE_FLUSH (ICACHE_FLUSH | DCACHE_FLUSH)
25
26u32 __iomem *j2_ccr_base;
27
28static void j2_flush_icache(void *args)
29{
30 unsigned cpu;
31 for_each_possible_cpu(cpu)
32 __raw_writel(CACHE_ENABLE | ICACHE_FLUSH, j2_ccr_base + cpu);
33}
34
35static void j2_flush_dcache(void *args)
36{
37 unsigned cpu;
38 for_each_possible_cpu(cpu)
39 __raw_writel(CACHE_ENABLE | DCACHE_FLUSH, j2_ccr_base + cpu);
40}
41
42static void j2_flush_both(void *args)
43{
44 unsigned cpu;
45 for_each_possible_cpu(cpu)
46 __raw_writel(CACHE_ENABLE | CACHE_FLUSH, j2_ccr_base + cpu);
47}
48
49void __init j2_cache_init(void)
50{
51 if (!j2_ccr_base)
52 return;
53
54 local_flush_cache_all = j2_flush_both;
55 local_flush_cache_mm = j2_flush_both;
56 local_flush_cache_dup_mm = j2_flush_both;
57 local_flush_cache_page = j2_flush_both;
58 local_flush_cache_range = j2_flush_both;
59 local_flush_dcache_page = j2_flush_dcache;
60 local_flush_icache_range = j2_flush_icache;
61 local_flush_icache_page = j2_flush_icache;
62 local_flush_cache_sigtramp = j2_flush_icache;
63
64 pr_info("Initial J2 CCR is %.8x\n", __raw_readl(j2_ccr_base));
65}