Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 1 | /* |
| 2 | * This program is free software; you can redistribute it and/or modify |
| 3 | * it under the terms of the GNU General Public License, version 2, as |
| 4 | * published by the Free Software Foundation. |
| 5 | * |
| 6 | * This program is distributed in the hope that it will be useful, |
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 9 | * GNU General Public License for more details. |
| 10 | * |
| 11 | * You should have received a copy of the GNU General Public License |
| 12 | * along with this program; if not, write to the Free Software |
| 13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
| 14 | * |
| 15 | * Copyright IBM Corp. 2007 |
| 16 | * |
| 17 | * Authors: Hollis Blanchard <hollisb@us.ibm.com> |
| 18 | * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> |
| 19 | */ |
| 20 | |
| 21 | #include <linux/errno.h> |
| 22 | #include <linux/err.h> |
| 23 | #include <linux/kvm_host.h> |
| 24 | #include <linux/module.h> |
| 25 | #include <linux/vmalloc.h> |
| 26 | #include <linux/fs.h> |
| 27 | #include <asm/cputable.h> |
| 28 | #include <asm/uaccess.h> |
| 29 | #include <asm/kvm_ppc.h> |
Hollis Blanchard | d9fbd03 | 2008-11-05 09:36:13 -0600 | [diff] [blame] | 30 | #include <asm/cacheflush.h> |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 31 | |
Hollis Blanchard | 75f74f0 | 2008-11-05 09:36:16 -0600 | [diff] [blame] | 32 | #include "booke.h" |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 33 | #include "44x_tlb.h" |
| 34 | |
Hollis Blanchard | d9fbd03 | 2008-11-05 09:36:13 -0600 | [diff] [blame] | 35 | unsigned long kvmppc_booke_handlers; |
| 36 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 37 | #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM |
| 38 | #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU |
| 39 | |
| 40 | struct kvm_stats_debugfs_item debugfs_entries[] = { |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 41 | { "mmio", VCPU_STAT(mmio_exits) }, |
| 42 | { "dcr", VCPU_STAT(dcr_exits) }, |
| 43 | { "sig", VCPU_STAT(signal_exits) }, |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 44 | { "itlb_r", VCPU_STAT(itlb_real_miss_exits) }, |
| 45 | { "itlb_v", VCPU_STAT(itlb_virt_miss_exits) }, |
| 46 | { "dtlb_r", VCPU_STAT(dtlb_real_miss_exits) }, |
| 47 | { "dtlb_v", VCPU_STAT(dtlb_virt_miss_exits) }, |
| 48 | { "sysc", VCPU_STAT(syscall_exits) }, |
| 49 | { "isi", VCPU_STAT(isi_exits) }, |
| 50 | { "dsi", VCPU_STAT(dsi_exits) }, |
| 51 | { "inst_emu", VCPU_STAT(emulated_inst_exits) }, |
| 52 | { "dec", VCPU_STAT(dec_exits) }, |
| 53 | { "ext_intr", VCPU_STAT(ext_intr_exits) }, |
Hollis Blanchard | 45c5eb6 | 2008-04-25 17:55:49 -0500 | [diff] [blame] | 54 | { "halt_wakeup", VCPU_STAT(halt_wakeup) }, |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 55 | { NULL } |
| 56 | }; |
| 57 | |
| 58 | static const u32 interrupt_msr_mask[16] = { |
| 59 | [BOOKE_INTERRUPT_CRITICAL] = MSR_ME, |
| 60 | [BOOKE_INTERRUPT_MACHINE_CHECK] = 0, |
| 61 | [BOOKE_INTERRUPT_DATA_STORAGE] = MSR_CE|MSR_ME|MSR_DE, |
| 62 | [BOOKE_INTERRUPT_INST_STORAGE] = MSR_CE|MSR_ME|MSR_DE, |
| 63 | [BOOKE_INTERRUPT_EXTERNAL] = MSR_CE|MSR_ME|MSR_DE, |
| 64 | [BOOKE_INTERRUPT_ALIGNMENT] = MSR_CE|MSR_ME|MSR_DE, |
| 65 | [BOOKE_INTERRUPT_PROGRAM] = MSR_CE|MSR_ME|MSR_DE, |
| 66 | [BOOKE_INTERRUPT_FP_UNAVAIL] = MSR_CE|MSR_ME|MSR_DE, |
| 67 | [BOOKE_INTERRUPT_SYSCALL] = MSR_CE|MSR_ME|MSR_DE, |
| 68 | [BOOKE_INTERRUPT_AP_UNAVAIL] = MSR_CE|MSR_ME|MSR_DE, |
| 69 | [BOOKE_INTERRUPT_DECREMENTER] = MSR_CE|MSR_ME|MSR_DE, |
| 70 | [BOOKE_INTERRUPT_FIT] = MSR_CE|MSR_ME|MSR_DE, |
| 71 | [BOOKE_INTERRUPT_WATCHDOG] = MSR_ME, |
| 72 | [BOOKE_INTERRUPT_DTLB_MISS] = MSR_CE|MSR_ME|MSR_DE, |
| 73 | [BOOKE_INTERRUPT_ITLB_MISS] = MSR_CE|MSR_ME|MSR_DE, |
| 74 | [BOOKE_INTERRUPT_DEBUG] = MSR_ME, |
| 75 | }; |
| 76 | |
| 77 | const unsigned char exception_priority[] = { |
| 78 | [BOOKE_INTERRUPT_DATA_STORAGE] = 0, |
| 79 | [BOOKE_INTERRUPT_INST_STORAGE] = 1, |
| 80 | [BOOKE_INTERRUPT_ALIGNMENT] = 2, |
| 81 | [BOOKE_INTERRUPT_PROGRAM] = 3, |
| 82 | [BOOKE_INTERRUPT_FP_UNAVAIL] = 4, |
| 83 | [BOOKE_INTERRUPT_SYSCALL] = 5, |
| 84 | [BOOKE_INTERRUPT_AP_UNAVAIL] = 6, |
| 85 | [BOOKE_INTERRUPT_DTLB_MISS] = 7, |
| 86 | [BOOKE_INTERRUPT_ITLB_MISS] = 8, |
| 87 | [BOOKE_INTERRUPT_MACHINE_CHECK] = 9, |
| 88 | [BOOKE_INTERRUPT_DEBUG] = 10, |
| 89 | [BOOKE_INTERRUPT_CRITICAL] = 11, |
| 90 | [BOOKE_INTERRUPT_WATCHDOG] = 12, |
| 91 | [BOOKE_INTERRUPT_EXTERNAL] = 13, |
| 92 | [BOOKE_INTERRUPT_FIT] = 14, |
| 93 | [BOOKE_INTERRUPT_DECREMENTER] = 15, |
| 94 | }; |
| 95 | |
| 96 | const unsigned char priority_exception[] = { |
| 97 | BOOKE_INTERRUPT_DATA_STORAGE, |
| 98 | BOOKE_INTERRUPT_INST_STORAGE, |
| 99 | BOOKE_INTERRUPT_ALIGNMENT, |
| 100 | BOOKE_INTERRUPT_PROGRAM, |
| 101 | BOOKE_INTERRUPT_FP_UNAVAIL, |
| 102 | BOOKE_INTERRUPT_SYSCALL, |
| 103 | BOOKE_INTERRUPT_AP_UNAVAIL, |
| 104 | BOOKE_INTERRUPT_DTLB_MISS, |
| 105 | BOOKE_INTERRUPT_ITLB_MISS, |
| 106 | BOOKE_INTERRUPT_MACHINE_CHECK, |
| 107 | BOOKE_INTERRUPT_DEBUG, |
| 108 | BOOKE_INTERRUPT_CRITICAL, |
| 109 | BOOKE_INTERRUPT_WATCHDOG, |
| 110 | BOOKE_INTERRUPT_EXTERNAL, |
| 111 | BOOKE_INTERRUPT_FIT, |
| 112 | BOOKE_INTERRUPT_DECREMENTER, |
| 113 | }; |
| 114 | |
| 115 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 116 | /* TODO: use vcpu_printf() */ |
| 117 | void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu) |
| 118 | { |
| 119 | int i; |
| 120 | |
Hollis Blanchard | 5cf8ca2 | 2008-11-05 09:36:19 -0600 | [diff] [blame] | 121 | printk("pc: %08lx msr: %08lx\n", vcpu->arch.pc, vcpu->arch.msr); |
| 122 | printk("lr: %08lx ctr: %08lx\n", vcpu->arch.lr, vcpu->arch.ctr); |
| 123 | printk("srr0: %08lx srr1: %08lx\n", vcpu->arch.srr0, vcpu->arch.srr1); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 124 | |
| 125 | printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions); |
| 126 | |
| 127 | for (i = 0; i < 32; i += 4) { |
Hollis Blanchard | 5cf8ca2 | 2008-11-05 09:36:19 -0600 | [diff] [blame] | 128 | printk("gpr%02d: %08lx %08lx %08lx %08lx\n", i, |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 129 | vcpu->arch.gpr[i], |
| 130 | vcpu->arch.gpr[i+1], |
| 131 | vcpu->arch.gpr[i+2], |
| 132 | vcpu->arch.gpr[i+3]); |
| 133 | } |
| 134 | } |
| 135 | |
Hollis Blanchard | 9dd921c | 2008-11-05 09:36:14 -0600 | [diff] [blame] | 136 | static void kvmppc_booke_queue_exception(struct kvm_vcpu *vcpu, int exception) |
| 137 | { |
| 138 | unsigned int priority = exception_priority[exception]; |
| 139 | set_bit(priority, &vcpu->arch.pending_exceptions); |
| 140 | } |
| 141 | |
| 142 | static void kvmppc_booke_clear_exception(struct kvm_vcpu *vcpu, int exception) |
| 143 | { |
| 144 | unsigned int priority = exception_priority[exception]; |
| 145 | clear_bit(priority, &vcpu->arch.pending_exceptions); |
| 146 | } |
| 147 | |
| 148 | void kvmppc_core_queue_program(struct kvm_vcpu *vcpu) |
| 149 | { |
| 150 | kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM); |
| 151 | } |
| 152 | |
| 153 | void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu) |
| 154 | { |
| 155 | kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_DECREMENTER); |
| 156 | } |
| 157 | |
| 158 | int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu) |
| 159 | { |
| 160 | unsigned int priority = exception_priority[BOOKE_INTERRUPT_DECREMENTER]; |
| 161 | return test_bit(priority, &vcpu->arch.pending_exceptions); |
| 162 | } |
| 163 | |
| 164 | void kvmppc_core_queue_external(struct kvm_vcpu *vcpu, |
| 165 | struct kvm_interrupt *irq) |
| 166 | { |
| 167 | kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_EXTERNAL); |
| 168 | } |
| 169 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 170 | /* Check if we are ready to deliver the interrupt */ |
| 171 | static int kvmppc_can_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt) |
| 172 | { |
| 173 | int r; |
| 174 | |
| 175 | switch (interrupt) { |
| 176 | case BOOKE_INTERRUPT_CRITICAL: |
| 177 | r = vcpu->arch.msr & MSR_CE; |
| 178 | break; |
| 179 | case BOOKE_INTERRUPT_MACHINE_CHECK: |
| 180 | r = vcpu->arch.msr & MSR_ME; |
| 181 | break; |
| 182 | case BOOKE_INTERRUPT_EXTERNAL: |
| 183 | r = vcpu->arch.msr & MSR_EE; |
| 184 | break; |
| 185 | case BOOKE_INTERRUPT_DECREMENTER: |
| 186 | r = vcpu->arch.msr & MSR_EE; |
| 187 | break; |
| 188 | case BOOKE_INTERRUPT_FIT: |
| 189 | r = vcpu->arch.msr & MSR_EE; |
| 190 | break; |
| 191 | case BOOKE_INTERRUPT_WATCHDOG: |
| 192 | r = vcpu->arch.msr & MSR_CE; |
| 193 | break; |
| 194 | case BOOKE_INTERRUPT_DEBUG: |
| 195 | r = vcpu->arch.msr & MSR_DE; |
| 196 | break; |
| 197 | default: |
| 198 | r = 1; |
| 199 | } |
| 200 | |
| 201 | return r; |
| 202 | } |
| 203 | |
Hollis Blanchard | 9dd921c | 2008-11-05 09:36:14 -0600 | [diff] [blame] | 204 | static void kvmppc_booke_deliver_interrupt(struct kvm_vcpu *vcpu, int interrupt) |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 205 | { |
| 206 | switch (interrupt) { |
| 207 | case BOOKE_INTERRUPT_DECREMENTER: |
| 208 | vcpu->arch.tsr |= TSR_DIS; |
| 209 | break; |
| 210 | } |
| 211 | |
| 212 | vcpu->arch.srr0 = vcpu->arch.pc; |
| 213 | vcpu->arch.srr1 = vcpu->arch.msr; |
| 214 | vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[interrupt]; |
| 215 | kvmppc_set_msr(vcpu, vcpu->arch.msr & interrupt_msr_mask[interrupt]); |
| 216 | } |
| 217 | |
| 218 | /* Check pending exceptions and deliver one, if possible. */ |
Hollis Blanchard | 9dd921c | 2008-11-05 09:36:14 -0600 | [diff] [blame] | 219 | void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu) |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 220 | { |
| 221 | unsigned long *pending = &vcpu->arch.pending_exceptions; |
| 222 | unsigned int exception; |
| 223 | unsigned int priority; |
| 224 | |
Hollis Blanchard | 9ab8084 | 2008-11-05 09:36:22 -0600 | [diff] [blame^] | 225 | priority = __ffs(*pending); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 226 | while (priority <= BOOKE_MAX_INTERRUPT) { |
| 227 | exception = priority_exception[priority]; |
| 228 | if (kvmppc_can_deliver_interrupt(vcpu, exception)) { |
Hollis Blanchard | 9dd921c | 2008-11-05 09:36:14 -0600 | [diff] [blame] | 229 | kvmppc_booke_clear_exception(vcpu, exception); |
| 230 | kvmppc_booke_deliver_interrupt(vcpu, exception); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 231 | break; |
| 232 | } |
| 233 | |
| 234 | priority = find_next_bit(pending, |
| 235 | BITS_PER_BYTE * sizeof(*pending), |
| 236 | priority + 1); |
| 237 | } |
| 238 | } |
| 239 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 240 | /** |
| 241 | * kvmppc_handle_exit |
| 242 | * |
| 243 | * Return value is in the form (errcode<<2 | RESUME_FLAG_HOST | RESUME_FLAG_NV) |
| 244 | */ |
| 245 | int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 246 | unsigned int exit_nr) |
| 247 | { |
| 248 | enum emulation_result er; |
| 249 | int r = RESUME_HOST; |
| 250 | |
| 251 | local_irq_enable(); |
| 252 | |
| 253 | run->exit_reason = KVM_EXIT_UNKNOWN; |
| 254 | run->ready_for_interrupt_injection = 1; |
| 255 | |
| 256 | switch (exit_nr) { |
| 257 | case BOOKE_INTERRUPT_MACHINE_CHECK: |
| 258 | printk("MACHINE CHECK: %lx\n", mfspr(SPRN_MCSR)); |
| 259 | kvmppc_dump_vcpu(vcpu); |
| 260 | r = RESUME_HOST; |
| 261 | break; |
| 262 | |
| 263 | case BOOKE_INTERRUPT_EXTERNAL: |
Hollis Blanchard | 1b6766c | 2008-11-05 09:36:21 -0600 | [diff] [blame] | 264 | vcpu->stat.ext_intr_exits++; |
| 265 | if (need_resched()) |
| 266 | cond_resched(); |
| 267 | r = RESUME_GUEST; |
| 268 | break; |
| 269 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 270 | case BOOKE_INTERRUPT_DECREMENTER: |
| 271 | /* Since we switched IVPR back to the host's value, the host |
| 272 | * handled this interrupt the moment we enabled interrupts. |
| 273 | * Now we just offer it a chance to reschedule the guest. */ |
| 274 | |
| 275 | /* XXX At this point the TLB still holds our shadow TLB, so if |
| 276 | * we do reschedule the host will fault over it. Perhaps we |
| 277 | * should politely restore the host's entries to minimize |
| 278 | * misses before ceding control. */ |
Hollis Blanchard | 1b6766c | 2008-11-05 09:36:21 -0600 | [diff] [blame] | 279 | vcpu->stat.dec_exits++; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 280 | if (need_resched()) |
| 281 | cond_resched(); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 282 | r = RESUME_GUEST; |
| 283 | break; |
| 284 | |
| 285 | case BOOKE_INTERRUPT_PROGRAM: |
| 286 | if (vcpu->arch.msr & MSR_PR) { |
| 287 | /* Program traps generated by user-level software must be handled |
| 288 | * by the guest kernel. */ |
| 289 | vcpu->arch.esr = vcpu->arch.fault_esr; |
Hollis Blanchard | 9dd921c | 2008-11-05 09:36:14 -0600 | [diff] [blame] | 290 | kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_PROGRAM); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 291 | r = RESUME_GUEST; |
| 292 | break; |
| 293 | } |
| 294 | |
| 295 | er = kvmppc_emulate_instruction(run, vcpu); |
| 296 | switch (er) { |
| 297 | case EMULATE_DONE: |
| 298 | /* Future optimization: only reload non-volatiles if |
| 299 | * they were actually modified by emulation. */ |
| 300 | vcpu->stat.emulated_inst_exits++; |
| 301 | r = RESUME_GUEST_NV; |
| 302 | break; |
| 303 | case EMULATE_DO_DCR: |
| 304 | run->exit_reason = KVM_EXIT_DCR; |
Hollis Blanchard | 1b6766c | 2008-11-05 09:36:21 -0600 | [diff] [blame] | 305 | vcpu->stat.dcr_exits++; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 306 | r = RESUME_HOST; |
| 307 | break; |
| 308 | case EMULATE_FAIL: |
| 309 | /* XXX Deliver Program interrupt to guest. */ |
Hollis Blanchard | 5cf8ca2 | 2008-11-05 09:36:19 -0600 | [diff] [blame] | 310 | printk(KERN_CRIT "%s: emulation at %lx failed (%08x)\n", |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 311 | __func__, vcpu->arch.pc, vcpu->arch.last_inst); |
| 312 | /* For debugging, encode the failing instruction and |
| 313 | * report it to userspace. */ |
| 314 | run->hw.hardware_exit_reason = ~0ULL << 32; |
| 315 | run->hw.hardware_exit_reason |= vcpu->arch.last_inst; |
| 316 | r = RESUME_HOST; |
| 317 | break; |
| 318 | default: |
| 319 | BUG(); |
| 320 | } |
| 321 | break; |
| 322 | |
Christian Ehrhardt | de368dc | 2008-04-29 18:18:23 +0200 | [diff] [blame] | 323 | case BOOKE_INTERRUPT_FP_UNAVAIL: |
Hollis Blanchard | 9dd921c | 2008-11-05 09:36:14 -0600 | [diff] [blame] | 324 | kvmppc_booke_queue_exception(vcpu, exit_nr); |
Christian Ehrhardt | de368dc | 2008-04-29 18:18:23 +0200 | [diff] [blame] | 325 | r = RESUME_GUEST; |
| 326 | break; |
| 327 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 328 | case BOOKE_INTERRUPT_DATA_STORAGE: |
| 329 | vcpu->arch.dear = vcpu->arch.fault_dear; |
| 330 | vcpu->arch.esr = vcpu->arch.fault_esr; |
Hollis Blanchard | 9dd921c | 2008-11-05 09:36:14 -0600 | [diff] [blame] | 331 | kvmppc_booke_queue_exception(vcpu, exit_nr); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 332 | vcpu->stat.dsi_exits++; |
| 333 | r = RESUME_GUEST; |
| 334 | break; |
| 335 | |
| 336 | case BOOKE_INTERRUPT_INST_STORAGE: |
| 337 | vcpu->arch.esr = vcpu->arch.fault_esr; |
Hollis Blanchard | 9dd921c | 2008-11-05 09:36:14 -0600 | [diff] [blame] | 338 | kvmppc_booke_queue_exception(vcpu, exit_nr); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 339 | vcpu->stat.isi_exits++; |
| 340 | r = RESUME_GUEST; |
| 341 | break; |
| 342 | |
| 343 | case BOOKE_INTERRUPT_SYSCALL: |
Hollis Blanchard | 9dd921c | 2008-11-05 09:36:14 -0600 | [diff] [blame] | 344 | kvmppc_booke_queue_exception(vcpu, exit_nr); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 345 | vcpu->stat.syscall_exits++; |
| 346 | r = RESUME_GUEST; |
| 347 | break; |
| 348 | |
| 349 | case BOOKE_INTERRUPT_DTLB_MISS: { |
Hollis Blanchard | 0f55dc4 | 2008-11-05 09:36:12 -0600 | [diff] [blame] | 350 | struct kvmppc_44x_tlbe *gtlbe; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 351 | unsigned long eaddr = vcpu->arch.fault_dear; |
| 352 | gfn_t gfn; |
| 353 | |
| 354 | /* Check the guest TLB. */ |
| 355 | gtlbe = kvmppc_44x_dtlb_search(vcpu, eaddr); |
| 356 | if (!gtlbe) { |
| 357 | /* The guest didn't have a mapping for it. */ |
Hollis Blanchard | 9dd921c | 2008-11-05 09:36:14 -0600 | [diff] [blame] | 358 | kvmppc_booke_queue_exception(vcpu, exit_nr); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 359 | vcpu->arch.dear = vcpu->arch.fault_dear; |
| 360 | vcpu->arch.esr = vcpu->arch.fault_esr; |
| 361 | vcpu->stat.dtlb_real_miss_exits++; |
| 362 | r = RESUME_GUEST; |
| 363 | break; |
| 364 | } |
| 365 | |
| 366 | vcpu->arch.paddr_accessed = tlb_xlate(gtlbe, eaddr); |
| 367 | gfn = vcpu->arch.paddr_accessed >> PAGE_SHIFT; |
| 368 | |
| 369 | if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { |
| 370 | /* The guest TLB had a mapping, but the shadow TLB |
| 371 | * didn't, and it is RAM. This could be because: |
| 372 | * a) the entry is mapping the host kernel, or |
| 373 | * b) the guest used a large mapping which we're faking |
| 374 | * Either way, we need to satisfy the fault without |
| 375 | * invoking the guest. */ |
| 376 | kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid, |
| 377 | gtlbe->word2); |
| 378 | vcpu->stat.dtlb_virt_miss_exits++; |
| 379 | r = RESUME_GUEST; |
| 380 | } else { |
| 381 | /* Guest has mapped and accessed a page which is not |
| 382 | * actually RAM. */ |
| 383 | r = kvmppc_emulate_mmio(run, vcpu); |
Hollis Blanchard | 1b6766c | 2008-11-05 09:36:21 -0600 | [diff] [blame] | 384 | vcpu->stat.mmio_exits++; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 385 | } |
| 386 | |
| 387 | break; |
| 388 | } |
| 389 | |
| 390 | case BOOKE_INTERRUPT_ITLB_MISS: { |
Hollis Blanchard | 0f55dc4 | 2008-11-05 09:36:12 -0600 | [diff] [blame] | 391 | struct kvmppc_44x_tlbe *gtlbe; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 392 | unsigned long eaddr = vcpu->arch.pc; |
| 393 | gfn_t gfn; |
| 394 | |
| 395 | r = RESUME_GUEST; |
| 396 | |
| 397 | /* Check the guest TLB. */ |
| 398 | gtlbe = kvmppc_44x_itlb_search(vcpu, eaddr); |
| 399 | if (!gtlbe) { |
| 400 | /* The guest didn't have a mapping for it. */ |
Hollis Blanchard | 9dd921c | 2008-11-05 09:36:14 -0600 | [diff] [blame] | 401 | kvmppc_booke_queue_exception(vcpu, exit_nr); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 402 | vcpu->stat.itlb_real_miss_exits++; |
| 403 | break; |
| 404 | } |
| 405 | |
| 406 | vcpu->stat.itlb_virt_miss_exits++; |
| 407 | |
| 408 | gfn = tlb_xlate(gtlbe, eaddr) >> PAGE_SHIFT; |
| 409 | |
| 410 | if (kvm_is_visible_gfn(vcpu->kvm, gfn)) { |
| 411 | /* The guest TLB had a mapping, but the shadow TLB |
| 412 | * didn't. This could be because: |
| 413 | * a) the entry is mapping the host kernel, or |
| 414 | * b) the guest used a large mapping which we're faking |
| 415 | * Either way, we need to satisfy the fault without |
| 416 | * invoking the guest. */ |
| 417 | kvmppc_mmu_map(vcpu, eaddr, gfn, gtlbe->tid, |
| 418 | gtlbe->word2); |
| 419 | } else { |
| 420 | /* Guest mapped and leaped at non-RAM! */ |
Hollis Blanchard | 9dd921c | 2008-11-05 09:36:14 -0600 | [diff] [blame] | 421 | kvmppc_booke_queue_exception(vcpu, BOOKE_INTERRUPT_MACHINE_CHECK); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 422 | } |
| 423 | |
| 424 | break; |
| 425 | } |
| 426 | |
Hollis Blanchard | 6a0ab73 | 2008-07-25 13:54:49 -0500 | [diff] [blame] | 427 | case BOOKE_INTERRUPT_DEBUG: { |
| 428 | u32 dbsr; |
| 429 | |
| 430 | vcpu->arch.pc = mfspr(SPRN_CSRR0); |
| 431 | |
| 432 | /* clear IAC events in DBSR register */ |
| 433 | dbsr = mfspr(SPRN_DBSR); |
| 434 | dbsr &= DBSR_IAC1 | DBSR_IAC2 | DBSR_IAC3 | DBSR_IAC4; |
| 435 | mtspr(SPRN_DBSR, dbsr); |
| 436 | |
| 437 | run->exit_reason = KVM_EXIT_DEBUG; |
| 438 | r = RESUME_HOST; |
| 439 | break; |
| 440 | } |
| 441 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 442 | default: |
| 443 | printk(KERN_EMERG "exit_nr %d\n", exit_nr); |
| 444 | BUG(); |
| 445 | } |
| 446 | |
| 447 | local_irq_disable(); |
| 448 | |
Hollis Blanchard | 9dd921c | 2008-11-05 09:36:14 -0600 | [diff] [blame] | 449 | kvmppc_core_deliver_interrupts(vcpu); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 450 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 451 | if (!(r & RESUME_HOST)) { |
| 452 | /* To avoid clobbering exit_reason, only check for signals if |
| 453 | * we aren't already exiting to userspace for some other |
| 454 | * reason. */ |
| 455 | if (signal_pending(current)) { |
| 456 | run->exit_reason = KVM_EXIT_INTR; |
| 457 | r = (-EINTR << 2) | RESUME_HOST | (r & RESUME_FLAG_NV); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 458 | vcpu->stat.signal_exits++; |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 459 | } |
| 460 | } |
| 461 | |
| 462 | return r; |
| 463 | } |
| 464 | |
| 465 | /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */ |
| 466 | int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) |
| 467 | { |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 468 | vcpu->arch.pc = 0; |
| 469 | vcpu->arch.msr = 0; |
| 470 | vcpu->arch.gpr[1] = (16<<20) - 8; /* -8 for the callee-save LR slot */ |
| 471 | |
Hollis Blanchard | 49dd2c4 | 2008-07-25 13:54:53 -0500 | [diff] [blame] | 472 | vcpu->arch.shadow_pid = 1; |
| 473 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 474 | /* Eye-catching number so we know if the guest takes an interrupt |
| 475 | * before it's programmed its own IVPR. */ |
| 476 | vcpu->arch.ivpr = 0x55550000; |
| 477 | |
Hollis Blanchard | 5cbb510 | 2008-11-05 09:36:17 -0600 | [diff] [blame] | 478 | return kvmppc_core_vcpu_setup(vcpu); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 479 | } |
| 480 | |
| 481 | int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) |
| 482 | { |
| 483 | int i; |
| 484 | |
| 485 | regs->pc = vcpu->arch.pc; |
| 486 | regs->cr = vcpu->arch.cr; |
| 487 | regs->ctr = vcpu->arch.ctr; |
| 488 | regs->lr = vcpu->arch.lr; |
| 489 | regs->xer = vcpu->arch.xer; |
| 490 | regs->msr = vcpu->arch.msr; |
| 491 | regs->srr0 = vcpu->arch.srr0; |
| 492 | regs->srr1 = vcpu->arch.srr1; |
| 493 | regs->pid = vcpu->arch.pid; |
| 494 | regs->sprg0 = vcpu->arch.sprg0; |
| 495 | regs->sprg1 = vcpu->arch.sprg1; |
| 496 | regs->sprg2 = vcpu->arch.sprg2; |
| 497 | regs->sprg3 = vcpu->arch.sprg3; |
| 498 | regs->sprg5 = vcpu->arch.sprg4; |
| 499 | regs->sprg6 = vcpu->arch.sprg5; |
| 500 | regs->sprg7 = vcpu->arch.sprg6; |
| 501 | |
| 502 | for (i = 0; i < ARRAY_SIZE(regs->gpr); i++) |
| 503 | regs->gpr[i] = vcpu->arch.gpr[i]; |
| 504 | |
| 505 | return 0; |
| 506 | } |
| 507 | |
| 508 | int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs) |
| 509 | { |
| 510 | int i; |
| 511 | |
| 512 | vcpu->arch.pc = regs->pc; |
| 513 | vcpu->arch.cr = regs->cr; |
| 514 | vcpu->arch.ctr = regs->ctr; |
| 515 | vcpu->arch.lr = regs->lr; |
| 516 | vcpu->arch.xer = regs->xer; |
Hollis Blanchard | b8fd68a | 2008-11-05 09:36:20 -0600 | [diff] [blame] | 517 | kvmppc_set_msr(vcpu, regs->msr); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 518 | vcpu->arch.srr0 = regs->srr0; |
| 519 | vcpu->arch.srr1 = regs->srr1; |
| 520 | vcpu->arch.sprg0 = regs->sprg0; |
| 521 | vcpu->arch.sprg1 = regs->sprg1; |
| 522 | vcpu->arch.sprg2 = regs->sprg2; |
| 523 | vcpu->arch.sprg3 = regs->sprg3; |
| 524 | vcpu->arch.sprg5 = regs->sprg4; |
| 525 | vcpu->arch.sprg6 = regs->sprg5; |
| 526 | vcpu->arch.sprg7 = regs->sprg6; |
| 527 | |
| 528 | for (i = 0; i < ARRAY_SIZE(vcpu->arch.gpr); i++) |
| 529 | vcpu->arch.gpr[i] = regs->gpr[i]; |
| 530 | |
| 531 | return 0; |
| 532 | } |
| 533 | |
| 534 | int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu, |
| 535 | struct kvm_sregs *sregs) |
| 536 | { |
| 537 | return -ENOTSUPP; |
| 538 | } |
| 539 | |
| 540 | int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu, |
| 541 | struct kvm_sregs *sregs) |
| 542 | { |
| 543 | return -ENOTSUPP; |
| 544 | } |
| 545 | |
| 546 | int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) |
| 547 | { |
| 548 | return -ENOTSUPP; |
| 549 | } |
| 550 | |
| 551 | int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu) |
| 552 | { |
| 553 | return -ENOTSUPP; |
| 554 | } |
| 555 | |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 556 | int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu, |
| 557 | struct kvm_translation *tr) |
| 558 | { |
Hollis Blanchard | 5cbb510 | 2008-11-05 09:36:17 -0600 | [diff] [blame] | 559 | return kvmppc_core_vcpu_translate(vcpu, tr); |
Hollis Blanchard | bbf45ba | 2008-04-16 23:28:09 -0500 | [diff] [blame] | 560 | } |
Hollis Blanchard | d9fbd03 | 2008-11-05 09:36:13 -0600 | [diff] [blame] | 561 | |
Hollis Blanchard | db93f57 | 2008-11-05 09:36:18 -0600 | [diff] [blame] | 562 | int kvmppc_booke_init(void) |
Hollis Blanchard | d9fbd03 | 2008-11-05 09:36:13 -0600 | [diff] [blame] | 563 | { |
| 564 | unsigned long ivor[16]; |
| 565 | unsigned long max_ivor = 0; |
| 566 | int i; |
| 567 | |
| 568 | /* We install our own exception handlers by hijacking IVPR. IVPR must |
| 569 | * be 16-bit aligned, so we need a 64KB allocation. */ |
| 570 | kvmppc_booke_handlers = __get_free_pages(GFP_KERNEL | __GFP_ZERO, |
| 571 | VCPU_SIZE_ORDER); |
| 572 | if (!kvmppc_booke_handlers) |
| 573 | return -ENOMEM; |
| 574 | |
| 575 | /* XXX make sure our handlers are smaller than Linux's */ |
| 576 | |
| 577 | /* Copy our interrupt handlers to match host IVORs. That way we don't |
| 578 | * have to swap the IVORs on every guest/host transition. */ |
| 579 | ivor[0] = mfspr(SPRN_IVOR0); |
| 580 | ivor[1] = mfspr(SPRN_IVOR1); |
| 581 | ivor[2] = mfspr(SPRN_IVOR2); |
| 582 | ivor[3] = mfspr(SPRN_IVOR3); |
| 583 | ivor[4] = mfspr(SPRN_IVOR4); |
| 584 | ivor[5] = mfspr(SPRN_IVOR5); |
| 585 | ivor[6] = mfspr(SPRN_IVOR6); |
| 586 | ivor[7] = mfspr(SPRN_IVOR7); |
| 587 | ivor[8] = mfspr(SPRN_IVOR8); |
| 588 | ivor[9] = mfspr(SPRN_IVOR9); |
| 589 | ivor[10] = mfspr(SPRN_IVOR10); |
| 590 | ivor[11] = mfspr(SPRN_IVOR11); |
| 591 | ivor[12] = mfspr(SPRN_IVOR12); |
| 592 | ivor[13] = mfspr(SPRN_IVOR13); |
| 593 | ivor[14] = mfspr(SPRN_IVOR14); |
| 594 | ivor[15] = mfspr(SPRN_IVOR15); |
| 595 | |
| 596 | for (i = 0; i < 16; i++) { |
| 597 | if (ivor[i] > max_ivor) |
| 598 | max_ivor = ivor[i]; |
| 599 | |
| 600 | memcpy((void *)kvmppc_booke_handlers + ivor[i], |
| 601 | kvmppc_handlers_start + i * kvmppc_handler_len, |
| 602 | kvmppc_handler_len); |
| 603 | } |
| 604 | flush_icache_range(kvmppc_booke_handlers, |
| 605 | kvmppc_booke_handlers + max_ivor + kvmppc_handler_len); |
| 606 | |
Hollis Blanchard | db93f57 | 2008-11-05 09:36:18 -0600 | [diff] [blame] | 607 | return 0; |
Hollis Blanchard | d9fbd03 | 2008-11-05 09:36:13 -0600 | [diff] [blame] | 608 | } |
| 609 | |
Hollis Blanchard | db93f57 | 2008-11-05 09:36:18 -0600 | [diff] [blame] | 610 | void __exit kvmppc_booke_exit(void) |
Hollis Blanchard | d9fbd03 | 2008-11-05 09:36:13 -0600 | [diff] [blame] | 611 | { |
| 612 | free_pages(kvmppc_booke_handlers, VCPU_SIZE_ORDER); |
| 613 | kvm_exit(); |
| 614 | } |