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Steffen Trumtrara39a4932014-04-15 17:06:44 -05001/*
Paul Gortmaker02163192016-06-13 14:03:35 -04002 * Socfpga Reset Controller Driver
3 *
Steffen Trumtrara39a4932014-04-15 17:06:44 -05004 * Copyright 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
5 *
6 * based on
7 * Allwinner SoCs Reset Controller driver
8 *
9 * Copyright 2013 Maxime Ripard
10 *
11 * Maxime Ripard <maxime.ripard@free-electrons.com>
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 */
18
19#include <linux/err.h>
20#include <linux/io.h>
Paul Gortmaker02163192016-06-13 14:03:35 -040021#include <linux/init.h>
Steffen Trumtrara39a4932014-04-15 17:06:44 -050022#include <linux/of.h>
23#include <linux/platform_device.h>
24#include <linux/reset-controller.h>
25#include <linux/spinlock.h>
26#include <linux/types.h>
27
Rojhalat Ibrahimd518d9c2017-02-15 19:10:58 +010028#define BANK_INCREMENT 4
29#define NR_BANKS 8
Steffen Trumtrara39a4932014-04-15 17:06:44 -050030
31struct socfpga_reset_data {
32 spinlock_t lock;
33 void __iomem *membase;
34 struct reset_controller_dev rcdev;
35};
36
37static int socfpga_reset_assert(struct reset_controller_dev *rcdev,
38 unsigned long id)
39{
40 struct socfpga_reset_data *data = container_of(rcdev,
41 struct socfpga_reset_data,
42 rcdev);
Dinh Nguyenf450f282017-09-22 13:42:47 -050043 int reg_width = sizeof(u32);
44 int bank = id / (reg_width * BITS_PER_BYTE);
45 int offset = id % (reg_width * BITS_PER_BYTE);
Steffen Trumtrara39a4932014-04-15 17:06:44 -050046 unsigned long flags;
47 u32 reg;
48
49 spin_lock_irqsave(&data->lock, flags);
50
Rojhalat Ibrahimd518d9c2017-02-15 19:10:58 +010051 reg = readl(data->membase + (bank * BANK_INCREMENT));
52 writel(reg | BIT(offset), data->membase + (bank * BANK_INCREMENT));
Steffen Trumtrara39a4932014-04-15 17:06:44 -050053 spin_unlock_irqrestore(&data->lock, flags);
54
55 return 0;
56}
57
58static int socfpga_reset_deassert(struct reset_controller_dev *rcdev,
59 unsigned long id)
60{
61 struct socfpga_reset_data *data = container_of(rcdev,
62 struct socfpga_reset_data,
63 rcdev);
64
Dinh Nguyenf450f282017-09-22 13:42:47 -050065 int reg_width = sizeof(u32);
66 int bank = id / (reg_width * BITS_PER_BYTE);
67 int offset = id % (reg_width * BITS_PER_BYTE);
Steffen Trumtrara39a4932014-04-15 17:06:44 -050068 unsigned long flags;
69 u32 reg;
70
71 spin_lock_irqsave(&data->lock, flags);
72
Rojhalat Ibrahimd518d9c2017-02-15 19:10:58 +010073 reg = readl(data->membase + (bank * BANK_INCREMENT));
74 writel(reg & ~BIT(offset), data->membase + (bank * BANK_INCREMENT));
Steffen Trumtrara39a4932014-04-15 17:06:44 -050075
76 spin_unlock_irqrestore(&data->lock, flags);
77
78 return 0;
79}
80
Dinh Nguyenf2008902014-11-03 16:33:05 -060081static int socfpga_reset_status(struct reset_controller_dev *rcdev,
82 unsigned long id)
83{
84 struct socfpga_reset_data *data = container_of(rcdev,
85 struct socfpga_reset_data, rcdev);
Dinh Nguyenf450f282017-09-22 13:42:47 -050086 int reg_width = sizeof(u32);
87 int bank = id / (reg_width * BITS_PER_BYTE);
88 int offset = id % (reg_width * BITS_PER_BYTE);
Dinh Nguyenf2008902014-11-03 16:33:05 -060089 u32 reg;
90
Rojhalat Ibrahimd518d9c2017-02-15 19:10:58 +010091 reg = readl(data->membase + (bank * BANK_INCREMENT));
Dinh Nguyenf2008902014-11-03 16:33:05 -060092
93 return !(reg & BIT(offset));
94}
95
Philipp Zabel387eb3f2016-01-17 15:13:41 +010096static const struct reset_control_ops socfpga_reset_ops = {
Steffen Trumtrara39a4932014-04-15 17:06:44 -050097 .assert = socfpga_reset_assert,
98 .deassert = socfpga_reset_deassert,
Dinh Nguyenf2008902014-11-03 16:33:05 -060099 .status = socfpga_reset_status,
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500100};
101
102static int socfpga_reset_probe(struct platform_device *pdev)
103{
104 struct socfpga_reset_data *data;
105 struct resource *res;
Dinh Nguyen27e44642015-07-31 16:03:10 -0500106 struct device *dev = &pdev->dev;
107 struct device_node *np = dev->of_node;
Philipp Zabel6b37d3e2016-07-04 19:47:56 +0200108 u32 modrst_offset;
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500109
110 /*
111 * The binding was mainlined without the required property.
112 * Do not continue, when we encounter an old DT.
113 */
114 if (!of_find_property(pdev->dev.of_node, "#reset-cells", NULL)) {
Rob Herring77991672017-07-18 16:43:26 -0500115 dev_err(&pdev->dev, "%pOF missing #reset-cells property\n",
116 pdev->dev.of_node);
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500117 return -EINVAL;
118 }
119
120 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
121 if (!data)
122 return -ENOMEM;
123
124 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
125 data->membase = devm_ioremap_resource(&pdev->dev, res);
126 if (IS_ERR(data->membase))
127 return PTR_ERR(data->membase);
128
Philipp Zabel6b37d3e2016-07-04 19:47:56 +0200129 if (of_property_read_u32(np, "altr,modrst-offset", &modrst_offset)) {
Dinh Nguyen27e44642015-07-31 16:03:10 -0500130 dev_warn(dev, "missing altr,modrst-offset property, assuming 0x10!\n");
Philipp Zabel6b37d3e2016-07-04 19:47:56 +0200131 modrst_offset = 0x10;
Dinh Nguyen27e44642015-07-31 16:03:10 -0500132 }
Philipp Zabel6b37d3e2016-07-04 19:47:56 +0200133 data->membase += modrst_offset;
Dinh Nguyen27e44642015-07-31 16:03:10 -0500134
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500135 spin_lock_init(&data->lock);
136
137 data->rcdev.owner = THIS_MODULE;
Dinh Nguyenf450f282017-09-22 13:42:47 -0500138 data->rcdev.nr_resets = NR_BANKS * (sizeof(u32) * BITS_PER_BYTE);
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500139 data->rcdev.ops = &socfpga_reset_ops;
140 data->rcdev.of_node = pdev->dev.of_node;
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500141
Masahiro Yamadadc22e082016-05-01 19:37:02 +0900142 return devm_reset_controller_register(dev, &data->rcdev);
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500143}
144
145static const struct of_device_id socfpga_reset_dt_ids[] = {
146 { .compatible = "altr,rst-mgr", },
147 { /* sentinel */ },
148};
149
150static struct platform_driver socfpga_reset_driver = {
151 .probe = socfpga_reset_probe,
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500152 .driver = {
153 .name = "socfpga-reset",
Steffen Trumtrara39a4932014-04-15 17:06:44 -0500154 .of_match_table = socfpga_reset_dt_ids,
155 },
156};
Paul Gortmaker02163192016-06-13 14:03:35 -0400157builtin_platform_driver(socfpga_reset_driver);