blob: 033650cc6c983191aec2ba0b2ac95ddc8495b4a2 [file] [log] [blame]
Yusuke Goda04e917b2008-06-06 17:03:23 +09001/*
2 * Renesas - AP-325RXA
3 * (Compatible with Algo System ., LTD. - AP-320A)
4 *
5 * Copyright (C) 2008 Renesas Solutions Corp.
6 * Author : Yusuke Goda <goda.yuske@renesas.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/device.h>
Magnus Damm4875ea22008-07-28 19:11:07 +090015#include <linux/interrupt.h>
Yusuke Goda04e917b2008-06-06 17:03:23 +090016#include <linux/platform_device.h>
17#include <linux/mtd/physmap.h>
Yoshihiro Shimoda908978a2008-09-09 17:17:42 +090018#include <linux/mtd/sh_flctl.h>
Yusuke Goda04e917b2008-06-06 17:03:23 +090019#include <linux/delay.h>
Magnus Damm026953d2008-07-05 12:32:44 +090020#include <linux/i2c.h>
Magnus Damm4875ea22008-07-28 19:11:07 +090021#include <linux/smc911x.h>
Magnus Damm16587c42008-10-08 20:42:20 +090022#include <linux/gpio.h>
Magnus Damm8b2224d2008-07-28 19:14:35 +090023#include <media/soc_camera_platform.h>
24#include <media/sh_mobile_ceu.h>
Paul Mundt225c9a82008-10-01 16:24:32 +090025#include <video/sh_mobile_lcdc.h>
Yusuke Goda04e917b2008-06-06 17:03:23 +090026#include <asm/io.h>
Magnus Damm69689802008-07-28 19:07:04 +090027#include <asm/clock.h>
Paul Mundtf7275652008-10-20 12:04:53 +090028#include <cpu/sh7723.h>
Yusuke Goda04e917b2008-06-06 17:03:23 +090029
Magnus Damm4875ea22008-07-28 19:11:07 +090030static struct smc911x_platdata smc911x_info = {
31 .flags = SMC911X_USE_32BIT,
32 .irq_flags = IRQF_TRIGGER_LOW,
33};
34
Yusuke Goda04e917b2008-06-06 17:03:23 +090035static struct resource smc9118_resources[] = {
36 [0] = {
37 .start = 0xb6080000,
38 .end = 0xb60fffff,
39 .flags = IORESOURCE_MEM,
40 },
41 [1] = {
42 .start = 35,
43 .end = 35,
44 .flags = IORESOURCE_IRQ,
45 }
46};
47
48static struct platform_device smc9118_device = {
49 .name = "smc911x",
50 .id = -1,
51 .num_resources = ARRAY_SIZE(smc9118_resources),
52 .resource = smc9118_resources,
Magnus Damm4875ea22008-07-28 19:11:07 +090053 .dev = {
54 .platform_data = &smc911x_info,
55 },
Yusuke Goda04e917b2008-06-06 17:03:23 +090056};
57
Nobuhiro Iwamatsuaa88f162008-09-24 11:46:48 +090058/*
59 * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
60 * If this area erased, this board can not boot.
61 */
Yusuke Goda04e917b2008-06-06 17:03:23 +090062static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
63 {
Nobuhiro Iwamatsuaa88f162008-09-24 11:46:48 +090064 .name = "uboot",
65 .offset = 0,
66 .size = (1 * 1024 * 1024),
67 .mask_flags = MTD_WRITEABLE, /* Read-only */
Yusuke Goda04e917b2008-06-06 17:03:23 +090068 }, {
Nobuhiro Iwamatsuaa88f162008-09-24 11:46:48 +090069 .name = "kernel",
70 .offset = MTDPART_OFS_APPEND,
71 .size = (2 * 1024 * 1024),
Yusuke Goda04e917b2008-06-06 17:03:23 +090072 }, {
Nobuhiro Iwamatsuaa88f162008-09-24 11:46:48 +090073 .name = "free-area0",
74 .offset = MTDPART_OFS_APPEND,
75 .size = ((7 * 1024 * 1024) + (512 * 1024)),
76 }, {
77 .name = "CPLD-Data",
78 .offset = MTDPART_OFS_APPEND,
79 .mask_flags = MTD_WRITEABLE, /* Read-only */
80 .size = (1024 * 128 * 2),
81 }, {
82 .name = "free-area1",
83 .offset = MTDPART_OFS_APPEND,
84 .size = MTDPART_SIZ_FULL,
Yusuke Goda04e917b2008-06-06 17:03:23 +090085 },
86};
87
88static struct physmap_flash_data ap325rxa_nor_flash_data = {
89 .width = 2,
90 .parts = ap325rxa_nor_flash_partitions,
91 .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
92};
93
94static struct resource ap325rxa_nor_flash_resources[] = {
95 [0] = {
96 .name = "NOR Flash",
97 .start = 0x00000000,
98 .end = 0x00ffffff,
99 .flags = IORESOURCE_MEM,
100 }
101};
102
103static struct platform_device ap325rxa_nor_flash_device = {
104 .name = "physmap-flash",
105 .resource = ap325rxa_nor_flash_resources,
106 .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
107 .dev = {
108 .platform_data = &ap325rxa_nor_flash_data,
109 },
110};
111
Yoshihiro Shimoda908978a2008-09-09 17:17:42 +0900112static struct mtd_partition nand_partition_info[] = {
113 {
114 .name = "nand_data",
115 .offset = 0,
116 .size = MTDPART_SIZ_FULL,
117 },
118};
119
120static struct resource nand_flash_resources[] = {
121 [0] = {
122 .start = 0xa4530000,
123 .end = 0xa45300ff,
124 .flags = IORESOURCE_MEM,
125 }
126};
127
128static struct sh_flctl_platform_data nand_flash_data = {
129 .parts = nand_partition_info,
130 .nr_parts = ARRAY_SIZE(nand_partition_info),
131 .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
132 .has_hwecc = 1,
133};
134
135static struct platform_device nand_flash_device = {
136 .name = "sh_flctl",
137 .resource = nand_flash_resources,
138 .num_resources = ARRAY_SIZE(nand_flash_resources),
139 .dev = {
140 .platform_data = &nand_flash_data,
141 },
142};
143
Magnus Damm69689802008-07-28 19:07:04 +0900144#define FPGA_LCDREG 0xB4100180
145#define FPGA_BKLREG 0xB4100212
146#define FPGA_LCDREG_VAL 0x0018
Magnus Damm8b2224d2008-07-28 19:14:35 +0900147#define PORT_MSELCRB 0xA4050182
Yoshihiro Shimoda908978a2008-09-09 17:17:42 +0900148#define PORT_PUCR 0xA4050142
149#define PORT_PVCR 0xA4050144
150#define PORT_PXCR 0xA4050148
151#define PORT_HIZCRC 0xA405015C
152#define PORT_DRVCRA 0xA405018A
153#define PORT_DRVCRB 0xA405018C
154#define PORT_PXDR 0xA4050168
155#define PORT_PSELC 0xA4050152
Magnus Damm69689802008-07-28 19:07:04 +0900156
157static void ap320_wvga_power_on(void *board_data)
158{
159 msleep(100);
160
161 /* ASD AP-320/325 LCD ON */
162 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
163
164 /* backlight */
Magnus Damm16587c42008-10-08 20:42:20 +0900165 gpio_set_value(GPIO_PTS3, 0);
Magnus Damm69689802008-07-28 19:07:04 +0900166 ctrl_outw(0x100, FPGA_BKLREG);
167}
168
169static struct sh_mobile_lcdc_info lcdc_info = {
170 .clock_source = LCDC_CLK_EXTERNAL,
171 .ch[0] = {
172 .chan = LCDC_CHAN_MAINLCD,
173 .bpp = 16,
174 .interface_type = RGB18,
175 .clock_divider = 1,
176 .lcd_cfg = {
177 .name = "LB070WV1",
178 .xres = 800,
179 .yres = 480,
180 .left_margin = 40,
181 .right_margin = 160,
182 .hsync_len = 8,
183 .upper_margin = 63,
184 .lower_margin = 80,
185 .vsync_len = 1,
186 .sync = 0, /* hsync and vsync are active low */
187 },
Magnus Dammce9c0082008-08-11 15:26:00 +0900188 .lcd_size_cfg = { /* 7.0 inch */
189 .width = 152,
190 .height = 91,
191 },
Magnus Damm69689802008-07-28 19:07:04 +0900192 .board_cfg = {
193 .display_on = ap320_wvga_power_on,
194 },
195 }
196};
197
198static struct resource lcdc_resources[] = {
199 [0] = {
200 .name = "LCDC",
201 .start = 0xfe940000, /* P4-only space */
202 .end = 0xfe941fff,
203 .flags = IORESOURCE_MEM,
204 },
205};
206
207static struct platform_device lcdc_device = {
208 .name = "sh_mobile_lcdc_fb",
209 .num_resources = ARRAY_SIZE(lcdc_resources),
210 .resource = lcdc_resources,
211 .dev = {
212 .platform_data = &lcdc_info,
213 },
214};
215
Magnus Damme565b512008-07-29 20:57:38 +0900216#ifdef CONFIG_I2C
Magnus Damm8b2224d2008-07-28 19:14:35 +0900217static unsigned char camera_ncm03j_magic[] =
218{
219 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
220 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
221 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
222 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
223 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
224 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
225 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
226 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
227 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
228 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
229 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
230 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
231 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
232 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
233 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
234 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
235};
236
237static int camera_set_capture(struct soc_camera_platform_info *info,
238 int enable)
239{
240 struct i2c_adapter *a = i2c_get_adapter(0);
241 struct i2c_msg msg;
242 int ret = 0;
243 int i;
244
245 if (!enable)
246 return 0; /* no disable for now */
247
248 for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
249 u_int8_t buf[8];
250
251 msg.addr = 0x6e;
252 msg.buf = buf;
253 msg.len = 2;
254 msg.flags = 0;
255
256 buf[0] = camera_ncm03j_magic[i];
257 buf[1] = camera_ncm03j_magic[i + 1];
258
259 ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
260 }
261
262 return ret;
263}
264
265static struct soc_camera_platform_info camera_info = {
266 .iface = 0,
267 .format_name = "UYVY",
268 .format_depth = 16,
269 .format = {
270 .pixelformat = V4L2_PIX_FMT_UYVY,
271 .colorspace = V4L2_COLORSPACE_SMPTE170M,
272 .width = 640,
273 .height = 480,
274 },
275 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
276 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
277 .set_capture = camera_set_capture,
278};
279
280static struct platform_device camera_device = {
281 .name = "soc_camera_platform",
282 .dev = {
283 .platform_data = &camera_info,
284 },
285};
Magnus Damme565b512008-07-29 20:57:38 +0900286#endif /* CONFIG_I2C */
Magnus Damm8b2224d2008-07-28 19:14:35 +0900287
288static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
289 .flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
290 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
291};
292
293static struct resource ceu_resources[] = {
294 [0] = {
295 .name = "CEU",
296 .start = 0xfe910000,
297 .end = 0xfe91009f,
298 .flags = IORESOURCE_MEM,
299 },
300 [1] = {
301 .start = 52,
302 .flags = IORESOURCE_IRQ,
303 },
304 [2] = {
305 /* place holder for contiguous memory */
306 },
307};
308
309static struct platform_device ceu_device = {
310 .name = "sh_mobile_ceu",
311 .num_resources = ARRAY_SIZE(ceu_resources),
312 .resource = ceu_resources,
313 .dev = {
314 .platform_data = &sh_mobile_ceu_info,
315 },
316};
317
Yusuke Goda04e917b2008-06-06 17:03:23 +0900318static struct platform_device *ap325rxa_devices[] __initdata = {
319 &smc9118_device,
Magnus Damm69689802008-07-28 19:07:04 +0900320 &ap325rxa_nor_flash_device,
321 &lcdc_device,
Magnus Damm8b2224d2008-07-28 19:14:35 +0900322 &ceu_device,
Magnus Damme565b512008-07-29 20:57:38 +0900323#ifdef CONFIG_I2C
Magnus Damm8b2224d2008-07-28 19:14:35 +0900324 &camera_device,
Magnus Damme565b512008-07-29 20:57:38 +0900325#endif
Yoshihiro Shimoda908978a2008-09-09 17:17:42 +0900326 &nand_flash_device,
Yusuke Goda04e917b2008-06-06 17:03:23 +0900327};
328
Magnus Damm026953d2008-07-05 12:32:44 +0900329static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
Nobuhiro Iwamatsua3e02702008-10-17 16:53:57 +0900330 {
331 I2C_BOARD_INFO("pcf8563", 0x51),
332 },
Magnus Damm026953d2008-07-05 12:32:44 +0900333};
334
Yusuke Goda04e917b2008-06-06 17:03:23 +0900335static int __init ap325rxa_devices_setup(void)
336{
Magnus Damm16587c42008-10-08 20:42:20 +0900337 /* LD3 and LD4 LEDs */
338 gpio_request(GPIO_PTX5, NULL); /* RUN */
339 gpio_direction_output(GPIO_PTX5, 1);
340 gpio_export(GPIO_PTX5, 0);
341
342 gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
343 gpio_direction_output(GPIO_PTX4, 0);
344 gpio_export(GPIO_PTX4, 0);
345
346 /* SW1 input */
347 gpio_request(GPIO_PTF7, NULL); /* MODE */
348 gpio_direction_input(GPIO_PTF7);
349 gpio_export(GPIO_PTF7, 0);
350
351 /* LCDC */
352 clk_always_enable("mstp200");
353 gpio_request(GPIO_FN_LCDD15, NULL);
354 gpio_request(GPIO_FN_LCDD14, NULL);
355 gpio_request(GPIO_FN_LCDD13, NULL);
356 gpio_request(GPIO_FN_LCDD12, NULL);
357 gpio_request(GPIO_FN_LCDD11, NULL);
358 gpio_request(GPIO_FN_LCDD10, NULL);
359 gpio_request(GPIO_FN_LCDD9, NULL);
360 gpio_request(GPIO_FN_LCDD8, NULL);
361 gpio_request(GPIO_FN_LCDD7, NULL);
362 gpio_request(GPIO_FN_LCDD6, NULL);
363 gpio_request(GPIO_FN_LCDD5, NULL);
364 gpio_request(GPIO_FN_LCDD4, NULL);
365 gpio_request(GPIO_FN_LCDD3, NULL);
366 gpio_request(GPIO_FN_LCDD2, NULL);
367 gpio_request(GPIO_FN_LCDD1, NULL);
368 gpio_request(GPIO_FN_LCDD0, NULL);
369 gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
370 gpio_request(GPIO_FN_LCDDCK, NULL);
371 gpio_request(GPIO_FN_LCDVEPWC, NULL);
372 gpio_request(GPIO_FN_LCDVCPWC, NULL);
373 gpio_request(GPIO_FN_LCDVSYN, NULL);
374 gpio_request(GPIO_FN_LCDHSYN, NULL);
375 gpio_request(GPIO_FN_LCDDISP, NULL);
376 gpio_request(GPIO_FN_LCDDON, NULL);
377
378 /* LCD backlight */
379 gpio_request(GPIO_PTS3, NULL);
380 gpio_direction_output(GPIO_PTS3, 1);
381
382 /* CEU */
383 clk_always_enable("mstp203");
384 gpio_request(GPIO_FN_VIO_CLK2, NULL);
385 gpio_request(GPIO_FN_VIO_VD2, NULL);
386 gpio_request(GPIO_FN_VIO_HD2, NULL);
387 gpio_request(GPIO_FN_VIO_FLD, NULL);
388 gpio_request(GPIO_FN_VIO_CKO, NULL);
389 gpio_request(GPIO_FN_VIO_D15, NULL);
390 gpio_request(GPIO_FN_VIO_D14, NULL);
391 gpio_request(GPIO_FN_VIO_D13, NULL);
392 gpio_request(GPIO_FN_VIO_D12, NULL);
393 gpio_request(GPIO_FN_VIO_D11, NULL);
394 gpio_request(GPIO_FN_VIO_D10, NULL);
395 gpio_request(GPIO_FN_VIO_D9, NULL);
396 gpio_request(GPIO_FN_VIO_D8, NULL);
397
398 gpio_request(GPIO_PTZ7, NULL);
399 gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
400 gpio_request(GPIO_PTZ6, NULL);
401 gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
402 gpio_request(GPIO_PTZ5, NULL);
403 gpio_direction_output(GPIO_PTZ5, 1); /* RST_CAM */
404 gpio_request(GPIO_PTZ4, NULL);
405 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
406
407 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
Magnus Damm8b2224d2008-07-28 19:14:35 +0900408
Yoshihiro Shimoda908978a2008-09-09 17:17:42 +0900409 /* FLCTL */
Paul Mundtdd0e20e2008-10-21 18:08:10 +0900410 gpio_request(GPIO_FN_FCE, NULL);
411 gpio_request(GPIO_FN_NAF7, NULL);
412 gpio_request(GPIO_FN_NAF6, NULL);
413 gpio_request(GPIO_FN_NAF5, NULL);
414 gpio_request(GPIO_FN_NAF4, NULL);
415 gpio_request(GPIO_FN_NAF3, NULL);
416 gpio_request(GPIO_FN_NAF2, NULL);
417 gpio_request(GPIO_FN_NAF1, NULL);
418 gpio_request(GPIO_FN_NAF0, NULL);
419 gpio_request(GPIO_FN_FCDE, NULL);
420 gpio_request(GPIO_FN_FOE, NULL);
421 gpio_request(GPIO_FN_FSC, NULL);
422 gpio_request(GPIO_FN_FWE, NULL);
423 gpio_request(GPIO_FN_FRB, NULL);
Yoshihiro Shimoda908978a2008-09-09 17:17:42 +0900424
425 ctrl_outw(0, PORT_HIZCRC);
426 ctrl_outw(0xFFFF, PORT_DRVCRA);
427 ctrl_outw(0xFFFF, PORT_DRVCRB);
428
Magnus Damm8b2224d2008-07-28 19:14:35 +0900429 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
Magnus Damm69689802008-07-28 19:07:04 +0900430
Magnus Damm026953d2008-07-05 12:32:44 +0900431 i2c_register_board_info(0, ap325rxa_i2c_devices,
432 ARRAY_SIZE(ap325rxa_i2c_devices));
Yoshihiro Shimoda908978a2008-09-09 17:17:42 +0900433
Yusuke Goda04e917b2008-06-06 17:03:23 +0900434 return platform_add_devices(ap325rxa_devices,
435 ARRAY_SIZE(ap325rxa_devices));
436}
437device_initcall(ap325rxa_devices_setup);
438
Yusuke Goda04e917b2008-06-06 17:03:23 +0900439static struct sh_machine_vector mv_ap325rxa __initmv = {
440 .mv_name = "AP-325RXA",
Yusuke Goda04e917b2008-06-06 17:03:23 +0900441};