blob: 8cac6403475d1fa01453414bb41658c4d665b700 [file] [log] [blame]
Benjamin Gaignard96006a72014-12-11 13:34:42 +01001/*
2 * Copyright (C) STMicroelectronics SA 2014
3 * Authors: Vincent Abriou <vincent.abriou@st.com>
4 * Fabien Dessenne <fabien.dessenne@st.com>
5 * for STMicroelectronics.
6 * License terms: GNU General Public License (GPL), version 2
7 */
8#include <drm/drmP.h>
9
Vincent Abriou29d1dc62015-08-03 14:22:16 +020010#include <drm/drm_atomic_helper.h>
11#include <drm/drm_fb_cma_helper.h>
12#include <drm/drm_gem_cma_helper.h>
13#include <drm/drm_plane_helper.h>
14
15#include "sti_compositor.h"
Benjamin Gaignard96006a72014-12-11 13:34:42 +010016#include "sti_cursor.h"
Vincent Abriou9e1f05b2015-07-31 11:32:34 +020017#include "sti_plane.h"
Benjamin Gaignard96006a72014-12-11 13:34:42 +010018#include "sti_vtg.h"
19
20/* Registers */
21#define CUR_CTL 0x00
22#define CUR_VPO 0x0C
23#define CUR_PML 0x14
24#define CUR_PMP 0x18
25#define CUR_SIZE 0x1C
26#define CUR_CML 0x20
27#define CUR_AWS 0x28
28#define CUR_AWE 0x2C
29
30#define CUR_CTL_CLUT_UPDATE BIT(1)
31
32#define STI_CURS_MIN_SIZE 1
33#define STI_CURS_MAX_SIZE 128
34
35/*
36 * pixmap dma buffer stucture
37 *
38 * @paddr: physical address
39 * @size: buffer size
40 * @base: virtual address
41 */
42struct dma_pixmap {
43 dma_addr_t paddr;
44 size_t size;
45 void *base;
46};
47
48/**
49 * STI Cursor structure
50 *
Vincent Abriou29d1dc62015-08-03 14:22:16 +020051 * @sti_plane: sti_plane structure
52 * @dev: driver device
53 * @regs: cursor registers
54 * @width: cursor width
55 * @height: cursor height
56 * @clut: color look up table
57 * @clut_paddr: color look up table physical address
58 * @pixmap: pixmap dma buffer (clut8-format cursor)
Benjamin Gaignard96006a72014-12-11 13:34:42 +010059 */
60struct sti_cursor {
Vincent Abriou871bcdf2015-07-31 11:32:13 +020061 struct sti_plane plane;
62 struct device *dev;
63 void __iomem *regs;
Benjamin Gaignard96006a72014-12-11 13:34:42 +010064 unsigned int width;
65 unsigned int height;
66 unsigned short *clut;
67 dma_addr_t clut_paddr;
68 struct dma_pixmap pixmap;
69};
70
71static const uint32_t cursor_supported_formats[] = {
72 DRM_FORMAT_ARGB8888,
73};
74
Vincent Abriou871bcdf2015-07-31 11:32:13 +020075#define to_sti_cursor(x) container_of(x, struct sti_cursor, plane)
Benjamin Gaignard96006a72014-12-11 13:34:42 +010076
Vincent Abriou29d1dc62015-08-03 14:22:16 +020077static void sti_cursor_argb8888_to_clut8(struct sti_cursor *cursor, u32 *src)
Benjamin Gaignard96006a72014-12-11 13:34:42 +010078{
Benjamin Gaignard96006a72014-12-11 13:34:42 +010079 u8 *dst = cursor->pixmap.base;
80 unsigned int i, j;
81 u32 a, r, g, b;
82
83 for (i = 0; i < cursor->height; i++) {
84 for (j = 0; j < cursor->width; j++) {
85 /* Pick the 2 higher bits of each component */
86 a = (*src >> 30) & 3;
87 r = (*src >> 22) & 3;
88 g = (*src >> 14) & 3;
89 b = (*src >> 6) & 3;
90 *dst = a << 6 | r << 4 | g << 2 | b;
91 src++;
92 dst++;
93 }
94 }
95}
96
Vincent Abriou29d1dc62015-08-03 14:22:16 +020097static void sti_cursor_init(struct sti_cursor *cursor)
Benjamin Gaignard96006a72014-12-11 13:34:42 +010098{
Vincent Abriou29d1dc62015-08-03 14:22:16 +020099 unsigned short *base = cursor->clut;
100 unsigned int a, r, g, b;
101
102 /* Assign CLUT values, ARGB444 format */
103 for (a = 0; a < 4; a++)
104 for (r = 0; r < 4; r++)
105 for (g = 0; g < 4; g++)
106 for (b = 0; b < 4; b++)
107 *base++ = (a * 5) << 12 |
108 (r * 5) << 8 |
109 (g * 5) << 4 |
110 (b * 5);
111}
112
113static void sti_cursor_atomic_update(struct drm_plane *drm_plane,
114 struct drm_plane_state *oldstate)
115{
116 struct drm_plane_state *state = drm_plane->state;
117 struct sti_plane *plane = to_sti_plane(drm_plane);
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200118 struct sti_cursor *cursor = to_sti_cursor(plane);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200119 struct drm_crtc *crtc = state->crtc;
120 struct sti_mixer *mixer = to_sti_mixer(crtc);
121 struct drm_framebuffer *fb = state->fb;
122 struct drm_display_mode *mode = &crtc->mode;
123 int dst_x = state->crtc_x;
124 int dst_y = state->crtc_y;
125 int dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x);
126 int dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y);
127 /* src_x are in 16.16 format */
128 int src_w = state->src_w >> 16;
129 int src_h = state->src_h >> 16;
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200130 struct drm_gem_cma_object *cma_obj;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100131 u32 y, x;
132 u32 val;
133
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200134 DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
135 crtc->base.id, sti_mixer_to_str(mixer),
136 drm_plane->base.id, sti_plane_to_str(plane));
137 DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100138
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200139 dev_dbg(cursor->dev, "%s %s\n", __func__,
140 sti_plane_to_str(plane));
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100141
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200142 if (src_w < STI_CURS_MIN_SIZE ||
143 src_h < STI_CURS_MIN_SIZE ||
144 src_w > STI_CURS_MAX_SIZE ||
145 src_h > STI_CURS_MAX_SIZE) {
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100146 DRM_ERROR("Invalid cursor size (%dx%d)\n",
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200147 src_w, src_h);
148 return;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100149 }
150
151 /* If the cursor size has changed, re-allocated the pixmap */
152 if (!cursor->pixmap.base ||
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200153 (cursor->width != src_w) ||
154 (cursor->height != src_h)) {
155 cursor->width = src_w;
156 cursor->height = src_h;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100157
158 if (cursor->pixmap.base)
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200159 dma_free_writecombine(cursor->dev,
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100160 cursor->pixmap.size,
161 cursor->pixmap.base,
162 cursor->pixmap.paddr);
163
164 cursor->pixmap.size = cursor->width * cursor->height;
165
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200166 cursor->pixmap.base = dma_alloc_writecombine(cursor->dev,
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100167 cursor->pixmap.size,
168 &cursor->pixmap.paddr,
169 GFP_KERNEL | GFP_DMA);
170 if (!cursor->pixmap.base) {
171 DRM_ERROR("Failed to allocate memory for pixmap\n");
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200172 return;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100173 }
174 }
175
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200176 cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
177 if (!cma_obj) {
178 DRM_ERROR("Can't get CMA GEM object for fb\n");
179 return;
180 }
181
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100182 /* Convert ARGB8888 to CLUT8 */
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200183 sti_cursor_argb8888_to_clut8(cursor, (u32 *)cma_obj->vaddr);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100184
185 /* AWS and AWE depend on the mode */
186 y = sti_vtg_get_line_number(*mode, 0);
187 x = sti_vtg_get_pixel_number(*mode, 0);
188 val = y << 16 | x;
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200189 writel(val, cursor->regs + CUR_AWS);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100190 y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
191 x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
192 val = y << 16 | x;
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200193 writel(val, cursor->regs + CUR_AWE);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100194
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100195 /* Set memory location, size, and position */
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200196 writel(cursor->pixmap.paddr, cursor->regs + CUR_PML);
197 writel(cursor->width, cursor->regs + CUR_PMP);
198 writel(cursor->height << 16 | cursor->width, cursor->regs + CUR_SIZE);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100199
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200200 y = sti_vtg_get_line_number(*mode, dst_y);
benjamin.gaignard@linaro.orgb83a8b52016-01-07 14:51:06 +0100201 x = sti_vtg_get_pixel_number(*mode, dst_x);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200202 writel((y << 16) | x, cursor->regs + CUR_VPO);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100203
Fabien Dessenne0b9d0412016-01-25 17:58:48 +0100204 /* Set and fetch CLUT */
205 writel(cursor->clut_paddr, cursor->regs + CUR_CML);
206 writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL);
207
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200208 plane->status = STI_PLANE_UPDATED;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100209}
210
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200211static void sti_cursor_atomic_disable(struct drm_plane *drm_plane,
212 struct drm_plane_state *oldstate)
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100213{
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200214 struct sti_plane *plane = to_sti_plane(drm_plane);
215 struct sti_mixer *mixer = to_sti_mixer(drm_plane->crtc);
216
217 if (!drm_plane->crtc) {
218 DRM_DEBUG_DRIVER("drm plane:%d not enabled\n",
219 drm_plane->base.id);
220 return;
221 }
222
223 DRM_DEBUG_DRIVER("CRTC:%d (%s) drm plane:%d (%s)\n",
224 drm_plane->crtc->base.id, sti_mixer_to_str(mixer),
225 drm_plane->base.id, sti_plane_to_str(plane));
226
227 plane->status = STI_PLANE_DISABLING;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100228}
229
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200230static const struct drm_plane_helper_funcs sti_cursor_helpers_funcs = {
231 .atomic_update = sti_cursor_atomic_update,
232 .atomic_disable = sti_cursor_atomic_disable,
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100233};
234
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200235struct drm_plane *sti_cursor_create(struct drm_device *drm_dev,
236 struct device *dev, int desc,
237 void __iomem *baseaddr,
238 unsigned int possible_crtcs)
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100239{
240 struct sti_cursor *cursor;
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200241 size_t size;
242 int res;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100243
244 cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL);
245 if (!cursor) {
246 DRM_ERROR("Failed to allocate memory for cursor\n");
247 return NULL;
248 }
249
250 /* Allocate clut buffer */
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200251 size = 0x100 * sizeof(unsigned short);
252 cursor->clut = dma_alloc_writecombine(dev, size, &cursor->clut_paddr,
253 GFP_KERNEL | GFP_DMA);
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100254
255 if (!cursor->clut) {
256 DRM_ERROR("Failed to allocate memory for cursor clut\n");
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200257 goto err_clut;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100258 }
259
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200260 cursor->dev = dev;
261 cursor->regs = baseaddr;
262 cursor->plane.desc = desc;
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200263 cursor->plane.status = STI_PLANE_DISABLED;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100264
Vincent Abriou871bcdf2015-07-31 11:32:13 +0200265 sti_cursor_init(cursor);
266
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200267 res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane,
268 possible_crtcs,
269 &sti_plane_helpers_funcs,
270 cursor_supported_formats,
271 ARRAY_SIZE(cursor_supported_formats),
Ville Syrjäläb0b3b792015-12-09 16:19:55 +0200272 DRM_PLANE_TYPE_CURSOR, NULL);
Vincent Abriou29d1dc62015-08-03 14:22:16 +0200273 if (res) {
274 DRM_ERROR("Failed to initialize universal plane\n");
275 goto err_plane;
276 }
277
278 drm_plane_helper_add(&cursor->plane.drm_plane,
279 &sti_cursor_helpers_funcs);
280
281 sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR);
282
283 return &cursor->plane.drm_plane;
284
285err_plane:
286 dma_free_writecombine(dev, size, cursor->clut, cursor->clut_paddr);
287err_clut:
288 devm_kfree(dev, cursor);
289 return NULL;
Benjamin Gaignard96006a72014-12-11 13:34:42 +0100290}