| Pavel Machek | 923a081 | 2010-06-02 11:11:12 -0700 | [diff] [blame] | 1 | /* linux/arch/arm/mach-msm/board-trout.h |
| 2 | ** Author: Brian Swetland <swetland@google.com> |
| 3 | */ |
| 4 | #ifndef __ARCH_ARM_MACH_MSM_BOARD_TROUT_H |
| 5 | #define __ARCH_ARM_MACH_MSM_BOARD_TROUT_H |
| 6 | |
| 7 | #include <mach/board.h> |
| 8 | |
| 9 | #define MSM_SMI_BASE 0x00000000 |
| 10 | #define MSM_SMI_SIZE 0x00800000 |
| 11 | |
| 12 | #define MSM_EBI_BASE 0x10000000 |
| 13 | #define MSM_EBI_SIZE 0x06e00000 |
| 14 | |
| 15 | #define MSM_PMEM_GPU0_BASE 0x00000000 |
| 16 | #define MSM_PMEM_GPU0_SIZE 0x00700000 |
| 17 | |
| 18 | #define MSM_PMEM_MDP_BASE 0x02000000 |
| 19 | #define MSM_PMEM_MDP_SIZE 0x00800000 |
| 20 | |
| 21 | #define MSM_PMEM_ADSP_BASE 0x02800000 |
| 22 | #define MSM_PMEM_ADSP_SIZE 0x00800000 |
| 23 | |
| 24 | #define MSM_PMEM_CAMERA_BASE 0x03000000 |
| 25 | #define MSM_PMEM_CAMERA_SIZE 0x00800000 |
| 26 | |
| 27 | #define MSM_FB_BASE 0x03800000 |
| 28 | #define MSM_FB_SIZE 0x00100000 |
| 29 | |
| 30 | #define MSM_LINUX_BASE MSM_EBI_BASE |
| 31 | #define MSM_LINUX_SIZE 0x06500000 |
| 32 | |
| 33 | #define MSM_PMEM_GPU1_SIZE 0x800000 |
| 34 | #define MSM_PMEM_GPU1_BASE (MSM_RAM_CONSOLE_BASE - MSM_PMEM_GPU1_SIZE) |
| 35 | |
| 36 | #define MSM_RAM_CONSOLE_BASE (MSM_EBI_BASE + 0x6d00000) |
| 37 | #define MSM_RAM_CONSOLE_SIZE (128 * SZ_1K) |
| 38 | |
| 39 | #if (MSM_FB_BASE + MSM_FB_SIZE) >= (MSM_PMEM_GPU1_BASE) |
| 40 | #error invalid memory map |
| 41 | #endif |
| 42 | |
| 43 | #define DECLARE_MSM_IOMAP |
| 44 | #include <mach/msm_iomap.h> |
| 45 | |
| 46 | #define TROUT_4_BALL_UP_0 1 |
| 47 | #define TROUT_4_BALL_LEFT_0 18 |
| 48 | #define TROUT_4_BALL_DOWN_0 57 |
| 49 | #define TROUT_4_BALL_RIGHT_0 91 |
| 50 | |
| 51 | #define TROUT_5_BALL_UP_0 94 |
| 52 | #define TROUT_5_BALL_LEFT_0 18 |
| 53 | #define TROUT_5_BALL_DOWN_0 90 |
| 54 | #define TROUT_5_BALL_RIGHT_0 19 |
| 55 | |
| 56 | #define TROUT_POWER_KEY 20 |
| 57 | |
| 58 | #define TROUT_4_TP_LS_EN 19 |
| 59 | #define TROUT_5_TP_LS_EN 1 |
| Pavel Machek | 348ee12 | 2009-11-18 19:18:24 +0100 | [diff] [blame] | 60 | |
| 61 | #define TROUT_CPLD_BASE 0xE8100000 |
| 62 | #define TROUT_CPLD_START 0x98000000 |
| 63 | #define TROUT_CPLD_SIZE SZ_4K |
| 64 | |
| Pavel Machek | 923a081 | 2010-06-02 11:11:12 -0700 | [diff] [blame] | 65 | #define TROUT_GPIO_CABLE_IN1 (83) |
| 66 | #define TROUT_GPIO_CABLE_IN2 (49) |
| 67 | |
| 68 | #define TROUT_GPIO_START (128) |
| 69 | |
| 70 | #define TROUT_GPIO_INT_MASK0_REG (0x0c) |
| 71 | #define TROUT_GPIO_INT_STAT0_REG (0x0e) |
| 72 | #define TROUT_GPIO_INT_MASK1_REG (0x14) |
| 73 | #define TROUT_GPIO_INT_STAT1_REG (0x10) |
| 74 | |
| 75 | #define TROUT_GPIO_HAPTIC_PWM (28) |
| 76 | #define TROUT_GPIO_PS_HOLD (25) |
| 77 | |
| 78 | #define TROUT_GPIO_MISC2_BASE (TROUT_GPIO_START + 0x00) |
| 79 | #define TROUT_GPIO_MISC3_BASE (TROUT_GPIO_START + 0x08) |
| 80 | #define TROUT_GPIO_MISC4_BASE (TROUT_GPIO_START + 0x10) |
| 81 | #define TROUT_GPIO_MISC5_BASE (TROUT_GPIO_START + 0x18) |
| 82 | #define TROUT_GPIO_INT2_BASE (TROUT_GPIO_START + 0x20) |
| 83 | #define TROUT_GPIO_MISC1_BASE (TROUT_GPIO_START + 0x28) |
| 84 | #define TROUT_GPIO_VIRTUAL_BASE (TROUT_GPIO_START + 0x30) |
| 85 | #define TROUT_GPIO_INT5_BASE (TROUT_GPIO_START + 0x48) |
| 86 | |
| 87 | #define TROUT_GPIO_CHARGER_EN (TROUT_GPIO_MISC2_BASE + 0) |
| 88 | #define TROUT_GPIO_ISET (TROUT_GPIO_MISC2_BASE + 1) |
| 89 | #define TROUT_GPIO_H2W_DAT_DIR (TROUT_GPIO_MISC2_BASE + 2) |
| 90 | #define TROUT_GPIO_H2W_CLK_DIR (TROUT_GPIO_MISC2_BASE + 3) |
| 91 | #define TROUT_GPIO_H2W_DAT_GPO (TROUT_GPIO_MISC2_BASE + 4) |
| 92 | #define TROUT_GPIO_H2W_CLK_GPO (TROUT_GPIO_MISC2_BASE + 5) |
| 93 | #define TROUT_GPIO_H2W_SEL0 (TROUT_GPIO_MISC2_BASE + 6) |
| 94 | #define TROUT_GPIO_H2W_SEL1 (TROUT_GPIO_MISC2_BASE + 7) |
| 95 | |
| 96 | #define TROUT_GPIO_SPOTLIGHT_EN (TROUT_GPIO_MISC3_BASE + 0) |
| 97 | #define TROUT_GPIO_FLASH_EN (TROUT_GPIO_MISC3_BASE + 1) |
| 98 | #define TROUT_GPIO_I2C_PULL (TROUT_GPIO_MISC3_BASE + 2) |
| 99 | #define TROUT_GPIO_TP_I2C_PULL (TROUT_GPIO_MISC3_BASE + 3) |
| 100 | #define TROUT_GPIO_TP_EN (TROUT_GPIO_MISC3_BASE + 4) |
| 101 | #define TROUT_GPIO_JOG_EN (TROUT_GPIO_MISC3_BASE + 5) |
| 102 | #define TROUT_GPIO_UI_LED_EN (TROUT_GPIO_MISC3_BASE + 6) |
| 103 | #define TROUT_GPIO_QTKEY_LED_EN (TROUT_GPIO_MISC3_BASE + 7) |
| 104 | |
| 105 | #define TROUT_GPIO_VCM_PWDN (TROUT_GPIO_MISC4_BASE + 0) |
| 106 | #define TROUT_GPIO_USB_H2W_SW (TROUT_GPIO_MISC4_BASE + 1) |
| 107 | #define TROUT_GPIO_COMPASS_RST_N (TROUT_GPIO_MISC4_BASE + 2) |
| 108 | #define TROUT_GPIO_HAPTIC_EN_UP (TROUT_GPIO_MISC4_BASE + 3) |
| 109 | #define TROUT_GPIO_HAPTIC_EN_MAIN (TROUT_GPIO_MISC4_BASE + 4) |
| 110 | #define TROUT_GPIO_USB_PHY_RST_N (TROUT_GPIO_MISC4_BASE + 5) |
| 111 | #define TROUT_GPIO_WIFI_PA_RESETX (TROUT_GPIO_MISC4_BASE + 6) |
| 112 | #define TROUT_GPIO_WIFI_EN (TROUT_GPIO_MISC4_BASE + 7) |
| 113 | |
| 114 | #define TROUT_GPIO_BT_32K_EN (TROUT_GPIO_MISC5_BASE + 0) |
| 115 | #define TROUT_GPIO_MAC_32K_EN (TROUT_GPIO_MISC5_BASE + 1) |
| 116 | #define TROUT_GPIO_MDDI_32K_EN (TROUT_GPIO_MISC5_BASE + 2) |
| 117 | #define TROUT_GPIO_COMPASS_32K_EN (TROUT_GPIO_MISC5_BASE + 3) |
| 118 | |
| 119 | #define TROUT_GPIO_NAVI_ACT_N (TROUT_GPIO_INT2_BASE + 0) |
| 120 | #define TROUT_GPIO_COMPASS_IRQ (TROUT_GPIO_INT2_BASE + 1) |
| 121 | #define TROUT_GPIO_SLIDING_DET (TROUT_GPIO_INT2_BASE + 2) |
| 122 | #define TROUT_GPIO_AUD_HSMIC_DET_N (TROUT_GPIO_INT2_BASE + 3) |
| 123 | #define TROUT_GPIO_SD_DOOR_N (TROUT_GPIO_INT2_BASE + 4) |
| 124 | #define TROUT_GPIO_CAM_BTN_STEP1_N (TROUT_GPIO_INT2_BASE + 5) |
| 125 | #define TROUT_GPIO_CAM_BTN_STEP2_N (TROUT_GPIO_INT2_BASE + 6) |
| 126 | #define TROUT_GPIO_TP_ATT_N (TROUT_GPIO_INT2_BASE + 7) |
| 127 | #define TROUT_GPIO_BANK0_FIRST_INT_SOURCE (TROUT_GPIO_NAVI_ACT_N) |
| 128 | #define TROUT_GPIO_BANK0_LAST_INT_SOURCE (TROUT_GPIO_TP_ATT_N) |
| 129 | |
| 130 | #define TROUT_GPIO_H2W_DAT_GPI (TROUT_GPIO_MISC1_BASE + 0) |
| 131 | #define TROUT_GPIO_H2W_CLK_GPI (TROUT_GPIO_MISC1_BASE + 1) |
| 132 | #define TROUT_GPIO_CPLD128_VER_0 (TROUT_GPIO_MISC1_BASE + 4) |
| 133 | #define TROUT_GPIO_CPLD128_VER_1 (TROUT_GPIO_MISC1_BASE + 5) |
| 134 | #define TROUT_GPIO_CPLD128_VER_2 (TROUT_GPIO_MISC1_BASE + 6) |
| 135 | #define TROUT_GPIO_CPLD128_VER_3 (TROUT_GPIO_MISC1_BASE + 7) |
| 136 | |
| 137 | #define TROUT_GPIO_SDMC_CD_N (TROUT_GPIO_VIRTUAL_BASE + 0) |
| 138 | #define TROUT_GPIO_END (TROUT_GPIO_SDMC_CD_N) |
| 139 | #define TROUT_GPIO_BANK1_FIRST_INT_SOURCE (TROUT_GPIO_SDMC_CD_N) |
| 140 | #define TROUT_GPIO_BANK1_LAST_INT_SOURCE (TROUT_GPIO_SDMC_CD_N) |
| 141 | |
| 142 | #define TROUT_GPIO_VIRTUAL_TO_REAL_OFFSET \ |
| 143 | (TROUT_GPIO_INT5_BASE - TROUT_GPIO_VIRTUAL_BASE) |
| 144 | |
| 145 | #define TROUT_INT_START (NR_MSM_IRQS + NR_GPIO_IRQS) |
| 146 | #define TROUT_INT_BANK0_COUNT (8) |
| 147 | #define TROUT_INT_BANK1_START (TROUT_INT_START + TROUT_INT_BANK0_COUNT) |
| 148 | #define TROUT_INT_BANK1_COUNT (1) |
| 149 | #define TROUT_INT_END (TROUT_INT_START + TROUT_INT_BANK0_COUNT + \ |
| 150 | TROUT_INT_BANK1_COUNT - 1) |
| 151 | #define TROUT_GPIO_TO_INT(n) (((n) <= TROUT_GPIO_BANK0_LAST_INT_SOURCE) ? \ |
| 152 | (TROUT_INT_START - TROUT_GPIO_BANK0_FIRST_INT_SOURCE + (n)) : \ |
| 153 | (TROUT_INT_BANK1_START - TROUT_GPIO_BANK1_FIRST_INT_SOURCE + (n))) |
| 154 | |
| 155 | #define TROUT_INT_TO_BANK(n) ((n - TROUT_INT_START) / TROUT_INT_BANK0_COUNT) |
| 156 | #define TROUT_INT_TO_MASK(n) (1U << ((n - TROUT_INT_START) & 7)) |
| 157 | #define TROUT_BANK_TO_MASK_REG(bank) \ |
| 158 | (bank ? TROUT_GPIO_INT_MASK1_REG : TROUT_GPIO_INT_MASK0_REG) |
| 159 | #define TROUT_BANK_TO_STAT_REG(bank) \ |
| 160 | (bank ? TROUT_GPIO_INT_STAT1_REG : TROUT_GPIO_INT_STAT0_REG) |
| 161 | |
| 162 | #endif /* GUARD */ |