blob: 788dd348a650f87c1bd065989215465c612faa17 [file] [log] [blame]
Chunming Zhouc1b69ed2015-07-21 13:45:14 +08001/*
2 * Copyright 2015 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 *
23 */
24#include <linux/kthread.h>
25#include <linux/wait.h>
26#include <linux/sched.h>
27#include <drm/drmP.h>
28#include "amdgpu.h"
29
30static int amdgpu_sched_prepare_job(struct amd_gpu_scheduler *sched,
31 struct amd_context_entity *c_entity,
32 void *job)
33{
34 int r = 0;
35 struct amdgpu_cs_parser *sched_job = (struct amdgpu_cs_parser *)job;
Jammy Zhoudd01d072015-07-30 17:19:52 +080036 if (sched_job->prepare_job) {
Chunming Zhouc1b69ed2015-07-21 13:45:14 +080037 r = sched_job->prepare_job(sched_job);
Jammy Zhoudd01d072015-07-30 17:19:52 +080038 if (r) {
39 DRM_ERROR("Prepare job error\n");
40 schedule_work(&sched_job->job_work);
41 }
Chunming Zhouc1b69ed2015-07-21 13:45:14 +080042 }
43 return r;
44}
45
46static void amdgpu_sched_run_job(struct amd_gpu_scheduler *sched,
47 struct amd_context_entity *c_entity,
48 void *job)
49{
50 int r = 0;
51 struct amdgpu_cs_parser *sched_job = (struct amdgpu_cs_parser *)job;
52
53 mutex_lock(&sched_job->job_lock);
54 r = amdgpu_ib_schedule(sched_job->adev,
55 sched_job->num_ibs,
56 sched_job->ibs,
57 sched_job->filp);
58 if (r)
59 goto err;
Chunming Zhouc1b69ed2015-07-21 13:45:14 +080060 if (sched_job->run_job) {
61 r = sched_job->run_job(sched_job);
62 if (r)
63 goto err;
64 }
Chunming Zhou4b559c92015-07-21 15:53:04 +080065 atomic64_set(&c_entity->last_emitted_v_seq,
Chunming Zhoud1ff9082015-07-30 17:59:43 +080066 sched_job->ibs[sched_job->num_ibs - 1].sequence);
Chunming Zhou4b559c92015-07-21 15:53:04 +080067 wake_up_all(&c_entity->wait_emit);
68
Chunming Zhouc1b69ed2015-07-21 13:45:14 +080069 mutex_unlock(&sched_job->job_lock);
70 return;
71err:
72 DRM_ERROR("Run job error\n");
73 mutex_unlock(&sched_job->job_lock);
74 schedule_work(&sched_job->job_work);
75}
76
77static void amdgpu_sched_process_job(struct amd_gpu_scheduler *sched, void *job)
78{
79 struct amdgpu_cs_parser *sched_job = NULL;
80 struct amdgpu_fence *fence = NULL;
81 struct amdgpu_ring *ring = NULL;
82 struct amdgpu_device *adev = NULL;
Chunming Zhouc1b69ed2015-07-21 13:45:14 +080083
84 if (!job)
85 return;
86 sched_job = (struct amdgpu_cs_parser *)job;
87 fence = sched_job->ibs[sched_job->num_ibs - 1].fence;
88 if (!fence)
89 return;
90 ring = fence->ring;
91 adev = ring->adev;
92
Chunming Zhouc1b69ed2015-07-21 13:45:14 +080093 schedule_work(&sched_job->job_work);
94}
95
96struct amd_sched_backend_ops amdgpu_sched_ops = {
97 .prepare_job = amdgpu_sched_prepare_job,
98 .run_job = amdgpu_sched_run_job,
99 .process_job = amdgpu_sched_process_job
100};
101
Chunming Zhou3c704e92015-07-29 10:33:14 +0800102int amdgpu_sched_ib_submit_kernel_helper(struct amdgpu_device *adev,
103 struct amdgpu_ring *ring,
104 struct amdgpu_ib *ibs,
105 unsigned num_ibs,
106 int (*free_job)(struct amdgpu_cs_parser *),
Chunming Zhou17635522015-08-03 11:43:19 +0800107 void *owner,
108 struct fence **f)
Chunming Zhou3c704e92015-07-29 10:33:14 +0800109{
110 int r = 0;
111 if (amdgpu_enable_scheduler) {
112 uint64_t v_seq;
113 struct amdgpu_cs_parser *sched_job =
114 amdgpu_cs_parser_create(adev,
115 owner,
116 adev->kernel_ctx,
117 ibs, 1);
118 if(!sched_job) {
119 return -ENOMEM;
120 }
121 sched_job->free_job = free_job;
122 v_seq = atomic64_inc_return(&adev->kernel_ctx->rings[ring->idx].c_entity.last_queued_v_seq);
123 ibs[num_ibs - 1].sequence = v_seq;
124 amd_sched_push_job(ring->scheduler,
125 &adev->kernel_ctx->rings[ring->idx].c_entity,
126 sched_job);
127 r = amd_sched_wait_emit(
128 &adev->kernel_ctx->rings[ring->idx].c_entity,
129 v_seq,
130 false,
131 -1);
132 if (r)
133 WARN(true, "emit timeout\n");
134 } else
135 r = amdgpu_ib_schedule(adev, 1, ibs, owner);
Chunming Zhou17635522015-08-03 11:43:19 +0800136 if (r)
137 return r;
138 *f = &ibs[num_ibs - 1].fence->base;
139 return 0;
Chunming Zhou3c704e92015-07-29 10:33:14 +0800140}