blob: ef610c674dfb5bec0385b0d4e019c6ebf2914a92 [file] [log] [blame]
Ron Mercerc4e84bd2008-09-18 11:56:28 -04001#include "qlge.h"
2
Ron Mercerca0413b2009-03-02 08:07:30 +00003static void ql_display_mb_sts(struct ql_adapter *qdev,
4 struct mbox_params *mbcp)
5{
6 int i;
7 static char *err_sts[] = {
8 "Command Complete",
9 "Command Not Supported",
10 "Host Interface Error",
11 "Checksum Error",
12 "Unused Completion Status",
13 "Test Failed",
14 "Command Parameter Error"};
15
16 QPRINTK(qdev, DRV, DEBUG, "%s.\n",
17 err_sts[mbcp->mbox_out[0] & 0x0000000f]);
18 for (i = 0; i < mbcp->out_count; i++)
19 QPRINTK(qdev, DRV, DEBUG, "mbox_out[%d] = 0x%.08x.\n",
20 i, mbcp->mbox_out[i]);
21}
22
Ron Mercera2e809b2009-02-26 10:08:33 +000023int ql_read_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 *data)
Ron Mercerc4e84bd2008-09-18 11:56:28 -040024{
25 int status;
26 /* wait for reg to come ready */
27 status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
28 if (status)
29 goto exit;
30 /* set up for reg read */
31 ql_write32(qdev, PROC_ADDR, reg | PROC_ADDR_R);
32 /* wait for reg to come ready */
33 status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
34 if (status)
35 goto exit;
36 /* get the data */
37 *data = ql_read32(qdev, PROC_DATA);
38exit:
39 return status;
40}
41
Ron Mercera2e809b2009-02-26 10:08:33 +000042int ql_write_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 data)
43{
44 int status = 0;
45 /* wait for reg to come ready */
46 status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
47 if (status)
48 goto exit;
49 /* write the data to the data reg */
50 ql_write32(qdev, PROC_DATA, data);
51 /* trigger the write */
52 ql_write32(qdev, PROC_ADDR, reg);
53 /* wait for reg to come ready */
54 status = ql_wait_reg_rdy(qdev, PROC_ADDR, PROC_ADDR_RDY, PROC_ADDR_ERR);
55 if (status)
56 goto exit;
57exit:
58 return status;
59}
60
61int ql_soft_reset_mpi_risc(struct ql_adapter *qdev)
62{
63 int status;
64 status = ql_write_mpi_reg(qdev, 0x00001010, 1);
65 return status;
66}
67
Hannes Eder2f22d222008-12-26 00:04:53 -080068static int ql_get_mb_sts(struct ql_adapter *qdev, struct mbox_params *mbcp)
Ron Mercerc4e84bd2008-09-18 11:56:28 -040069{
70 int i, status;
71
72 status = ql_sem_spinlock(qdev, SEM_PROC_REG_MASK);
73 if (status)
74 return -EBUSY;
75 for (i = 0; i < mbcp->out_count; i++) {
76 status =
Ron Mercera2e809b2009-02-26 10:08:33 +000077 ql_read_mpi_reg(qdev, qdev->mailbox_out + i,
Ron Mercerc4e84bd2008-09-18 11:56:28 -040078 &mbcp->mbox_out[i]);
79 if (status) {
80 QPRINTK(qdev, DRV, ERR, "Failed mailbox read.\n");
81 break;
82 }
83 }
84 ql_sem_unlock(qdev, SEM_PROC_REG_MASK); /* does flush too */
85 return status;
86}
87
Ron Mercerca0413b2009-03-02 08:07:30 +000088/* Wait for a single mailbox command to complete.
89 * Returns zero on success.
90 */
91static int ql_wait_mbx_cmd_cmplt(struct ql_adapter *qdev)
92{
93 int count = 50; /* TODO: arbitrary for now. */
94 u32 value;
95
96 do {
97 value = ql_read32(qdev, STS);
98 if (value & STS_PI)
99 return 0;
100 udelay(UDELAY_DELAY); /* 10us */
101 } while (--count);
102 return -ETIMEDOUT;
103}
104
105/* Execute a single mailbox command.
106 * Caller must hold PROC_ADDR semaphore.
107 */
108static int ql_exec_mb_cmd(struct ql_adapter *qdev, struct mbox_params *mbcp)
109{
110 int i, status;
111
112 /*
113 * Make sure there's nothing pending.
114 * This shouldn't happen.
115 */
116 if (ql_read32(qdev, CSR) & CSR_HRI)
117 return -EIO;
118
119 status = ql_sem_spinlock(qdev, SEM_PROC_REG_MASK);
120 if (status)
121 return status;
122
123 /*
124 * Fill the outbound mailboxes.
125 */
126 for (i = 0; i < mbcp->in_count; i++) {
127 status = ql_write_mpi_reg(qdev, qdev->mailbox_in + i,
128 mbcp->mbox_in[i]);
129 if (status)
130 goto end;
131 }
132 /*
133 * Wake up the MPI firmware.
134 */
135 ql_write32(qdev, CSR, CSR_CMD_SET_H2R_INT);
136end:
137 ql_sem_unlock(qdev, SEM_PROC_REG_MASK);
138 return status;
139}
140
Ron Mercerbcc2cb32009-03-02 08:07:32 +0000141/* Process an inter-device event completion.
142 * If good, signal the caller's completion.
143 */
144static int ql_idc_cmplt_aen(struct ql_adapter *qdev)
145{
146 int status;
147 struct mbox_params *mbcp = &qdev->idc_mbc;
148 mbcp->out_count = 4;
149 status = ql_get_mb_sts(qdev, mbcp);
150 if (status) {
151 QPRINTK(qdev, DRV, ERR,
152 "Could not read MPI, resetting RISC!\n");
153 ql_queue_fw_error(qdev);
154 } else
155 /* Wake up the sleeping mpi_idc_work thread that is
156 * waiting for this event.
157 */
158 complete(&qdev->ide_completion);
159
160 return status;
161}
Ron Mercerc4e84bd2008-09-18 11:56:28 -0400162static void ql_link_up(struct ql_adapter *qdev, struct mbox_params *mbcp)
163{
164 mbcp->out_count = 2;
165
166 if (ql_get_mb_sts(qdev, mbcp))
167 goto exit;
168
169 qdev->link_status = mbcp->mbox_out[1];
170 QPRINTK(qdev, DRV, ERR, "Link Up.\n");
171 QPRINTK(qdev, DRV, INFO, "Link Status = 0x%.08x.\n", mbcp->mbox_out[1]);
172 if (!netif_carrier_ok(qdev->ndev)) {
173 QPRINTK(qdev, LINK, INFO, "Link is Up.\n");
174 netif_carrier_on(qdev->ndev);
175 netif_wake_queue(qdev->ndev);
176 }
177exit:
178 /* Clear the MPI firmware status. */
179 ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
180}
181
182static void ql_link_down(struct ql_adapter *qdev, struct mbox_params *mbcp)
183{
184 mbcp->out_count = 3;
185
186 if (ql_get_mb_sts(qdev, mbcp)) {
187 QPRINTK(qdev, DRV, ERR, "Firmware did not initialize!\n");
188 goto exit;
189 }
190
191 if (netif_carrier_ok(qdev->ndev)) {
192 QPRINTK(qdev, LINK, INFO, "Link is Down.\n");
193 netif_carrier_off(qdev->ndev);
194 netif_stop_queue(qdev->ndev);
195 }
196 QPRINTK(qdev, DRV, ERR, "Link Down.\n");
197 QPRINTK(qdev, DRV, ERR, "Link Status = 0x%.08x.\n", mbcp->mbox_out[1]);
198exit:
199 /* Clear the MPI firmware status. */
200 ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
201}
202
203static void ql_init_fw_done(struct ql_adapter *qdev, struct mbox_params *mbcp)
204{
205 mbcp->out_count = 2;
206
207 if (ql_get_mb_sts(qdev, mbcp)) {
208 QPRINTK(qdev, DRV, ERR, "Firmware did not initialize!\n");
209 goto exit;
210 }
211 QPRINTK(qdev, DRV, ERR, "Firmware initialized!\n");
212 QPRINTK(qdev, DRV, ERR, "Firmware status = 0x%.08x.\n",
213 mbcp->mbox_out[0]);
214 QPRINTK(qdev, DRV, ERR, "Firmware Revision = 0x%.08x.\n",
215 mbcp->mbox_out[1]);
216exit:
217 /* Clear the MPI firmware status. */
218 ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
219}
220
Ron Mercer125844e2009-02-26 10:08:34 +0000221/* Process an async event and clear it unless it's an
222 * error condition.
223 * This can get called iteratively from the mpi_work thread
224 * when events arrive via an interrupt.
225 * It also gets called when a mailbox command is polling for
226 * it's completion. */
227static int ql_mpi_handler(struct ql_adapter *qdev, struct mbox_params *mbcp)
228{
229 int status;
Ron Mercerca0413b2009-03-02 08:07:30 +0000230 int orig_count = mbcp->out_count;
Ron Mercer125844e2009-02-26 10:08:34 +0000231
232 /* Just get mailbox zero for now. */
233 mbcp->out_count = 1;
234 status = ql_get_mb_sts(qdev, mbcp);
235 if (status) {
236 QPRINTK(qdev, DRV, ERR,
237 "Could not read MPI, resetting ASIC!\n");
238 ql_queue_asic_error(qdev);
239 goto end;
240 }
241
242 switch (mbcp->mbox_out[0]) {
243
Ron Mercerca0413b2009-03-02 08:07:30 +0000244 /* This case is only active when we arrive here
245 * as a result of issuing a mailbox command to
246 * the firmware.
247 */
248 case MB_CMD_STS_INTRMDT:
249 case MB_CMD_STS_GOOD:
250 case MB_CMD_STS_INVLD_CMD:
251 case MB_CMD_STS_XFC_ERR:
252 case MB_CMD_STS_CSUM_ERR:
253 case MB_CMD_STS_ERR:
254 case MB_CMD_STS_PARAM_ERR:
255 /* We can only get mailbox status if we're polling from an
256 * unfinished command. Get the rest of the status data and
257 * return back to the caller.
258 * We only end up here when we're polling for a mailbox
259 * command completion.
260 */
261 mbcp->out_count = orig_count;
262 status = ql_get_mb_sts(qdev, mbcp);
263 return status;
264
Ron Mercerbcc2cb32009-03-02 08:07:32 +0000265 /* Process and inbound IDC event.
266 * This will happen when we're trying to
267 * change tx/rx max frame size, change pause
268 * paramters or loopback mode.
269 */
270 case AEN_IDC_CMPLT:
271 case AEN_IDC_EXT:
272 status = ql_idc_cmplt_aen(qdev);
273 break;
274
Ron Mercer125844e2009-02-26 10:08:34 +0000275 case AEN_LINK_UP:
276 ql_link_up(qdev, mbcp);
277 break;
278
279 case AEN_LINK_DOWN:
280 ql_link_down(qdev, mbcp);
281 break;
282
283 case AEN_FW_INIT_DONE:
284 ql_init_fw_done(qdev, mbcp);
285 break;
286
Ron Mercer125844e2009-02-26 10:08:34 +0000287 case AEN_FW_INIT_FAIL:
288 case AEN_SYS_ERR:
Ron Mercer125844e2009-02-26 10:08:34 +0000289 ql_queue_fw_error(qdev);
290 break;
291
292 default:
293 QPRINTK(qdev, DRV, ERR,
294 "Unsupported AE %.08x.\n", mbcp->mbox_out[0]);
295 /* Clear the MPI firmware status. */
296 }
297end:
298 ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
299 return status;
300}
301
Ron Mercerca0413b2009-03-02 08:07:30 +0000302/* Execute a single mailbox command.
303 * mbcp is a pointer to an array of u32. Each
304 * element in the array contains the value for it's
305 * respective mailbox register.
306 */
307static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp)
308{
309 int status, count;
310
311 mutex_lock(&qdev->mpi_mutex);
312
313 /* Begin polled mode for MPI */
314 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
315
316 /* Load the mailbox registers and wake up MPI RISC. */
317 status = ql_exec_mb_cmd(qdev, mbcp);
318 if (status)
319 goto end;
320
321
322 /* If we're generating a system error, then there's nothing
323 * to wait for.
324 */
325 if (mbcp->mbox_in[0] == MB_CMD_MAKE_SYS_ERR)
326 goto end;
327
328 /* Wait for the command to complete. We loop
329 * here because some AEN might arrive while
330 * we're waiting for the mailbox command to
331 * complete. If more than 5 arrive then we can
332 * assume something is wrong. */
333 count = 5;
334 do {
335 /* Wait for the interrupt to come in. */
336 status = ql_wait_mbx_cmd_cmplt(qdev);
337 if (status)
338 goto end;
339
340 /* Process the event. If it's an AEN, it
341 * will be handled in-line or a worker
342 * will be spawned. If it's our completion
343 * we will catch it below.
344 */
345 status = ql_mpi_handler(qdev, mbcp);
346 if (status)
347 goto end;
348
349 /* It's either the completion for our mailbox
350 * command complete or an AEN. If it's our
351 * completion then get out.
352 */
353 if (((mbcp->mbox_out[0] & 0x0000f000) ==
354 MB_CMD_STS_GOOD) ||
355 ((mbcp->mbox_out[0] & 0x0000f000) ==
356 MB_CMD_STS_INTRMDT))
357 break;
358 } while (--count);
359
360 if (!count) {
361 QPRINTK(qdev, DRV, ERR,
362 "Timed out waiting for mailbox complete.\n");
363 status = -ETIMEDOUT;
364 goto end;
365 }
366
367 /* Now we can clear the interrupt condition
368 * and look at our status.
369 */
370 ql_write32(qdev, CSR, CSR_CMD_CLR_R2PCI_INT);
371
372 if (((mbcp->mbox_out[0] & 0x0000f000) !=
373 MB_CMD_STS_GOOD) &&
374 ((mbcp->mbox_out[0] & 0x0000f000) !=
375 MB_CMD_STS_INTRMDT)) {
376 ql_display_mb_sts(qdev, mbcp);
377 status = -EIO;
378 }
379end:
380 mutex_unlock(&qdev->mpi_mutex);
381 /* End polled mode for MPI */
382 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
383 return status;
384}
385
386/* Get functional state for MPI firmware.
387 * Returns zero on success.
388 */
389int ql_mb_get_fw_state(struct ql_adapter *qdev)
390{
391 struct mbox_params mbc;
392 struct mbox_params *mbcp = &mbc;
393 int status = 0;
394
395 memset(mbcp, 0, sizeof(struct mbox_params));
396
397 mbcp->in_count = 1;
398 mbcp->out_count = 2;
399
400 mbcp->mbox_in[0] = MB_CMD_GET_FW_STATE;
401
402 status = ql_mailbox_command(qdev, mbcp);
403 if (status)
404 return status;
405
406 if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
407 QPRINTK(qdev, DRV, ERR,
408 "Failed Get Firmware State.\n");
409 status = -EIO;
410 }
411
412 /* If bit zero is set in mbx 1 then the firmware is
413 * running, but not initialized. This should never
414 * happen.
415 */
416 if (mbcp->mbox_out[1] & 1) {
417 QPRINTK(qdev, DRV, ERR,
418 "Firmware waiting for initialization.\n");
419 status = -EIO;
420 }
421
422 return status;
423}
424
Ron Mercerbcc2cb32009-03-02 08:07:32 +0000425/* Get link settings and maximum frame size settings
426 * for the current port.
427 * Most likely will block.
428 */
429static int ql_mb_set_port_cfg(struct ql_adapter *qdev)
430{
431 struct mbox_params mbc;
432 struct mbox_params *mbcp = &mbc;
433 int status = 0;
434
435 memset(mbcp, 0, sizeof(struct mbox_params));
436
437 mbcp->in_count = 3;
438 mbcp->out_count = 1;
439
440 mbcp->mbox_in[0] = MB_CMD_SET_PORT_CFG;
441 mbcp->mbox_in[1] = qdev->link_config;
442 mbcp->mbox_in[2] = qdev->max_frame_size;
443
444
445 status = ql_mailbox_command(qdev, mbcp);
446 if (status)
447 return status;
448
449 if (mbcp->mbox_out[0] == MB_CMD_STS_INTRMDT) {
450 QPRINTK(qdev, DRV, ERR,
451 "Port Config sent, wait for IDC.\n");
452 } else if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
453 QPRINTK(qdev, DRV, ERR,
454 "Failed Set Port Configuration.\n");
455 status = -EIO;
456 }
457 return status;
458}
459
460/* Get link settings and maximum frame size settings
461 * for the current port.
462 * Most likely will block.
463 */
464static int ql_mb_get_port_cfg(struct ql_adapter *qdev)
465{
466 struct mbox_params mbc;
467 struct mbox_params *mbcp = &mbc;
468 int status = 0;
469
470 memset(mbcp, 0, sizeof(struct mbox_params));
471
472 mbcp->in_count = 1;
473 mbcp->out_count = 3;
474
475 mbcp->mbox_in[0] = MB_CMD_GET_PORT_CFG;
476
477 status = ql_mailbox_command(qdev, mbcp);
478 if (status)
479 return status;
480
481 if (mbcp->mbox_out[0] != MB_CMD_STS_GOOD) {
482 QPRINTK(qdev, DRV, ERR,
483 "Failed Get Port Configuration.\n");
484 status = -EIO;
485 } else {
486 QPRINTK(qdev, DRV, DEBUG,
487 "Passed Get Port Configuration.\n");
488 qdev->link_config = mbcp->mbox_out[1];
489 qdev->max_frame_size = mbcp->mbox_out[2];
490 }
491 return status;
492}
493
494/* IDC - Inter Device Communication...
495 * Some firmware commands require consent of adjacent FCOE
496 * function. This function waits for the OK, or a
497 * counter-request for a little more time.i
498 * The firmware will complete the request if the other
499 * function doesn't respond.
500 */
501static int ql_idc_wait(struct ql_adapter *qdev)
502{
503 int status = -ETIMEDOUT;
504 long wait_time = 1 * HZ;
505 struct mbox_params *mbcp = &qdev->idc_mbc;
506 do {
507 /* Wait here for the command to complete
508 * via the IDC process.
509 */
510 wait_time =
511 wait_for_completion_timeout(&qdev->ide_completion,
512 wait_time);
513 if (!wait_time) {
514 QPRINTK(qdev, DRV, ERR,
515 "IDC Timeout.\n");
516 break;
517 }
518 /* Now examine the response from the IDC process.
519 * We might have a good completion or a request for
520 * more wait time.
521 */
522 if (mbcp->mbox_out[0] == AEN_IDC_EXT) {
523 QPRINTK(qdev, DRV, ERR,
524 "IDC Time Extension from function.\n");
525 wait_time += (mbcp->mbox_out[1] >> 8) & 0x0000000f;
526 } else if (mbcp->mbox_out[0] == AEN_IDC_CMPLT) {
527 QPRINTK(qdev, DRV, ERR,
528 "IDC Success.\n");
529 status = 0;
530 break;
531 } else {
532 QPRINTK(qdev, DRV, ERR,
533 "IDC: Invalid State 0x%.04x.\n",
534 mbcp->mbox_out[0]);
535 status = -EIO;
536 break;
537 }
538 } while (wait_time);
539
540 return status;
541}
542
543/* API called in work thread context to set new TX/RX
544 * maximum frame size values to match MTU.
545 */
546static int ql_set_port_cfg(struct ql_adapter *qdev)
547{
548 int status;
549 status = ql_mb_set_port_cfg(qdev);
550 if (status)
551 return status;
552 status = ql_idc_wait(qdev);
553 return status;
554}
555
556/* The following routines are worker threads that process
557 * events that may sleep waiting for completion.
558 */
559
560/* This thread gets the maximum TX and RX frame size values
561 * from the firmware and, if necessary, changes them to match
562 * the MTU setting.
563 */
564void ql_mpi_port_cfg_work(struct work_struct *work)
565{
566 struct ql_adapter *qdev =
567 container_of(work, struct ql_adapter, mpi_port_cfg_work.work);
568 struct net_device *ndev = qdev->ndev;
569 int status;
570
571 status = ql_mb_get_port_cfg(qdev);
572 if (status) {
573 QPRINTK(qdev, DRV, ERR,
574 "Bug: Failed to get port config data.\n");
575 goto err;
576 }
577
578 if (ndev->mtu <= 2500)
579 goto end;
580 else if (qdev->link_config & CFG_JUMBO_FRAME_SIZE &&
581 qdev->max_frame_size ==
582 CFG_DEFAULT_MAX_FRAME_SIZE)
583 goto end;
584
585 qdev->link_config |= CFG_JUMBO_FRAME_SIZE;
586 qdev->max_frame_size = CFG_DEFAULT_MAX_FRAME_SIZE;
587 status = ql_set_port_cfg(qdev);
588 if (status) {
589 QPRINTK(qdev, DRV, ERR,
590 "Bug: Failed to set port config data.\n");
591 goto err;
592 }
593end:
594 clear_bit(QL_PORT_CFG, &qdev->flags);
595 return;
596err:
597 ql_queue_fw_error(qdev);
598 goto end;
599}
600
Ron Mercerc4e84bd2008-09-18 11:56:28 -0400601void ql_mpi_work(struct work_struct *work)
602{
603 struct ql_adapter *qdev =
604 container_of(work, struct ql_adapter, mpi_work.work);
605 struct mbox_params mbc;
606 struct mbox_params *mbcp = &mbc;
Ron Mercer125844e2009-02-26 10:08:34 +0000607
608 mutex_lock(&qdev->mpi_mutex);
Ron Mercerc4e84bd2008-09-18 11:56:28 -0400609
610 while (ql_read32(qdev, STS) & STS_PI) {
Ron Mercer125844e2009-02-26 10:08:34 +0000611 memset(mbcp, 0, sizeof(struct mbox_params));
612 mbcp->out_count = 1;
613 ql_mpi_handler(qdev, mbcp);
Ron Mercerc4e84bd2008-09-18 11:56:28 -0400614 }
Ron Mercer125844e2009-02-26 10:08:34 +0000615
616 mutex_unlock(&qdev->mpi_mutex);
Ron Mercerc4e84bd2008-09-18 11:56:28 -0400617 ql_enable_completion_interrupt(qdev, 0);
618}
619
620void ql_mpi_reset_work(struct work_struct *work)
621{
622 struct ql_adapter *qdev =
623 container_of(work, struct ql_adapter, mpi_reset_work.work);
Ron Mercerbcc2cb32009-03-02 08:07:32 +0000624 cancel_delayed_work_sync(&qdev->mpi_work);
625 cancel_delayed_work_sync(&qdev->mpi_port_cfg_work);
Ron Mercera2e809b2009-02-26 10:08:33 +0000626 ql_soft_reset_mpi_risc(qdev);
Ron Mercerc4e84bd2008-09-18 11:56:28 -0400627}