AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | |
| 9 | /* |
| 10 | * AM335x Starter Kit |
| 11 | * http://www.ti.com/tool/tmdssk3358 |
| 12 | */ |
| 13 | |
| 14 | /dts-v1/; |
| 15 | |
Florian Vaussard | eb33ef66 | 2013-06-03 16:12:22 +0200 | [diff] [blame] | 16 | #include "am33xx.dtsi" |
Laurent Pinchart | eb9bdef | 2013-07-18 00:54:24 +0200 | [diff] [blame^] | 17 | #include <dt-bindings/pwm/pwm.h> |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 18 | |
| 19 | / { |
| 20 | model = "TI AM335x EVM-SK"; |
| 21 | compatible = "ti,am335x-evmsk", "ti,am33xx"; |
| 22 | |
| 23 | cpus { |
| 24 | cpu@0 { |
| 25 | cpu0-supply = <&vdd1_reg>; |
| 26 | }; |
| 27 | }; |
| 28 | |
| 29 | memory { |
| 30 | device_type = "memory"; |
| 31 | reg = <0x80000000 0x10000000>; /* 256 MB */ |
| 32 | }; |
| 33 | |
AnilKumar Ch | 2647dd1 | 2012-11-06 19:18:35 +0530 | [diff] [blame] | 34 | am33xx_pinmux: pinmux@44e10800 { |
| 35 | pinctrl-names = "default"; |
Vaibhav Hiremath | 4d92757 | 2013-05-20 18:58:10 +0530 | [diff] [blame] | 36 | pinctrl-0 = <&gpio_keys_s0 &clkout2_pin>; |
AnilKumar Ch | 2647dd1 | 2012-11-06 19:18:35 +0530 | [diff] [blame] | 37 | |
| 38 | user_leds_s0: user_leds_s0 { |
| 39 | pinctrl-single,pins = < |
Florian Vaussard | 6a8a6b6 | 2013-06-03 16:12:25 +0200 | [diff] [blame] | 40 | 0x10 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad4.gpio1_4 */ |
| 41 | 0x14 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad5.gpio1_5 */ |
| 42 | 0x18 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad6.gpio1_6 */ |
| 43 | 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad7.gpio1_7 */ |
AnilKumar Ch | 2647dd1 | 2012-11-06 19:18:35 +0530 | [diff] [blame] | 44 | >; |
| 45 | }; |
AnilKumar Ch | d98258b | 2012-11-06 19:18:37 +0530 | [diff] [blame] | 46 | |
| 47 | gpio_keys_s0: gpio_keys_s0 { |
| 48 | pinctrl-single,pins = < |
Florian Vaussard | 6a8a6b6 | 2013-06-03 16:12:25 +0200 | [diff] [blame] | 49 | 0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_oen_ren.gpio2_3 */ |
| 50 | 0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */ |
| 51 | 0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_wait0.gpio0_30 */ |
| 52 | 0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ben0_cle.gpio2_5 */ |
AnilKumar Ch | d98258b | 2012-11-06 19:18:37 +0530 | [diff] [blame] | 53 | >; |
| 54 | }; |
Vaibhav Hiremath | 3f86644 | 2013-03-26 14:14:01 +0530 | [diff] [blame] | 55 | |
| 56 | i2c0_pins: pinmux_i2c0_pins { |
| 57 | pinctrl-single,pins = < |
Florian Vaussard | 6a8a6b6 | 2013-06-03 16:12:25 +0200 | [diff] [blame] | 58 | 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */ |
| 59 | 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */ |
Vaibhav Hiremath | 3f86644 | 2013-03-26 14:14:01 +0530 | [diff] [blame] | 60 | >; |
| 61 | }; |
Vaibhav Hiremath | 9f2fbe1 | 2013-03-27 16:31:34 +0530 | [diff] [blame] | 62 | |
| 63 | uart0_pins: pinmux_uart0_pins { |
| 64 | pinctrl-single,pins = < |
Florian Vaussard | 6a8a6b6 | 2013-06-03 16:12:25 +0200 | [diff] [blame] | 65 | 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ |
| 66 | 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ |
Vaibhav Hiremath | 9f2fbe1 | 2013-03-27 16:31:34 +0530 | [diff] [blame] | 67 | >; |
| 68 | }; |
Vaibhav Hiremath | 4d92757 | 2013-05-20 18:58:10 +0530 | [diff] [blame] | 69 | |
| 70 | clkout2_pin: pinmux_clkout2_pin { |
| 71 | pinctrl-single,pins = < |
Florian Vaussard | 6a8a6b6 | 2013-06-03 16:12:25 +0200 | [diff] [blame] | 72 | 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */ |
Vaibhav Hiremath | 4d92757 | 2013-05-20 18:58:10 +0530 | [diff] [blame] | 73 | >; |
| 74 | }; |
Philip Avinash | 1632fbd | 2013-06-06 15:52:39 +0200 | [diff] [blame] | 75 | |
| 76 | ecap2_pins: backlight_pins { |
| 77 | pinctrl-single,pins = < |
| 78 | 0x19c 0x4 /* mcasp0_ahclkr.ecap2_in_pwm2_out MODE4 */ |
| 79 | >; |
| 80 | }; |
Mugunthan V N | 94a924c | 2013-06-07 17:02:53 +0530 | [diff] [blame] | 81 | |
| 82 | cpsw_default: cpsw_default { |
| 83 | pinctrl-single,pins = < |
| 84 | /* Slave 1 */ |
| 85 | 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */ |
| 86 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */ |
| 87 | 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */ |
| 88 | 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */ |
| 89 | 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */ |
| 90 | 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */ |
| 91 | 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */ |
| 92 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */ |
| 93 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */ |
| 94 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */ |
| 95 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */ |
| 96 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */ |
| 97 | |
| 98 | /* Slave 2 */ |
| 99 | 0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */ |
| 100 | 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */ |
| 101 | 0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */ |
| 102 | 0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */ |
| 103 | 0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */ |
| 104 | 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */ |
| 105 | 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */ |
| 106 | 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */ |
| 107 | 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */ |
| 108 | 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */ |
| 109 | 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */ |
| 110 | 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */ |
| 111 | >; |
| 112 | }; |
| 113 | |
| 114 | cpsw_sleep: cpsw_sleep { |
| 115 | pinctrl-single,pins = < |
| 116 | /* Slave 1 reset value */ |
| 117 | 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 118 | 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 119 | 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 120 | 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 121 | 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 122 | 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 123 | 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 124 | 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 125 | 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 126 | 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 127 | 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 128 | 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 129 | |
| 130 | /* Slave 2 reset value*/ |
| 131 | 0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 132 | 0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 133 | 0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 134 | 0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 135 | 0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 136 | 0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 137 | 0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 138 | 0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 139 | 0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 140 | 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 141 | 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 142 | 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 143 | >; |
| 144 | }; |
| 145 | |
| 146 | davinci_mdio_default: davinci_mdio_default { |
| 147 | pinctrl-single,pins = < |
| 148 | /* MDIO */ |
| 149 | 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */ |
| 150 | 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ |
| 151 | >; |
| 152 | }; |
| 153 | |
| 154 | davinci_mdio_sleep: davinci_mdio_sleep { |
| 155 | pinctrl-single,pins = < |
| 156 | /* MDIO reset value */ |
| 157 | 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 158 | 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7) |
| 159 | >; |
| 160 | }; |
AnilKumar Ch | 2647dd1 | 2012-11-06 19:18:35 +0530 | [diff] [blame] | 161 | }; |
| 162 | |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 163 | ocp { |
Vaibhav Hiremath | dde3b0d | 2013-03-28 11:36:05 +0530 | [diff] [blame] | 164 | uart0: serial@44e09000 { |
Vaibhav Hiremath | 9f2fbe1 | 2013-03-27 16:31:34 +0530 | [diff] [blame] | 165 | pinctrl-names = "default"; |
| 166 | pinctrl-0 = <&uart0_pins>; |
| 167 | |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 168 | status = "okay"; |
| 169 | }; |
| 170 | |
AnilKumar Ch | b918e2c | 2012-11-21 17:22:17 +0530 | [diff] [blame] | 171 | i2c0: i2c@44e0b000 { |
Vaibhav Hiremath | 3f86644 | 2013-03-26 14:14:01 +0530 | [diff] [blame] | 172 | pinctrl-names = "default"; |
| 173 | pinctrl-0 = <&i2c0_pins>; |
| 174 | |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 175 | status = "okay"; |
| 176 | clock-frequency = <400000>; |
| 177 | |
| 178 | tps: tps@2d { |
| 179 | reg = <0x2d>; |
| 180 | }; |
| 181 | |
| 182 | lis331dlh: lis331dlh@18 { |
| 183 | compatible = "st,lis331dlh", "st,lis3lv02d"; |
| 184 | reg = <0x18>; |
| 185 | Vdd-supply = <&lis3_reg>; |
| 186 | Vdd_IO-supply = <&lis3_reg>; |
| 187 | |
| 188 | st,click-single-x; |
| 189 | st,click-single-y; |
| 190 | st,click-single-z; |
| 191 | st,click-thresh-x = <10>; |
| 192 | st,click-thresh-y = <10>; |
| 193 | st,click-thresh-z = <10>; |
| 194 | st,irq1-click; |
| 195 | st,irq2-click; |
| 196 | st,wakeup-x-lo; |
| 197 | st,wakeup-x-hi; |
| 198 | st,wakeup-y-lo; |
| 199 | st,wakeup-y-hi; |
| 200 | st,wakeup-z-lo; |
| 201 | st,wakeup-z-hi; |
| 202 | st,min-limit-x = <120>; |
| 203 | st,min-limit-y = <120>; |
| 204 | st,min-limit-z = <140>; |
| 205 | st,max-limit-x = <550>; |
| 206 | st,max-limit-y = <550>; |
| 207 | st,max-limit-z = <750>; |
| 208 | }; |
| 209 | }; |
Philip Avinash | 1632fbd | 2013-06-06 15:52:39 +0200 | [diff] [blame] | 210 | |
| 211 | epwmss2: epwmss@48304000 { |
| 212 | status = "okay"; |
| 213 | |
| 214 | ecap2: ecap@48304100 { |
| 215 | status = "okay"; |
| 216 | pinctrl-names = "default"; |
| 217 | pinctrl-0 = <&ecap2_pins>; |
| 218 | }; |
| 219 | }; |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 220 | }; |
| 221 | |
| 222 | vbat: fixedregulator@0 { |
| 223 | compatible = "regulator-fixed"; |
| 224 | regulator-name = "vbat"; |
| 225 | regulator-min-microvolt = <5000000>; |
| 226 | regulator-max-microvolt = <5000000>; |
| 227 | regulator-boot-on; |
| 228 | }; |
| 229 | |
| 230 | lis3_reg: fixedregulator@1 { |
| 231 | compatible = "regulator-fixed"; |
| 232 | regulator-name = "lis3_reg"; |
| 233 | regulator-boot-on; |
| 234 | }; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 235 | |
| 236 | leds { |
Vaibhav Hiremath | b8f70c3 | 2013-03-26 15:42:15 +0530 | [diff] [blame] | 237 | pinctrl-names = "default"; |
| 238 | pinctrl-0 = <&user_leds_s0>; |
| 239 | |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 240 | compatible = "gpio-leds"; |
| 241 | |
| 242 | led@1 { |
| 243 | label = "evmsk:green:usr0"; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 244 | gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 245 | default-state = "off"; |
| 246 | }; |
| 247 | |
| 248 | led@2 { |
| 249 | label = "evmsk:green:usr1"; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 250 | gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 251 | default-state = "off"; |
| 252 | }; |
| 253 | |
| 254 | led@3 { |
| 255 | label = "evmsk:green:mmc0"; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 256 | gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 257 | linux,default-trigger = "mmc0"; |
| 258 | default-state = "off"; |
| 259 | }; |
| 260 | |
| 261 | led@4 { |
| 262 | label = "evmsk:green:heartbeat"; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 263 | gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 29b0b843 | 2012-11-06 19:18:36 +0530 | [diff] [blame] | 264 | linux,default-trigger = "heartbeat"; |
| 265 | default-state = "off"; |
| 266 | }; |
| 267 | }; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 268 | |
| 269 | gpio_buttons: gpio_buttons@0 { |
| 270 | compatible = "gpio-keys"; |
| 271 | #address-cells = <1>; |
| 272 | #size-cells = <0>; |
| 273 | |
| 274 | switch@1 { |
| 275 | label = "button0"; |
| 276 | linux,code = <0x100>; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 277 | gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 278 | }; |
| 279 | |
| 280 | switch@2 { |
| 281 | label = "button1"; |
| 282 | linux,code = <0x101>; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 283 | gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 284 | }; |
| 285 | |
| 286 | switch@3 { |
| 287 | label = "button2"; |
| 288 | linux,code = <0x102>; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 289 | gpios = <&gpio0 30 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 290 | gpio-key,wakeup; |
| 291 | }; |
| 292 | |
| 293 | switch@4 { |
| 294 | label = "button3"; |
| 295 | linux,code = <0x103>; |
Florian Vaussard | e94233c | 2013-06-03 16:12:23 +0200 | [diff] [blame] | 296 | gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; |
AnilKumar Ch | 00834b7 | 2012-11-06 19:18:38 +0530 | [diff] [blame] | 297 | }; |
| 298 | }; |
Philip Avinash | 1632fbd | 2013-06-06 15:52:39 +0200 | [diff] [blame] | 299 | |
| 300 | backlight { |
| 301 | compatible = "pwm-backlight"; |
Laurent Pinchart | eb9bdef | 2013-07-18 00:54:24 +0200 | [diff] [blame^] | 302 | pwms = <&ecap2 0 50000 PWM_POLARITY_INVERTED>; |
Philip Avinash | 1632fbd | 2013-06-06 15:52:39 +0200 | [diff] [blame] | 303 | brightness-levels = <0 58 61 66 75 90 125 170 255>; |
| 304 | default-brightness-level = <8>; |
| 305 | }; |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 306 | }; |
| 307 | |
Florian Vaussard | eb33ef66 | 2013-06-03 16:12:22 +0200 | [diff] [blame] | 308 | #include "tps65910.dtsi" |
AnilKumar Ch | 571ccb2 | 2012-10-15 18:05:39 +0530 | [diff] [blame] | 309 | |
| 310 | &tps { |
| 311 | vcc1-supply = <&vbat>; |
| 312 | vcc2-supply = <&vbat>; |
| 313 | vcc3-supply = <&vbat>; |
| 314 | vcc4-supply = <&vbat>; |
| 315 | vcc5-supply = <&vbat>; |
| 316 | vcc6-supply = <&vbat>; |
| 317 | vcc7-supply = <&vbat>; |
| 318 | vccio-supply = <&vbat>; |
| 319 | |
| 320 | regulators { |
| 321 | vrtc_reg: regulator@0 { |
| 322 | regulator-always-on; |
| 323 | }; |
| 324 | |
| 325 | vio_reg: regulator@1 { |
| 326 | regulator-always-on; |
| 327 | }; |
| 328 | |
| 329 | vdd1_reg: regulator@2 { |
| 330 | /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ |
| 331 | regulator-name = "vdd_mpu"; |
| 332 | regulator-min-microvolt = <912500>; |
| 333 | regulator-max-microvolt = <1312500>; |
| 334 | regulator-boot-on; |
| 335 | regulator-always-on; |
| 336 | }; |
| 337 | |
| 338 | vdd2_reg: regulator@3 { |
| 339 | /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ |
| 340 | regulator-name = "vdd_core"; |
| 341 | regulator-min-microvolt = <912500>; |
| 342 | regulator-max-microvolt = <1150000>; |
| 343 | regulator-boot-on; |
| 344 | regulator-always-on; |
| 345 | }; |
| 346 | |
| 347 | vdd3_reg: regulator@4 { |
| 348 | regulator-always-on; |
| 349 | }; |
| 350 | |
| 351 | vdig1_reg: regulator@5 { |
| 352 | regulator-always-on; |
| 353 | }; |
| 354 | |
| 355 | vdig2_reg: regulator@6 { |
| 356 | regulator-always-on; |
| 357 | }; |
| 358 | |
| 359 | vpll_reg: regulator@7 { |
| 360 | regulator-always-on; |
| 361 | }; |
| 362 | |
| 363 | vdac_reg: regulator@8 { |
| 364 | regulator-always-on; |
| 365 | }; |
| 366 | |
| 367 | vaux1_reg: regulator@9 { |
| 368 | regulator-always-on; |
| 369 | }; |
| 370 | |
| 371 | vaux2_reg: regulator@10 { |
| 372 | regulator-always-on; |
| 373 | }; |
| 374 | |
| 375 | vaux33_reg: regulator@11 { |
| 376 | regulator-always-on; |
| 377 | }; |
| 378 | |
| 379 | vmmc_reg: regulator@12 { |
| 380 | regulator-always-on; |
| 381 | }; |
| 382 | }; |
| 383 | }; |
Mugunthan V N | 94a924c | 2013-06-07 17:02:53 +0530 | [diff] [blame] | 384 | |
| 385 | &mac { |
| 386 | pinctrl-names = "default", "sleep"; |
| 387 | pinctrl-0 = <&cpsw_default>; |
| 388 | pinctrl-1 = <&cpsw_sleep>; |
| 389 | }; |
| 390 | |
| 391 | &davinci_mdio { |
| 392 | pinctrl-names = "default", "sleep"; |
| 393 | pinctrl-0 = <&davinci_mdio_default>; |
| 394 | pinctrl-1 = <&davinci_mdio_sleep>; |
| 395 | }; |
Linus Torvalds | 496322b | 2013-07-09 18:24:39 -0700 | [diff] [blame] | 396 | |
Mugunthan V N | f6655d6 | 2013-06-03 20:10:09 +0000 | [diff] [blame] | 397 | &cpsw_emac0 { |
| 398 | phy_id = <&davinci_mdio>, <0>; |
Mugunthan V N | 6d75afe | 2013-06-03 20:10:11 +0000 | [diff] [blame] | 399 | phy-mode = "rgmii-txid"; |
Mugunthan V N | f6655d6 | 2013-06-03 20:10:09 +0000 | [diff] [blame] | 400 | }; |
| 401 | |
| 402 | &cpsw_emac1 { |
| 403 | phy_id = <&davinci_mdio>, <1>; |
Mugunthan V N | 6d75afe | 2013-06-03 20:10:11 +0000 | [diff] [blame] | 404 | phy-mode = "rgmii-txid"; |
Mugunthan V N | f6655d6 | 2013-06-03 20:10:09 +0000 | [diff] [blame] | 405 | }; |