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Alex Deucherd38ceaf2015-04-20 16:55:21 -04001/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23
24#ifndef __AMDGPU_VCE_H__
25#define __AMDGPU_VCE_H__
26
Leo Liue9822622015-05-06 14:31:27 -040027int amdgpu_vce_sw_init(struct amdgpu_device *adev, unsigned long size);
Alex Deucherd38ceaf2015-04-20 16:55:21 -040028int amdgpu_vce_sw_fini(struct amdgpu_device *adev);
29int amdgpu_vce_suspend(struct amdgpu_device *adev);
30int amdgpu_vce_resume(struct amdgpu_device *adev);
31int amdgpu_vce_get_create_msg(struct amdgpu_ring *ring, uint32_t handle,
Chunming Zhoued40bfb2015-08-03 13:28:16 +080032 struct fence **fence);
Alex Deucherd38ceaf2015-04-20 16:55:21 -040033int amdgpu_vce_get_destroy_msg(struct amdgpu_ring *ring, uint32_t handle,
Chunming Zhoued40bfb2015-08-03 13:28:16 +080034 struct fence **fence);
Alex Deucherd38ceaf2015-04-20 16:55:21 -040035void amdgpu_vce_free_handles(struct amdgpu_device *adev, struct drm_file *filp);
Alex Deucherd38ceaf2015-04-20 16:55:21 -040036int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx);
37bool amdgpu_vce_ring_emit_semaphore(struct amdgpu_ring *ring,
38 struct amdgpu_semaphore *semaphore,
39 bool emit_wait);
40void amdgpu_vce_ring_emit_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
41void amdgpu_vce_ring_emit_fence(struct amdgpu_ring *ring, u64 addr, u64 seq,
Chunming Zhou890ee232015-06-01 14:35:03 +080042 unsigned flags);
Alex Deucherd38ceaf2015-04-20 16:55:21 -040043int amdgpu_vce_ring_test_ring(struct amdgpu_ring *ring);
44int amdgpu_vce_ring_test_ib(struct amdgpu_ring *ring);
45
46#endif