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Jan Engelhardtb5114312007-07-15 23:39:36 -07001
2menuconfig CRYPTO_HW
3 bool "Hardware crypto devices"
4 default y
Jan Engelhardt06bfb7e2007-08-18 12:56:21 +02005 ---help---
6 Say Y here to get to see options for hardware crypto devices and
7 processors. This option alone does not add any kernel code.
8
9 If you say N, all options in this submenu will be skipped and disabled.
Jan Engelhardtb5114312007-07-15 23:39:36 -070010
11if CRYPTO_HW
Linus Torvalds1da177e2005-04-16 15:20:36 -070012
13config CRYPTO_DEV_PADLOCK
Herbert Xud1583252007-05-18 13:17:22 +100014 tristate "Support for VIA PadLock ACE"
Herbert Xu2f817412009-04-22 13:00:15 +080015 depends on X86 && !UML
Linus Torvalds1da177e2005-04-16 15:20:36 -070016 help
17 Some VIA processors come with an integrated crypto engine
18 (so called VIA PadLock ACE, Advanced Cryptography Engine)
Michal Ludvig1191f0a2006-08-06 22:46:20 +100019 that provides instructions for very fast cryptographic
20 operations with supported algorithms.
Linus Torvalds1da177e2005-04-16 15:20:36 -070021
22 The instructions are used only when the CPU supports them.
Michal Ludvig5644bda2006-08-06 22:50:30 +100023 Otherwise software encryption is used.
24
Linus Torvalds1da177e2005-04-16 15:20:36 -070025config CRYPTO_DEV_PADLOCK_AES
Michal Ludvig1191f0a2006-08-06 22:46:20 +100026 tristate "PadLock driver for AES algorithm"
Linus Torvalds1da177e2005-04-16 15:20:36 -070027 depends on CRYPTO_DEV_PADLOCK
Herbert Xu28ce7282006-08-21 21:38:42 +100028 select CRYPTO_BLKCIPHER
Sebastian Siewior7dc748e2008-04-01 21:24:50 +080029 select CRYPTO_AES
Linus Torvalds1da177e2005-04-16 15:20:36 -070030 help
31 Use VIA PadLock for AES algorithm.
32
Michal Ludvig1191f0a2006-08-06 22:46:20 +100033 Available in VIA C3 and newer CPUs.
34
35 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020036 called padlock-aes.
Michal Ludvig1191f0a2006-08-06 22:46:20 +100037
Michal Ludvig6c833272006-07-12 12:29:38 +100038config CRYPTO_DEV_PADLOCK_SHA
39 tristate "PadLock driver for SHA1 and SHA256 algorithms"
40 depends on CRYPTO_DEV_PADLOCK
Herbert Xubbbee462009-07-11 18:16:16 +080041 select CRYPTO_HASH
Michal Ludvig6c833272006-07-12 12:29:38 +100042 select CRYPTO_SHA1
43 select CRYPTO_SHA256
Michal Ludvig6c833272006-07-12 12:29:38 +100044 help
45 Use VIA PadLock for SHA1/SHA256 algorithms.
46
47 Available in VIA C7 and newer processors.
48
49 If unsure say M. The compiled module will be
Pavel Machek4737f092009-06-05 00:44:53 +020050 called padlock-sha.
Michal Ludvig6c833272006-07-12 12:29:38 +100051
Jordan Crouse9fe757b2006-10-04 18:48:57 +100052config CRYPTO_DEV_GEODE
53 tristate "Support for the Geode LX AES engine"
Simon Arlottf6259de2007-05-02 22:08:26 +100054 depends on X86_32 && PCI
Jordan Crouse9fe757b2006-10-04 18:48:57 +100055 select CRYPTO_ALGAPI
56 select CRYPTO_BLKCIPHER
Jordan Crouse9fe757b2006-10-04 18:48:57 +100057 help
58 Say 'Y' here to use the AMD Geode LX processor on-board AES
David Sterba3dde6ad2007-05-09 07:12:20 +020059 engine for the CryptoAPI AES algorithm.
Jordan Crouse9fe757b2006-10-04 18:48:57 +100060
61 To compile this driver as a module, choose M here: the module
62 will be called geode-aes.
63
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020064config ZCRYPT
65 tristate "Support for PCI-attached cryptographic adapters"
66 depends on S390
Ralph Wuerthner2f7c8bd2008-04-17 07:46:15 +020067 select HW_RANDOM
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020068 help
69 Select this option if you want to use a PCI-attached cryptographic
70 adapter like:
71 + PCI Cryptographic Accelerator (PCICA)
72 + PCI Cryptographic Coprocessor (PCICC)
73 + PCI-X Cryptographic Coprocessor (PCIXCC)
74 + Crypto Express2 Coprocessor (CEX2C)
75 + Crypto Express2 Accelerator (CEX2A)
Holger Denglercf2d0072011-05-23 10:24:30 +020076 + Crypto Express3 Coprocessor (CEX3C)
77 + Crypto Express3 Accelerator (CEX3A)
Martin Schwidefsky61d48c22007-05-10 15:46:00 +020078
Jan Glauber3f5615e2008-01-26 14:11:07 +010079config CRYPTO_SHA1_S390
80 tristate "SHA1 digest algorithm"
81 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +110082 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +010083 help
84 This is the s390 hardware accelerated implementation of the
85 SHA-1 secure hash standard (FIPS 180-1/DFIPS 180-2).
86
Jan Glauberd393d9b2011-04-19 21:29:19 +020087 It is available as of z990.
88
Jan Glauber3f5615e2008-01-26 14:11:07 +010089config CRYPTO_SHA256_S390
90 tristate "SHA256 digest algorithm"
91 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +110092 select CRYPTO_HASH
Jan Glauber3f5615e2008-01-26 14:11:07 +010093 help
94 This is the s390 hardware accelerated implementation of the
95 SHA256 secure hash standard (DFIPS 180-2).
96
Jan Glauberd393d9b2011-04-19 21:29:19 +020097 It is available as of z9.
Jan Glauber3f5615e2008-01-26 14:11:07 +010098
Jan Glauber291dc7c2008-03-06 19:52:00 +080099config CRYPTO_SHA512_S390
Jan Glauber4e2c6d72008-03-06 19:53:50 +0800100 tristate "SHA384 and SHA512 digest algorithm"
Jan Glauber291dc7c2008-03-06 19:52:00 +0800101 depends on S390
Herbert Xu563f3462009-01-18 20:33:33 +1100102 select CRYPTO_HASH
Jan Glauber291dc7c2008-03-06 19:52:00 +0800103 help
104 This is the s390 hardware accelerated implementation of the
105 SHA512 secure hash standard.
106
Jan Glauberd393d9b2011-04-19 21:29:19 +0200107 It is available as of z10.
Jan Glauber291dc7c2008-03-06 19:52:00 +0800108
Jan Glauber3f5615e2008-01-26 14:11:07 +0100109config CRYPTO_DES_S390
110 tristate "DES and Triple DES cipher algorithms"
111 depends on S390
112 select CRYPTO_ALGAPI
113 select CRYPTO_BLKCIPHER
Heiko Carstens63291d42012-05-09 16:27:35 +0200114 select CRYPTO_DES
Jan Glauber3f5615e2008-01-26 14:11:07 +0100115 help
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000116 This is the s390 hardware accelerated implementation of the
Jan Glauber3f5615e2008-01-26 14:11:07 +0100117 DES cipher algorithm (FIPS 46-2), and Triple DES EDE (FIPS 46-3).
118
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000119 As of z990 the ECB and CBC mode are hardware accelerated.
120 As of z196 the CTR mode is hardware accelerated.
121
Jan Glauber3f5615e2008-01-26 14:11:07 +0100122config CRYPTO_AES_S390
123 tristate "AES cipher algorithms"
124 depends on S390
125 select CRYPTO_ALGAPI
126 select CRYPTO_BLKCIPHER
127 help
128 This is the s390 hardware accelerated implementation of the
Gerald Schaefer99d97222011-04-26 16:12:42 +1000129 AES cipher algorithms (FIPS-197).
Jan Glauber3f5615e2008-01-26 14:11:07 +0100130
Gerald Schaefer99d97222011-04-26 16:12:42 +1000131 As of z9 the ECB and CBC modes are hardware accelerated
132 for 128 bit keys.
133 As of z10 the ECB and CBC modes are hardware accelerated
134 for all AES key sizes.
Gerald Schaefer0200f3e2011-05-04 15:09:44 +1000135 As of z196 the CTR mode is hardware accelerated for all AES
136 key sizes and XTS mode is hardware accelerated for 256 and
Gerald Schaefer99d97222011-04-26 16:12:42 +1000137 512 bit keys.
Jan Glauber3f5615e2008-01-26 14:11:07 +0100138
139config S390_PRNG
140 tristate "Pseudo random number generator device driver"
141 depends on S390
142 default "m"
143 help
144 Select this option if you want to use the s390 pseudo random number
145 generator. The PRNG is part of the cryptographic processor functions
146 and uses triple-DES to generate secure random numbers like the
Jan Glauberd393d9b2011-04-19 21:29:19 +0200147 ANSI X9.17 standard. User-space programs access the
148 pseudo-random-number device through the char device /dev/prandom.
149
150 It is available as of z9.
Jan Glauber3f5615e2008-01-26 14:11:07 +0100151
Gerald Schaeferdf1309c2011-04-19 21:29:18 +0200152config CRYPTO_GHASH_S390
153 tristate "GHASH digest algorithm"
154 depends on S390
155 select CRYPTO_HASH
156 help
157 This is the s390 hardware accelerated implementation of the
158 GHASH message digest algorithm for GCM (Galois/Counter Mode).
159
160 It is available as of z196.
161
Sebastian Andrzej Siewior85a7f0a2009-08-10 12:50:03 +1000162config CRYPTO_DEV_MV_CESA
163 tristate "Marvell's Cryptographic Engine"
164 depends on PLAT_ORION
Sebastian Andrzej Siewior85a7f0a2009-08-10 12:50:03 +1000165 select CRYPTO_AES
Herbert Xu596103c2015-06-17 14:58:24 +0800166 select CRYPTO_BLKCIPHER
Alexander Clouter1ebfefc2012-05-12 09:45:08 +0100167 select CRYPTO_HASH
Boris BREZILLON51b44fc2015-06-18 15:46:18 +0200168 select SRAM
Sebastian Andrzej Siewior85a7f0a2009-08-10 12:50:03 +1000169 help
170 This driver allows you to utilize the Cryptographic Engines and
171 Security Accelerator (CESA) which can be found on the Marvell Orion
172 and Kirkwood SoCs, such as QNAP's TS-209.
173
174 Currently the driver supports AES in ECB and CBC mode without DMA.
175
Boris BREZILLONf63601f2015-06-18 15:46:20 +0200176config CRYPTO_DEV_MARVELL_CESA
177 tristate "New Marvell's Cryptographic Engine driver"
Boris Brezillonfe55dfd2015-06-22 09:22:14 +0200178 depends on PLAT_ORION || ARCH_MVEBU
Boris BREZILLONf63601f2015-06-18 15:46:20 +0200179 select CRYPTO_AES
180 select CRYPTO_DES
181 select CRYPTO_BLKCIPHER
182 select CRYPTO_HASH
183 select SRAM
184 help
185 This driver allows you to utilize the Cryptographic Engines and
186 Security Accelerator (CESA) which can be found on the Armada 370.
Boris BREZILLONdb509a42015-06-18 15:46:21 +0200187 This driver supports CPU offload through DMA transfers.
Boris BREZILLONf63601f2015-06-18 15:46:20 +0200188
189 This driver is aimed at replacing the mv_cesa driver. This will only
190 happen once it has received proper testing.
191
David S. Miller0a625fd22010-05-19 14:14:04 +1000192config CRYPTO_DEV_NIAGARA2
193 tristate "Niagara2 Stream Processing Unit driver"
David S. Miller50e78162010-09-12 10:44:21 +0800194 select CRYPTO_DES
Herbert Xu596103c2015-06-17 14:58:24 +0800195 select CRYPTO_BLKCIPHER
196 select CRYPTO_HASH
David S. Miller0a625fd22010-05-19 14:14:04 +1000197 depends on SPARC64
198 help
199 Each core of a Niagara2 processor contains a Stream
200 Processing Unit, which itself contains several cryptographic
201 sub-units. One set provides the Modular Arithmetic Unit,
202 used for SSL offload. The other set provides the Cipher
203 Group, which can perform encryption, decryption, hashing,
204 checksumming, and raw copies.
205
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800206config CRYPTO_DEV_HIFN_795X
207 tristate "Driver HIFN 795x crypto accelerator chips"
Evgeniy Polyakovc3041f92007-10-11 19:58:16 +0800208 select CRYPTO_DES
Herbert Xu653ebd92007-11-27 19:48:27 +0800209 select CRYPTO_BLKCIPHER
Herbert Xu946fef42008-01-26 09:48:44 +1100210 select HW_RANDOM if CRYPTO_DEV_HIFN_795X_RNG
Jan Glauber2707b932007-11-12 21:56:38 +0800211 depends on PCI
Richard Weinberger75b76622011-10-10 12:55:41 +0200212 depends on !ARCH_DMA_ADDR_T_64BIT
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800213 help
214 This option allows you to have support for HIFN 795x crypto adapters.
215
Herbert Xu946fef42008-01-26 09:48:44 +1100216config CRYPTO_DEV_HIFN_795X_RNG
217 bool "HIFN 795x random number generator"
218 depends on CRYPTO_DEV_HIFN_795X
219 help
220 Select this option if you want to enable the random number generator
221 on the HIFN 795x crypto adapters.
Evgeniy Polyakovf7d05612007-10-26 21:31:14 +0800222
Kim Phillips8e8ec592011-03-13 16:54:26 +0800223source drivers/crypto/caam/Kconfig
224
Kim Phillips9c4a7962008-06-23 19:50:15 +0800225config CRYPTO_DEV_TALITOS
226 tristate "Talitos Freescale Security Engine (SEC)"
Herbert Xu596103c2015-06-17 14:58:24 +0800227 select CRYPTO_AEAD
Kim Phillips9c4a7962008-06-23 19:50:15 +0800228 select CRYPTO_AUTHENC
Herbert Xu596103c2015-06-17 14:58:24 +0800229 select CRYPTO_BLKCIPHER
230 select CRYPTO_HASH
Kim Phillips9c4a7962008-06-23 19:50:15 +0800231 select HW_RANDOM
232 depends on FSL_SOC
233 help
234 Say 'Y' here to use the Freescale Security Engine (SEC)
235 to offload cryptographic algorithm computation.
236
237 The Freescale SEC is present on PowerQUICC 'E' processors, such
238 as the MPC8349E and MPC8548E.
239
240 To compile this driver as a module, choose M here: the module
241 will be called talitos.
242
LEROY Christophe5b841a62015-04-17 16:32:03 +0200243config CRYPTO_DEV_TALITOS1
244 bool "SEC1 (SEC 1.0 and SEC Lite 1.2)"
245 depends on CRYPTO_DEV_TALITOS
246 depends on PPC_8xx || PPC_82xx
247 default y
248 help
249 Say 'Y' here to use the Freescale Security Engine (SEC) version 1.0
250 found on MPC82xx or the Freescale Security Engine (SEC Lite)
251 version 1.2 found on MPC8xx
252
253config CRYPTO_DEV_TALITOS2
254 bool "SEC2+ (SEC version 2.0 or upper)"
255 depends on CRYPTO_DEV_TALITOS
256 default y if !PPC_8xx
257 help
258 Say 'Y' here to use the Freescale Security Engine (SEC)
259 version 2 and following as found on MPC83xx, MPC85xx, etc ...
260
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800261config CRYPTO_DEV_IXP4XX
262 tristate "Driver for IXP4xx crypto hardware acceleration"
Krzysztof Hałasa9665c522010-03-25 23:56:05 +0100263 depends on ARCH_IXP4XX && IXP4XX_QMGR && IXP4XX_NPE
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800264 select CRYPTO_DES
Herbert Xu596103c2015-06-17 14:58:24 +0800265 select CRYPTO_AEAD
Imre Kaloz090657e2008-07-13 20:12:11 +0800266 select CRYPTO_AUTHENC
Christian Hohnstaedt81bef012008-06-25 14:38:47 +0800267 select CRYPTO_BLKCIPHER
268 help
269 Driver for the IXP4xx NPE crypto engine.
270
James Hsiao049359d2009-02-05 16:18:13 +1100271config CRYPTO_DEV_PPC4XX
272 tristate "Driver AMCC PPC4xx crypto accelerator"
273 depends on PPC && 4xx
274 select CRYPTO_HASH
James Hsiao049359d2009-02-05 16:18:13 +1100275 select CRYPTO_BLKCIPHER
276 help
277 This option allows you to have support for AMCC crypto acceleration.
278
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800279config CRYPTO_DEV_OMAP_SHAM
Lokesh Vutlaeaef7e32013-07-26 12:29:14 +0530280 tristate "Support for OMAP MD5/SHA1/SHA2 hw accelerator"
281 depends on ARCH_OMAP2PLUS
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800282 select CRYPTO_SHA1
283 select CRYPTO_MD5
Lokesh Vutlaeaef7e32013-07-26 12:29:14 +0530284 select CRYPTO_SHA256
285 select CRYPTO_SHA512
286 select CRYPTO_HMAC
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800287 help
Lokesh Vutlaeaef7e32013-07-26 12:29:14 +0530288 OMAP processors have MD5/SHA1/SHA2 hw accelerator. Select this if you
289 want to use the OMAP module for MD5/SHA1/SHA2 algorithms.
Dmitry Kasatkin8628e7c2010-05-03 11:10:59 +0800290
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800291config CRYPTO_DEV_OMAP_AES
292 tristate "Support for OMAP AES hw engine"
Joel Fernandes1bbf6432013-08-17 21:42:35 -0500293 depends on ARCH_OMAP2 || ARCH_OMAP3 || ARCH_OMAP2PLUS
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800294 select CRYPTO_AES
Herbert Xu596103c2015-06-17 14:58:24 +0800295 select CRYPTO_BLKCIPHER
Dmitry Kasatkin537559a2010-09-03 19:16:02 +0800296 help
297 OMAP processors have AES module accelerator. Select this if you
298 want to use the OMAP module for AES algorithms.
299
Joel Fernandes701d0f12014-02-14 10:49:47 -0600300config CRYPTO_DEV_OMAP_DES
301 tristate "Support for OMAP DES3DES hw engine"
302 depends on ARCH_OMAP2PLUS
303 select CRYPTO_DES
Herbert Xu596103c2015-06-17 14:58:24 +0800304 select CRYPTO_BLKCIPHER
Joel Fernandes701d0f12014-02-14 10:49:47 -0600305 help
306 OMAP processors have DES/3DES module accelerator. Select this if you
307 want to use the OMAP module for DES and 3DES algorithms. Currently
308 the ECB and CBC modes of operation supported by the driver. Also
309 accesses made on unaligned boundaries are also supported.
310
Jamie Ilesce921362011-02-21 16:43:21 +1100311config CRYPTO_DEV_PICOXCELL
312 tristate "Support for picoXcell IPSEC and Layer2 crypto engines"
Jamie Ilesfad8fa42011-10-20 14:10:26 +0200313 depends on ARCH_PICOXCELL && HAVE_CLK
Herbert Xu596103c2015-06-17 14:58:24 +0800314 select CRYPTO_AEAD
Jamie Ilesce921362011-02-21 16:43:21 +1100315 select CRYPTO_AES
316 select CRYPTO_AUTHENC
Herbert Xu596103c2015-06-17 14:58:24 +0800317 select CRYPTO_BLKCIPHER
Jamie Ilesce921362011-02-21 16:43:21 +1100318 select CRYPTO_DES
319 select CRYPTO_CBC
320 select CRYPTO_ECB
321 select CRYPTO_SEQIV
322 help
323 This option enables support for the hardware offload engines in the
324 Picochip picoXcell SoC devices. Select this for IPSEC ESP offload
325 and for 3gpp Layer 2 ciphering support.
326
327 Saying m here will build a module named pipcoxcell_crypto.
328
Javier Martin5de88752013-03-01 12:37:53 +0100329config CRYPTO_DEV_SAHARA
330 tristate "Support for SAHARA crypto accelerator"
Paul Bolle74d24d82013-05-12 13:57:19 +0200331 depends on ARCH_MXC && OF
Javier Martin5de88752013-03-01 12:37:53 +0100332 select CRYPTO_BLKCIPHER
333 select CRYPTO_AES
334 select CRYPTO_ECB
335 help
336 This option enables support for the SAHARA HW crypto accelerator
337 found in some Freescale i.MX chips.
338
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800339config CRYPTO_DEV_S5P
Naveen Krishna Chatradhie922e962014-05-08 21:58:14 +0800340 tristate "Support for Samsung S5PV210/Exynos crypto accelerator"
341 depends on ARCH_S5PV210 || ARCH_EXYNOS
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800342 select CRYPTO_AES
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800343 select CRYPTO_BLKCIPHER
344 help
345 This option allows you to have support for S5P crypto acceleration.
Naveen Krishna Chatradhie922e962014-05-08 21:58:14 +0800346 Select this to offload Samsung S5PV210 or S5PC110, Exynos from AES
Vladimir Zapolskiya49e4902011-04-08 20:40:51 +0800347 algorithms execution.
348
Kent Yoderaef7b312012-04-12 05:39:26 +0000349config CRYPTO_DEV_NX
Dan Streetman7011a122015-05-07 13:49:17 -0400350 bool "Support for IBM PowerPC Nest (NX) cryptographic acceleration"
351 depends on PPC64
Kent Yoderaef7b312012-04-12 05:39:26 +0000352 help
Dan Streetman7011a122015-05-07 13:49:17 -0400353 This enables support for the NX hardware cryptographic accelerator
354 coprocessor that is in IBM PowerPC P7+ or later processors. This
355 does not actually enable any drivers, it only allows you to select
356 which acceleration type (encryption and/or compression) to enable.
Seth Jennings322cacc2012-07-19 09:42:38 -0500357
358if CRYPTO_DEV_NX
359 source "drivers/crypto/nx/Kconfig"
360endif
Kent Yoderaef7b312012-04-12 05:39:26 +0000361
Andreas Westin2789c082012-04-30 10:11:17 +0200362config CRYPTO_DEV_UX500
363 tristate "Driver for ST-Ericsson UX500 crypto hardware acceleration"
364 depends on ARCH_U8500
Andreas Westin2789c082012-04-30 10:11:17 +0200365 help
366 Driver for ST-Ericsson UX500 crypto engine.
367
368if CRYPTO_DEV_UX500
369 source "drivers/crypto/ux500/Kconfig"
370endif # if CRYPTO_DEV_UX500
371
Sonic Zhangb8840092012-06-04 12:24:47 +0800372config CRYPTO_DEV_BFIN_CRC
373 tristate "Support for Blackfin CRC hardware"
374 depends on BF60x
375 help
376 Newer Blackfin processors have CRC hardware. Select this if you
377 want to use the Blackfin CRC module.
378
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200379config CRYPTO_DEV_ATMEL_AES
380 tristate "Support for Atmel AES hw accelerator"
381 depends on ARCH_AT91
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200382 select CRYPTO_AES
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200383 select CRYPTO_BLKCIPHER
Tushar Behera22eed1c2012-08-07 17:32:14 +0530384 select AT_HDMAC
Nicolas Royerbd3c7b52012-07-01 19:19:44 +0200385 help
386 Some Atmel processors have AES hw accelerator.
387 Select this if you want to use the Atmel module for
388 AES algorithms.
389
390 To compile this driver as a module, choose M here: the module
391 will be called atmel-aes.
392
Nicolas Royer13802002012-07-01 19:19:45 +0200393config CRYPTO_DEV_ATMEL_TDES
394 tristate "Support for Atmel DES/TDES hw accelerator"
395 depends on ARCH_AT91
396 select CRYPTO_DES
Nicolas Royer13802002012-07-01 19:19:45 +0200397 select CRYPTO_BLKCIPHER
398 help
399 Some Atmel processors have DES/TDES hw accelerator.
400 Select this if you want to use the Atmel module for
401 DES/TDES algorithms.
402
403 To compile this driver as a module, choose M here: the module
404 will be called atmel-tdes.
405
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200406config CRYPTO_DEV_ATMEL_SHA
Nicolas Royerd4905b32013-02-20 17:10:26 +0100407 tristate "Support for Atmel SHA hw accelerator"
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200408 depends on ARCH_AT91
Herbert Xu596103c2015-06-17 14:58:24 +0800409 select CRYPTO_HASH
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200410 help
Nicolas Royerd4905b32013-02-20 17:10:26 +0100411 Some Atmel processors have SHA1/SHA224/SHA256/SHA384/SHA512
412 hw accelerator.
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200413 Select this if you want to use the Atmel module for
Nicolas Royerd4905b32013-02-20 17:10:26 +0100414 SHA1/SHA224/SHA256/SHA384/SHA512 algorithms.
Nicolas Royerebc82ef2012-07-01 19:19:46 +0200415
416 To compile this driver as a module, choose M here: the module
417 will be called atmel-sha.
418
Tom Lendackyf1147662013-11-12 11:46:51 -0600419config CRYPTO_DEV_CCP
420 bool "Support for AMD Cryptographic Coprocessor"
Tom Lendacky6c506342015-02-03 13:07:29 -0600421 depends on ((X86 && PCI) || (ARM64 && (OF_ADDRESS || ACPI))) && HAS_IOMEM
Tom Lendackyf1147662013-11-12 11:46:51 -0600422 help
423 The AMD Cryptographic Coprocessor provides hardware support
424 for encryption, hashing and related operations.
425
426if CRYPTO_DEV_CCP
427 source "drivers/crypto/ccp/Kconfig"
428endif
429
Marek Vasut15b59e72013-12-10 20:26:21 +0100430config CRYPTO_DEV_MXS_DCP
431 tristate "Support for Freescale MXS DCP"
432 depends on ARCH_MXS
Marek Vasut15b59e72013-12-10 20:26:21 +0100433 select CRYPTO_CBC
434 select CRYPTO_ECB
435 select CRYPTO_AES
436 select CRYPTO_BLKCIPHER
Herbert Xu596103c2015-06-17 14:58:24 +0800437 select CRYPTO_HASH
Marek Vasut15b59e72013-12-10 20:26:21 +0100438 help
439 The Freescale i.MX23/i.MX28 has SHA1/SHA256 and AES128 CBC/ECB
440 co-processor on the die.
441
442 To compile this driver as a module, choose M here: the module
443 will be called mxs-dcp.
444
Tadeusz Strukcea40012014-06-05 13:44:39 -0700445source "drivers/crypto/qat/Kconfig"
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300446
447config CRYPTO_DEV_QCE
448 tristate "Qualcomm crypto engine accelerator"
Chen Gang71d932d2014-07-13 11:01:38 +0800449 depends on (ARCH_QCOM || COMPILE_TEST) && HAS_DMA && HAS_IOMEM
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300450 select CRYPTO_AES
451 select CRYPTO_DES
452 select CRYPTO_ECB
453 select CRYPTO_CBC
454 select CRYPTO_XTS
455 select CRYPTO_CTR
Stanimir Varbanovc6727522014-06-25 19:28:58 +0300456 select CRYPTO_BLKCIPHER
457 help
458 This driver supports Qualcomm crypto engine accelerator
459 hardware. To compile this driver as a module, choose M here. The
460 module will be called qcrypto.
461
Leonidas S. Barbosad2e3ae62015-02-06 14:59:48 -0200462config CRYPTO_DEV_VMX
463 bool "Support for VMX cryptographic acceleration instructions"
464 depends on PPC64
Leonidas S. Barbosad2e3ae62015-02-06 14:59:48 -0200465 help
466 Support for VMX cryptographic acceleration instructions.
467
468source "drivers/crypto/vmx/Kconfig"
469
James Hartleyd358f1a2015-03-12 23:17:26 +0000470config CRYPTO_DEV_IMGTEC_HASH
James Hartleyd358f1a2015-03-12 23:17:26 +0000471 tristate "Imagination Technologies hardware hash accelerator"
Geert Uytterhoeven8c98ebd2015-04-23 20:03:58 +0200472 depends on MIPS || COMPILE_TEST
473 depends on HAS_DMA
James Hartleyd358f1a2015-03-12 23:17:26 +0000474 select CRYPTO_MD5
475 select CRYPTO_SHA1
James Hartleyd358f1a2015-03-12 23:17:26 +0000476 select CRYPTO_SHA256
477 select CRYPTO_HASH
478 help
479 This driver interfaces with the Imagination Technologies
480 hardware hash accelerator. Supporting MD5/SHA1/SHA224/SHA256
481 hashing algorithms.
482
Jan Engelhardtb5114312007-07-15 23:39:36 -0700483endif # CRYPTO_HW