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Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +02001/*
2 * Driver for ADAU1701 SigmaDSP processor
3 *
4 * Copyright 2011 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 * based on an inital version by Cliff Cai <cliff.cai@analog.com>
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11#include <linux/module.h>
12#include <linux/init.h>
13#include <linux/i2c.h>
14#include <linux/delay.h>
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +020015#include <linux/slab.h>
Daniel Mack04561ea2013-05-23 15:46:05 +020016#include <linux/of.h>
17#include <linux/of_gpio.h>
18#include <linux/of_device.h>
Daniel Mack45405d52013-06-24 16:31:31 +020019#include <linux/regmap.h>
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +020020#include <sound/core.h>
21#include <sound/pcm.h>
22#include <sound/pcm_params.h>
23#include <sound/soc.h>
24
Lars-Peter Clausen40216ce2011-11-28 09:44:17 +010025#include "sigmadsp.h"
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +020026#include "adau1701.h"
27
Daniel Mack45405d52013-06-24 16:31:31 +020028#define ADAU1701_DSPCTRL 0x081c
29#define ADAU1701_SEROCTL 0x081e
30#define ADAU1701_SERICTL 0x081f
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +020031
Daniel Mack45405d52013-06-24 16:31:31 +020032#define ADAU1701_AUXNPOW 0x0822
Daniel Mack97d0a862013-06-24 16:31:32 +020033#define ADAU1701_PINCONF_0 0x0820
34#define ADAU1701_PINCONF_1 0x0821
35#define ADAU1701_AUXNPOW 0x0822
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +020036
Daniel Mack45405d52013-06-24 16:31:31 +020037#define ADAU1701_OSCIPOW 0x0826
38#define ADAU1701_DACSET 0x0827
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +020039
Daniel Mack45405d52013-06-24 16:31:31 +020040#define ADAU1701_MAX_REGISTER 0x0828
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +020041
42#define ADAU1701_DSPCTRL_CR (1 << 2)
43#define ADAU1701_DSPCTRL_DAM (1 << 3)
44#define ADAU1701_DSPCTRL_ADM (1 << 4)
45#define ADAU1701_DSPCTRL_SR_48 0x00
46#define ADAU1701_DSPCTRL_SR_96 0x01
47#define ADAU1701_DSPCTRL_SR_192 0x02
48#define ADAU1701_DSPCTRL_SR_MASK 0x03
49
50#define ADAU1701_SEROCTL_INV_LRCLK 0x2000
51#define ADAU1701_SEROCTL_INV_BCLK 0x1000
52#define ADAU1701_SEROCTL_MASTER 0x0800
53
54#define ADAU1701_SEROCTL_OBF16 0x0000
55#define ADAU1701_SEROCTL_OBF8 0x0200
56#define ADAU1701_SEROCTL_OBF4 0x0400
57#define ADAU1701_SEROCTL_OBF2 0x0600
58#define ADAU1701_SEROCTL_OBF_MASK 0x0600
59
60#define ADAU1701_SEROCTL_OLF1024 0x0000
61#define ADAU1701_SEROCTL_OLF512 0x0080
62#define ADAU1701_SEROCTL_OLF256 0x0100
63#define ADAU1701_SEROCTL_OLF_MASK 0x0180
64
65#define ADAU1701_SEROCTL_MSB_DEALY1 0x0000
66#define ADAU1701_SEROCTL_MSB_DEALY0 0x0004
67#define ADAU1701_SEROCTL_MSB_DEALY8 0x0008
68#define ADAU1701_SEROCTL_MSB_DEALY12 0x000c
69#define ADAU1701_SEROCTL_MSB_DEALY16 0x0010
70#define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c
71
72#define ADAU1701_SEROCTL_WORD_LEN_24 0x0000
73#define ADAU1701_SEROCTL_WORD_LEN_20 0x0001
74#define ADAU1701_SEROCTL_WORD_LEN_16 0x0010
75#define ADAU1701_SEROCTL_WORD_LEN_MASK 0x0003
76
77#define ADAU1701_AUXNPOW_VBPD 0x40
78#define ADAU1701_AUXNPOW_VRPD 0x20
79
80#define ADAU1701_SERICTL_I2S 0
81#define ADAU1701_SERICTL_LEFTJ 1
82#define ADAU1701_SERICTL_TDM 2
83#define ADAU1701_SERICTL_RIGHTJ_24 3
84#define ADAU1701_SERICTL_RIGHTJ_20 4
85#define ADAU1701_SERICTL_RIGHTJ_18 5
86#define ADAU1701_SERICTL_RIGHTJ_16 6
87#define ADAU1701_SERICTL_MODE_MASK 7
88#define ADAU1701_SERICTL_INV_BCLK BIT(3)
89#define ADAU1701_SERICTL_INV_LRCLK BIT(4)
90
91#define ADAU1701_OSCIPOW_OPD 0x04
92#define ADAU1701_DACSET_DACINIT 1
93
Daniel Mack2352d4b2013-06-24 16:31:30 +020094#define ADAU1707_CLKDIV_UNSET (-1UL)
95
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +020096#define ADAU1701_FIRMWARE "adau1701.bin"
97
98struct adau1701 {
Daniel Mackf724ba32013-06-07 13:53:04 +020099 int gpio_nreset;
Daniel Mack2352d4b2013-06-24 16:31:30 +0200100 int gpio_pll_mode[2];
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200101 unsigned int dai_fmt;
Daniel Mack2352d4b2013-06-24 16:31:30 +0200102 unsigned int pll_clkdiv;
103 unsigned int sysclk;
Daniel Mack45405d52013-06-24 16:31:31 +0200104 struct regmap *regmap;
Daniel Mack97d0a862013-06-24 16:31:32 +0200105 u8 pin_config[12];
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200106};
107
108static const struct snd_kcontrol_new adau1701_controls[] = {
109 SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),
110};
111
112static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {
113 SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),
114 SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),
115 SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),
116 SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),
117 SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),
118
119 SND_SOC_DAPM_OUTPUT("OUT0"),
120 SND_SOC_DAPM_OUTPUT("OUT1"),
121 SND_SOC_DAPM_OUTPUT("OUT2"),
122 SND_SOC_DAPM_OUTPUT("OUT3"),
123 SND_SOC_DAPM_INPUT("IN0"),
124 SND_SOC_DAPM_INPUT("IN1"),
125};
126
127static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {
128 { "OUT0", NULL, "DAC0" },
129 { "OUT1", NULL, "DAC1" },
130 { "OUT2", NULL, "DAC2" },
131 { "OUT3", NULL, "DAC3" },
132
133 { "ADC", NULL, "IN0" },
134 { "ADC", NULL, "IN1" },
135};
136
Daniel Mack45405d52013-06-24 16:31:31 +0200137static unsigned int adau1701_register_size(struct device *dev,
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200138 unsigned int reg)
139{
140 switch (reg) {
Daniel Mack97d0a862013-06-24 16:31:32 +0200141 case ADAU1701_PINCONF_0:
142 case ADAU1701_PINCONF_1:
143 return 3;
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200144 case ADAU1701_DSPCTRL:
145 case ADAU1701_SEROCTL:
146 case ADAU1701_AUXNPOW:
147 case ADAU1701_OSCIPOW:
148 case ADAU1701_DACSET:
149 return 2;
150 case ADAU1701_SERICTL:
151 return 1;
152 }
153
Daniel Mack45405d52013-06-24 16:31:31 +0200154 dev_err(dev, "Unsupported register address: %d\n", reg);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200155 return 0;
156}
157
Daniel Mack45405d52013-06-24 16:31:31 +0200158static bool adau1701_volatile_reg(struct device *dev, unsigned int reg)
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200159{
Daniel Mack45405d52013-06-24 16:31:31 +0200160 switch (reg) {
161 case ADAU1701_DACSET:
162 return true;
163 default:
164 return false;
165 }
166}
167
168static int adau1701_reg_write(void *context, unsigned int reg,
169 unsigned int value)
170{
171 struct i2c_client *client = context;
Dan Carpenterc2097402011-06-20 10:11:25 +0300172 unsigned int i;
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200173 unsigned int size;
Daniel Mack97d0a862013-06-24 16:31:32 +0200174 uint8_t buf[5];
Dan Carpenterc2097402011-06-20 10:11:25 +0300175 int ret;
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200176
Daniel Mack45405d52013-06-24 16:31:31 +0200177 size = adau1701_register_size(&client->dev, reg);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200178 if (size == 0)
179 return -EINVAL;
180
Daniel Mack45405d52013-06-24 16:31:31 +0200181 buf[0] = reg >> 8;
182 buf[1] = reg & 0xff;
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200183
184 for (i = size + 1; i >= 2; --i) {
185 buf[i] = value;
186 value >>= 8;
187 }
188
Daniel Mack45405d52013-06-24 16:31:31 +0200189 ret = i2c_master_send(client, buf, size + 2);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200190 if (ret == size + 2)
191 return 0;
192 else if (ret < 0)
193 return ret;
194 else
195 return -EIO;
196}
197
Daniel Mack45405d52013-06-24 16:31:31 +0200198static int adau1701_reg_read(void *context, unsigned int reg,
199 unsigned int *value)
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200200{
Daniel Mack45405d52013-06-24 16:31:31 +0200201 int ret;
202 unsigned int i;
203 unsigned int size;
204 uint8_t send_buf[2], recv_buf[3];
205 struct i2c_client *client = context;
206 struct i2c_msg msgs[2];
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200207
Daniel Mack45405d52013-06-24 16:31:31 +0200208 size = adau1701_register_size(&client->dev, reg);
209 if (size == 0)
210 return -EINVAL;
211
212 send_buf[0] = reg >> 8;
213 send_buf[1] = reg & 0xff;
214
215 msgs[0].addr = client->addr;
216 msgs[0].len = sizeof(send_buf);
217 msgs[0].buf = send_buf;
218 msgs[0].flags = 0;
219
220 msgs[1].addr = client->addr;
221 msgs[1].len = size;
222 msgs[1].buf = recv_buf;
223 msgs[1].flags = I2C_M_RD;
224
225 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
226 if (ret < 0)
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200227 return ret;
Daniel Mack45405d52013-06-24 16:31:31 +0200228 else if (ret != ARRAY_SIZE(msgs))
229 return -EIO;
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200230
Daniel Mack45405d52013-06-24 16:31:31 +0200231 *value = 0;
232
233 for (i = 0; i < size; i++)
234 *value |= recv_buf[i] << (i * 8);
235
236 return 0;
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200237}
238
Daniel Mack2352d4b2013-06-24 16:31:30 +0200239static int adau1701_reset(struct snd_soc_codec *codec, unsigned int clkdiv)
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200240{
Daniel Mackf724ba32013-06-07 13:53:04 +0200241 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
Daniel Mackf724ba32013-06-07 13:53:04 +0200242 struct i2c_client *client = to_i2c_client(codec->dev);
Daniel Mackde9fc722013-06-24 16:31:29 +0200243 int ret;
Daniel Mackf724ba32013-06-07 13:53:04 +0200244
Daniel Mack2352d4b2013-06-24 16:31:30 +0200245 if (clkdiv != ADAU1707_CLKDIV_UNSET &&
246 gpio_is_valid(adau1701->gpio_pll_mode[0]) &&
247 gpio_is_valid(adau1701->gpio_pll_mode[1])) {
248 switch (clkdiv) {
249 case 64:
250 gpio_set_value(adau1701->gpio_pll_mode[0], 0);
251 gpio_set_value(adau1701->gpio_pll_mode[1], 0);
252 break;
253 case 256:
254 gpio_set_value(adau1701->gpio_pll_mode[0], 0);
255 gpio_set_value(adau1701->gpio_pll_mode[1], 1);
256 break;
257 case 384:
258 gpio_set_value(adau1701->gpio_pll_mode[0], 1);
259 gpio_set_value(adau1701->gpio_pll_mode[1], 0);
260 break;
261 case 0: /* fallback */
262 case 512:
263 gpio_set_value(adau1701->gpio_pll_mode[0], 1);
264 gpio_set_value(adau1701->gpio_pll_mode[1], 1);
265 break;
266 }
267 }
268
269 adau1701->pll_clkdiv = clkdiv;
270
Daniel Mackde9fc722013-06-24 16:31:29 +0200271 if (gpio_is_valid(adau1701->gpio_nreset)) {
272 gpio_set_value(adau1701->gpio_nreset, 0);
273 /* minimum reset time is 20ns */
274 udelay(1);
275 gpio_set_value(adau1701->gpio_nreset, 1);
276 /* power-up time may be as long as 85ms */
277 mdelay(85);
278 }
Daniel Mackf724ba32013-06-07 13:53:04 +0200279
Daniel Mack2352d4b2013-06-24 16:31:30 +0200280 /*
281 * Postpone the firmware download to a point in time when we
282 * know the correct PLL setup
283 */
284 if (clkdiv != ADAU1707_CLKDIV_UNSET) {
285 ret = process_sigma_firmware(client, ADAU1701_FIRMWARE);
286 if (ret) {
287 dev_warn(codec->dev, "Failed to load firmware\n");
288 return ret;
289 }
Daniel Mackf724ba32013-06-07 13:53:04 +0200290 }
291
Daniel Mack45405d52013-06-24 16:31:31 +0200292 regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
293 regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
294
295 regcache_mark_dirty(adau1701->regmap);
296 regcache_sync(adau1701->regmap);
Daniel Mackf724ba32013-06-07 13:53:04 +0200297
298 return 0;
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200299}
300
301static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec,
302 snd_pcm_format_t format)
303{
304 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
305 unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;
306 unsigned int val;
307
308 switch (format) {
309 case SNDRV_PCM_FORMAT_S16_LE:
310 val = ADAU1701_SEROCTL_WORD_LEN_16;
311 break;
312 case SNDRV_PCM_FORMAT_S20_3LE:
313 val = ADAU1701_SEROCTL_WORD_LEN_20;
314 break;
315 case SNDRV_PCM_FORMAT_S24_LE:
316 val = ADAU1701_SEROCTL_WORD_LEN_24;
317 break;
318 default:
319 return -EINVAL;
320 }
321
322 if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
323 switch (format) {
324 case SNDRV_PCM_FORMAT_S16_LE:
325 val |= ADAU1701_SEROCTL_MSB_DEALY16;
326 break;
327 case SNDRV_PCM_FORMAT_S20_3LE:
328 val |= ADAU1701_SEROCTL_MSB_DEALY12;
329 break;
330 case SNDRV_PCM_FORMAT_S24_LE:
331 val |= ADAU1701_SEROCTL_MSB_DEALY8;
332 break;
333 }
334 mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;
335 }
336
Daniel Mackee441142013-06-27 22:00:04 +0200337 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200338
339 return 0;
340}
341
342static int adau1701_set_playback_pcm_format(struct snd_soc_codec *codec,
343 snd_pcm_format_t format)
344{
345 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
346 unsigned int val;
347
348 if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
349 return 0;
350
351 switch (format) {
352 case SNDRV_PCM_FORMAT_S16_LE:
353 val = ADAU1701_SERICTL_RIGHTJ_16;
354 break;
355 case SNDRV_PCM_FORMAT_S20_3LE:
356 val = ADAU1701_SERICTL_RIGHTJ_20;
357 break;
358 case SNDRV_PCM_FORMAT_S24_LE:
359 val = ADAU1701_SERICTL_RIGHTJ_24;
360 break;
361 default:
362 return -EINVAL;
363 }
364
Daniel Mackee441142013-06-27 22:00:04 +0200365 regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200366 ADAU1701_SERICTL_MODE_MASK, val);
367
368 return 0;
369}
370
371static int adau1701_hw_params(struct snd_pcm_substream *substream,
372 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
373{
Mark Browne6968a12012-04-04 15:58:16 +0100374 struct snd_soc_codec *codec = dai->codec;
Daniel Mack2352d4b2013-06-24 16:31:30 +0200375 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
376 unsigned int clkdiv = adau1701->sysclk / params_rate(params);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200377 snd_pcm_format_t format;
378 unsigned int val;
Daniel Mack2352d4b2013-06-24 16:31:30 +0200379 int ret;
380
381 /*
382 * If the mclk/lrclk ratio changes, the chip needs updated PLL
383 * mode GPIO settings, and a full reset cycle, including a new
384 * firmware upload.
385 */
386 if (clkdiv != adau1701->pll_clkdiv) {
387 ret = adau1701_reset(codec, clkdiv);
388 if (ret < 0)
389 return ret;
390 }
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200391
392 switch (params_rate(params)) {
393 case 192000:
394 val = ADAU1701_DSPCTRL_SR_192;
395 break;
396 case 96000:
397 val = ADAU1701_DSPCTRL_SR_96;
398 break;
399 case 48000:
400 val = ADAU1701_DSPCTRL_SR_48;
401 break;
402 default:
403 return -EINVAL;
404 }
405
Daniel Mackee441142013-06-27 22:00:04 +0200406 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200407 ADAU1701_DSPCTRL_SR_MASK, val);
408
409 format = params_format(params);
410 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
411 return adau1701_set_playback_pcm_format(codec, format);
412 else
413 return adau1701_set_capture_pcm_format(codec, format);
414}
415
416static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
417 unsigned int fmt)
418{
419 struct snd_soc_codec *codec = codec_dai->codec;
420 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
421 unsigned int serictl = 0x00, seroctl = 0x00;
422 bool invert_lrclk;
423
424 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
425 case SND_SOC_DAIFMT_CBM_CFM:
426 /* master, 64-bits per sample, 1 frame per sample */
427 seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16
428 | ADAU1701_SEROCTL_OLF1024;
429 break;
430 case SND_SOC_DAIFMT_CBS_CFS:
431 break;
432 default:
433 return -EINVAL;
434 }
435
436 /* clock inversion */
437 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
438 case SND_SOC_DAIFMT_NB_NF:
439 invert_lrclk = false;
440 break;
441 case SND_SOC_DAIFMT_NB_IF:
442 invert_lrclk = true;
443 break;
444 case SND_SOC_DAIFMT_IB_NF:
445 invert_lrclk = false;
446 serictl |= ADAU1701_SERICTL_INV_BCLK;
447 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
448 break;
449 case SND_SOC_DAIFMT_IB_IF:
450 invert_lrclk = true;
451 serictl |= ADAU1701_SERICTL_INV_BCLK;
452 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
453 break;
454 default:
455 return -EINVAL;
456 }
457
458 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
459 case SND_SOC_DAIFMT_I2S:
460 break;
461 case SND_SOC_DAIFMT_LEFT_J:
462 serictl |= ADAU1701_SERICTL_LEFTJ;
463 seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;
464 invert_lrclk = !invert_lrclk;
465 break;
466 case SND_SOC_DAIFMT_RIGHT_J:
467 serictl |= ADAU1701_SERICTL_RIGHTJ_24;
468 seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;
469 invert_lrclk = !invert_lrclk;
470 break;
471 default:
472 return -EINVAL;
473 }
474
475 if (invert_lrclk) {
476 seroctl |= ADAU1701_SEROCTL_INV_LRCLK;
477 serictl |= ADAU1701_SERICTL_INV_LRCLK;
478 }
479
480 adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
481
Daniel Mack45405d52013-06-24 16:31:31 +0200482 regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);
483 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200484 ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
485
486 return 0;
487}
488
489static int adau1701_set_bias_level(struct snd_soc_codec *codec,
490 enum snd_soc_bias_level level)
491{
492 unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;
Daniel Mackee441142013-06-27 22:00:04 +0200493 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200494
495 switch (level) {
496 case SND_SOC_BIAS_ON:
497 break;
498 case SND_SOC_BIAS_PREPARE:
499 break;
500 case SND_SOC_BIAS_STANDBY:
501 /* Enable VREF and VREF buffer */
Daniel Mackee441142013-06-27 22:00:04 +0200502 regmap_update_bits(adau1701->regmap,
503 ADAU1701_AUXNPOW, mask, 0x00);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200504 break;
505 case SND_SOC_BIAS_OFF:
506 /* Disable VREF and VREF buffer */
Daniel Mackee441142013-06-27 22:00:04 +0200507 regmap_update_bits(adau1701->regmap,
508 ADAU1701_AUXNPOW, mask, mask);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200509 break;
510 }
511
512 codec->dapm.bias_level = level;
513 return 0;
514}
515
516static int adau1701_digital_mute(struct snd_soc_dai *dai, int mute)
517{
518 struct snd_soc_codec *codec = dai->codec;
519 unsigned int mask = ADAU1701_DSPCTRL_DAM;
Daniel Mackee441142013-06-27 22:00:04 +0200520 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200521 unsigned int val;
522
523 if (mute)
524 val = 0;
525 else
526 val = mask;
527
Daniel Mackee441142013-06-27 22:00:04 +0200528 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200529
530 return 0;
531}
532
533static int adau1701_set_sysclk(struct snd_soc_codec *codec, int clk_id,
Axel Lin21326db2011-09-28 13:48:35 +0800534 int source, unsigned int freq, int dir)
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200535{
536 unsigned int val;
Daniel Mack2352d4b2013-06-24 16:31:30 +0200537 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200538
539 switch (clk_id) {
540 case ADAU1701_CLK_SRC_OSC:
541 val = 0x0;
542 break;
543 case ADAU1701_CLK_SRC_MCLK:
544 val = ADAU1701_OSCIPOW_OPD;
545 break;
546 default:
547 return -EINVAL;
548 }
549
Daniel Mackee441142013-06-27 22:00:04 +0200550 regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,
551 ADAU1701_OSCIPOW_OPD, val);
Daniel Mack2352d4b2013-06-24 16:31:30 +0200552 adau1701->sysclk = freq;
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200553
554 return 0;
555}
556
557#define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
558 SNDRV_PCM_RATE_192000)
559
560#define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
561 SNDRV_PCM_FMTBIT_S24_LE)
562
Lars-Peter Clausen890754a2011-11-23 14:11:21 +0100563static const struct snd_soc_dai_ops adau1701_dai_ops = {
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200564 .set_fmt = adau1701_set_dai_fmt,
565 .hw_params = adau1701_hw_params,
566 .digital_mute = adau1701_digital_mute,
567};
568
569static struct snd_soc_dai_driver adau1701_dai = {
570 .name = "adau1701",
571 .playback = {
572 .stream_name = "Playback",
573 .channels_min = 2,
574 .channels_max = 8,
575 .rates = ADAU1701_RATES,
576 .formats = ADAU1701_FORMATS,
577 },
578 .capture = {
579 .stream_name = "Capture",
580 .channels_min = 2,
581 .channels_max = 8,
582 .rates = ADAU1701_RATES,
583 .formats = ADAU1701_FORMATS,
584 },
585 .ops = &adau1701_dai_ops,
586 .symmetric_rates = 1,
587};
588
Daniel Mack04561ea2013-05-23 15:46:05 +0200589#ifdef CONFIG_OF
590static const struct of_device_id adau1701_dt_ids[] = {
591 { .compatible = "adi,adau1701", },
592 { }
593};
594MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
595#endif
596
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200597static int adau1701_probe(struct snd_soc_codec *codec)
598{
Daniel Mack97d0a862013-06-24 16:31:32 +0200599 int i, ret;
600 unsigned int val;
Daniel Mack2352d4b2013-06-24 16:31:30 +0200601 struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200602
Daniel Mackf724ba32013-06-07 13:53:04 +0200603 codec->control_data = to_i2c_client(codec->dev);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200604
Daniel Mack2352d4b2013-06-24 16:31:30 +0200605 /*
606 * Let the pll_clkdiv variable default to something that won't happen
607 * at runtime. That way, we can postpone the firmware download from
608 * adau1701_reset() to a point in time when we know the correct PLL
609 * mode parameters.
610 */
611 adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
612
613 /* initalize with pre-configured pll mode settings */
614 ret = adau1701_reset(codec, adau1701->pll_clkdiv);
615 if (ret < 0)
Daniel Mackf724ba32013-06-07 13:53:04 +0200616 return ret;
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200617
Daniel Mack97d0a862013-06-24 16:31:32 +0200618 /* set up pin config */
619 val = 0;
620 for (i = 0; i < 6; i++)
621 val |= adau1701->pin_config[i] << (i * 4);
622
623 regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);
624
625 val = 0;
626 for (i = 0; i < 6; i++)
627 val |= adau1701->pin_config[i + 6] << (i * 4);
628
629 regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);
630
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200631 return 0;
632}
633
634static struct snd_soc_codec_driver adau1701_codec_drv = {
635 .probe = adau1701_probe,
636 .set_bias_level = adau1701_set_bias_level,
Axel Lineb3032f2012-01-27 18:02:09 +0800637 .idle_bias_off = true,
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200638
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200639 .controls = adau1701_controls,
640 .num_controls = ARRAY_SIZE(adau1701_controls),
641 .dapm_widgets = adau1701_dapm_widgets,
642 .num_dapm_widgets = ARRAY_SIZE(adau1701_dapm_widgets),
643 .dapm_routes = adau1701_dapm_routes,
644 .num_dapm_routes = ARRAY_SIZE(adau1701_dapm_routes),
645
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200646 .set_sysclk = adau1701_set_sysclk,
647};
648
Daniel Mack45405d52013-06-24 16:31:31 +0200649static const struct regmap_config adau1701_regmap = {
650 .reg_bits = 16,
651 .val_bits = 32,
652 .max_register = ADAU1701_MAX_REGISTER,
653 .cache_type = REGCACHE_RBTREE,
654 .volatile_reg = adau1701_volatile_reg,
655 .reg_write = adau1701_reg_write,
656 .reg_read = adau1701_reg_read,
657};
658
Bill Pemberton7a79e942012-12-07 09:26:37 -0500659static int adau1701_i2c_probe(struct i2c_client *client,
660 const struct i2c_device_id *id)
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200661{
662 struct adau1701 *adau1701;
Daniel Mack04561ea2013-05-23 15:46:05 +0200663 struct device *dev = &client->dev;
664 int gpio_nreset = -EINVAL;
Daniel Mack2352d4b2013-06-24 16:31:30 +0200665 int gpio_pll_mode[2] = { -EINVAL, -EINVAL };
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200666 int ret;
667
Daniel Mack04561ea2013-05-23 15:46:05 +0200668 adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200669 if (!adau1701)
670 return -ENOMEM;
671
Daniel Mack45405d52013-06-24 16:31:31 +0200672 adau1701->regmap = devm_regmap_init(dev, NULL, client,
673 &adau1701_regmap);
674 if (IS_ERR(adau1701->regmap))
675 return PTR_ERR(adau1701->regmap);
676
Daniel Mack04561ea2013-05-23 15:46:05 +0200677 if (dev->of_node) {
678 gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0);
679 if (gpio_nreset < 0 && gpio_nreset != -ENOENT)
680 return gpio_nreset;
Daniel Mack2352d4b2013-06-24 16:31:30 +0200681
682 gpio_pll_mode[0] = of_get_named_gpio(dev->of_node,
683 "adi,pll-mode-gpios", 0);
684 if (gpio_pll_mode[0] < 0 && gpio_pll_mode[0] != -ENOENT)
685 return gpio_pll_mode[0];
686
687 gpio_pll_mode[1] = of_get_named_gpio(dev->of_node,
688 "adi,pll-mode-gpios", 1);
689 if (gpio_pll_mode[1] < 0 && gpio_pll_mode[1] != -ENOENT)
690 return gpio_pll_mode[1];
Daniel Mack97d0a862013-06-24 16:31:32 +0200691
692 of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
693 &adau1701->pll_clkdiv);
694
695 of_property_read_u8_array(dev->of_node, "adi,pin-config",
696 adau1701->pin_config,
697 ARRAY_SIZE(adau1701->pin_config));
Daniel Mack04561ea2013-05-23 15:46:05 +0200698 }
699
700 if (gpio_is_valid(gpio_nreset)) {
701 ret = devm_gpio_request_one(dev, gpio_nreset, GPIOF_OUT_INIT_LOW,
702 "ADAU1701 Reset");
703 if (ret < 0)
704 return ret;
Daniel Mack04561ea2013-05-23 15:46:05 +0200705 }
706
Daniel Mack2352d4b2013-06-24 16:31:30 +0200707 if (gpio_is_valid(gpio_pll_mode[0]) &&
708 gpio_is_valid(gpio_pll_mode[1])) {
709 ret = devm_gpio_request_one(dev, gpio_pll_mode[0],
710 GPIOF_OUT_INIT_LOW,
711 "ADAU1701 PLL mode 0");
712 if (ret < 0)
713 return ret;
714
715 ret = devm_gpio_request_one(dev, gpio_pll_mode[1],
716 GPIOF_OUT_INIT_LOW,
717 "ADAU1701 PLL mode 1");
718 if (ret < 0)
719 return ret;
720 }
721
Daniel Mackf724ba32013-06-07 13:53:04 +0200722 adau1701->gpio_nreset = gpio_nreset;
Daniel Mack2352d4b2013-06-24 16:31:30 +0200723 adau1701->gpio_pll_mode[0] = gpio_pll_mode[0];
724 adau1701->gpio_pll_mode[1] = gpio_pll_mode[1];
Daniel Mackf724ba32013-06-07 13:53:04 +0200725
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200726 i2c_set_clientdata(client, adau1701);
727 ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv,
728 &adau1701_dai, 1);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200729 return ret;
730}
731
Bill Pemberton7a79e942012-12-07 09:26:37 -0500732static int adau1701_i2c_remove(struct i2c_client *client)
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200733{
734 snd_soc_unregister_codec(&client->dev);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200735 return 0;
736}
737
738static const struct i2c_device_id adau1701_i2c_id[] = {
739 { "adau1701", 0 },
740 { }
741};
742MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);
743
744static struct i2c_driver adau1701_i2c_driver = {
745 .driver = {
746 .name = "adau1701",
747 .owner = THIS_MODULE,
Daniel Mack04561ea2013-05-23 15:46:05 +0200748 .of_match_table = of_match_ptr(adau1701_dt_ids),
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200749 },
750 .probe = adau1701_i2c_probe,
Bill Pemberton7a79e942012-12-07 09:26:37 -0500751 .remove = adau1701_i2c_remove,
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200752 .id_table = adau1701_i2c_id,
753};
754
Sachin Kamatbeb22de2012-08-06 17:25:45 +0530755module_i2c_driver(adau1701_i2c_driver);
Lars-Peter Clausen631ed8a2011-06-13 15:26:20 +0200756
757MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");
758MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");
759MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
760MODULE_LICENSE("GPL");