Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 1 | #include <linux/init.h> |
| 2 | |
| 3 | #include <linux/mm.h> |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 4 | #include <linux/spinlock.h> |
| 5 | #include <linux/smp.h> |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 6 | #include <linux/interrupt.h> |
Tejun Heo | 6dd01be | 2009-01-21 17:26:06 +0900 | [diff] [blame] | 7 | #include <linux/module.h> |
Shaohua Li | 9329672 | 2010-10-20 11:07:03 +0800 | [diff] [blame] | 8 | #include <linux/cpu.h> |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 9 | |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 10 | #include <asm/tlbflush.h> |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 11 | #include <asm/mmu_context.h> |
Jan Beulich | 350f8f5 | 2009-11-13 11:54:40 +0000 | [diff] [blame] | 12 | #include <asm/cache.h> |
Tejun Heo | 6dd01be | 2009-01-21 17:26:06 +0900 | [diff] [blame] | 13 | #include <asm/apic.h> |
Tejun Heo | bdbcdd4 | 2009-01-21 17:26:06 +0900 | [diff] [blame] | 14 | #include <asm/uv/uv.h> |
Alex Shi | 3df3212 | 2012-06-28 09:02:20 +0800 | [diff] [blame] | 15 | #include <linux/debugfs.h> |
Glauber Costa | 5af5573 | 2008-03-25 13:28:56 -0300 | [diff] [blame] | 16 | |
Brian Gerst | 9eb912d | 2009-01-19 00:38:57 +0900 | [diff] [blame] | 17 | DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) |
| 18 | = { &init_mm, 0, }; |
| 19 | |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 20 | /* |
| 21 | * Smarter SMP flushing macros. |
| 22 | * c/o Linus Torvalds. |
| 23 | * |
| 24 | * These mean you can really definitely utterly forget about |
| 25 | * writing to user space from interrupts. (Its not allowed anyway). |
| 26 | * |
| 27 | * Optimizations Manfred Spraul <manfred@colorfullife.com> |
| 28 | * |
| 29 | * More scalable flush, from Andi Kleen |
| 30 | * |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 31 | * Implement flush IPI by CALL_FUNCTION_VECTOR, Alex Shi |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 32 | */ |
| 33 | |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 34 | struct flush_tlb_info { |
| 35 | struct mm_struct *flush_mm; |
| 36 | unsigned long flush_start; |
| 37 | unsigned long flush_end; |
| 38 | }; |
Shaohua Li | 9329672 | 2010-10-20 11:07:03 +0800 | [diff] [blame] | 39 | |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 40 | /* |
| 41 | * We cannot call mmdrop() because we are in interrupt context, |
| 42 | * instead update mm->cpu_vm_mask. |
| 43 | */ |
| 44 | void leave_mm(int cpu) |
| 45 | { |
Linus Torvalds | 02171b4 | 2012-05-23 11:06:59 -0700 | [diff] [blame] | 46 | struct mm_struct *active_mm = this_cpu_read(cpu_tlbstate.active_mm); |
Alex Shi | c6ae41e | 2012-05-11 15:35:27 +0800 | [diff] [blame] | 47 | if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK) |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 48 | BUG(); |
Suresh Siddha | a6fca40 | 2012-03-22 17:01:25 -0700 | [diff] [blame] | 49 | if (cpumask_test_cpu(cpu, mm_cpumask(active_mm))) { |
| 50 | cpumask_clear_cpu(cpu, mm_cpumask(active_mm)); |
| 51 | load_cr3(swapper_pg_dir); |
| 52 | } |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 53 | } |
| 54 | EXPORT_SYMBOL_GPL(leave_mm); |
| 55 | |
| 56 | /* |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 57 | * The flush IPI assumes that a thread switch happens in this order: |
| 58 | * [cpu0: the cpu that switches] |
| 59 | * 1) switch_mm() either 1a) or 1b) |
| 60 | * 1a) thread switch to a different mm |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 61 | * 1a1) set cpu_tlbstate to TLBSTATE_OK |
| 62 | * Now the tlb flush NMI handler flush_tlb_func won't call leave_mm |
| 63 | * if cpu0 was in lazy tlb mode. |
| 64 | * 1a2) update cpu active_mm |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 65 | * Now cpu0 accepts tlb flushes for the new mm. |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 66 | * 1a3) cpu_set(cpu, new_mm->cpu_vm_mask); |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 67 | * Now the other cpus will send tlb flush ipis. |
| 68 | * 1a4) change cr3. |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 69 | * 1a5) cpu_clear(cpu, old_mm->cpu_vm_mask); |
| 70 | * Stop ipi delivery for the old mm. This is not synchronized with |
| 71 | * the other cpus, but flush_tlb_func ignore flush ipis for the wrong |
| 72 | * mm, and in the worst case we perform a superfluous tlb flush. |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 73 | * 1b) thread switch without mm change |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 74 | * cpu active_mm is correct, cpu0 already handles flush ipis. |
| 75 | * 1b1) set cpu_tlbstate to TLBSTATE_OK |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 76 | * 1b2) test_and_set the cpu bit in cpu_vm_mask. |
| 77 | * Atomically set the bit [other cpus will start sending flush ipis], |
| 78 | * and test the bit. |
| 79 | * 1b3) if the bit was 0: leave_mm was called, flush the tlb. |
| 80 | * 2) switch %%esp, ie current |
| 81 | * |
| 82 | * The interrupt must handle 2 special cases: |
| 83 | * - cr3 is changed before %%esp, ie. it cannot use current->{active_,}mm. |
| 84 | * - the cpu performs speculative tlb reads, i.e. even if the cpu only |
| 85 | * runs in kernel space, the cpu could load tlb entries for user space |
| 86 | * pages. |
| 87 | * |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 88 | * The good news is that cpu_tlbstate is local to each cpu, no |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 89 | * write/read ordering problems. |
| 90 | */ |
| 91 | |
| 92 | /* |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 93 | * TLB flush funcation: |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 94 | * 1) Flush the tlb entries if the cpu uses the mm that's being flushed. |
| 95 | * 2) Leave the mm if we are in the lazy tlb mode. |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 96 | */ |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 97 | static void flush_tlb_func(void *info) |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 98 | { |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 99 | struct flush_tlb_info *f = info; |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 100 | |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 101 | if (f->flush_mm != this_cpu_read(cpu_tlbstate.active_mm)) |
| 102 | return; |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 103 | |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 104 | if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_OK) { |
| 105 | if (f->flush_end == TLB_FLUSH_ALL || !cpu_has_invlpg) |
| 106 | local_flush_tlb(); |
| 107 | else if (!f->flush_end) |
| 108 | __flush_tlb_single(f->flush_start); |
| 109 | else { |
| 110 | unsigned long addr; |
| 111 | addr = f->flush_start; |
| 112 | while (addr < f->flush_end) { |
| 113 | __flush_tlb_single(addr); |
| 114 | addr += PAGE_SIZE; |
Alex Shi | e7b52ff | 2012-06-28 09:02:17 +0800 | [diff] [blame] | 115 | } |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 116 | } |
| 117 | } else |
| 118 | leave_mm(smp_processor_id()); |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 119 | |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 120 | } |
| 121 | |
Rusty Russell | 4595f96 | 2009-01-10 21:58:09 -0800 | [diff] [blame] | 122 | void native_flush_tlb_others(const struct cpumask *cpumask, |
Alex Shi | e7b52ff | 2012-06-28 09:02:17 +0800 | [diff] [blame] | 123 | struct mm_struct *mm, unsigned long start, |
| 124 | unsigned long end) |
Rusty Russell | 4595f96 | 2009-01-10 21:58:09 -0800 | [diff] [blame] | 125 | { |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 126 | struct flush_tlb_info info; |
| 127 | info.flush_mm = mm; |
| 128 | info.flush_start = start; |
| 129 | info.flush_end = end; |
| 130 | |
Rusty Russell | 4595f96 | 2009-01-10 21:58:09 -0800 | [diff] [blame] | 131 | if (is_uv_system()) { |
Tejun Heo | bdbcdd4 | 2009-01-21 17:26:06 +0900 | [diff] [blame] | 132 | unsigned int cpu; |
Rusty Russell | 4595f96 | 2009-01-10 21:58:09 -0800 | [diff] [blame] | 133 | |
Xiao Guangrong | 25542c6 | 2011-03-15 09:57:37 +0800 | [diff] [blame] | 134 | cpu = smp_processor_id(); |
Alex Shi | e7b52ff | 2012-06-28 09:02:17 +0800 | [diff] [blame] | 135 | cpumask = uv_flush_tlb_others(cpumask, mm, start, end, cpu); |
Tejun Heo | bdbcdd4 | 2009-01-21 17:26:06 +0900 | [diff] [blame] | 136 | if (cpumask) |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 137 | smp_call_function_many(cpumask, flush_tlb_func, |
| 138 | &info, 1); |
Mike Travis | 0e21990 | 2009-01-10 21:58:10 -0800 | [diff] [blame] | 139 | return; |
Rusty Russell | 4595f96 | 2009-01-10 21:58:09 -0800 | [diff] [blame] | 140 | } |
Alex Shi | 52aec33 | 2012-06-28 09:02:23 +0800 | [diff] [blame] | 141 | smp_call_function_many(cpumask, flush_tlb_func, &info, 1); |
Rusty Russell | 4595f96 | 2009-01-10 21:58:09 -0800 | [diff] [blame] | 142 | } |
| 143 | |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 144 | void flush_tlb_current_task(void) |
| 145 | { |
| 146 | struct mm_struct *mm = current->mm; |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 147 | |
| 148 | preempt_disable(); |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 149 | |
| 150 | local_flush_tlb(); |
Rusty Russell | 78f1c4d | 2009-09-24 09:34:51 -0600 | [diff] [blame] | 151 | if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids) |
Alex Shi | e7b52ff | 2012-06-28 09:02:17 +0800 | [diff] [blame] | 152 | flush_tlb_others(mm_cpumask(mm), mm, 0UL, TLB_FLUSH_ALL); |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 153 | preempt_enable(); |
| 154 | } |
| 155 | |
Alex Shi | 611ae8e | 2012-06-28 09:02:22 +0800 | [diff] [blame] | 156 | /* |
| 157 | * It can find out the THP large page, or |
| 158 | * HUGETLB page in tlb_flush when THP disabled |
| 159 | */ |
Alex Shi | d8dfe60 | 2012-06-28 09:02:18 +0800 | [diff] [blame] | 160 | static inline unsigned long has_large_page(struct mm_struct *mm, |
| 161 | unsigned long start, unsigned long end) |
| 162 | { |
| 163 | pgd_t *pgd; |
| 164 | pud_t *pud; |
| 165 | pmd_t *pmd; |
| 166 | unsigned long addr = ALIGN(start, HPAGE_SIZE); |
| 167 | for (; addr < end; addr += HPAGE_SIZE) { |
| 168 | pgd = pgd_offset(mm, addr); |
| 169 | if (likely(!pgd_none(*pgd))) { |
| 170 | pud = pud_offset(pgd, addr); |
| 171 | if (likely(!pud_none(*pud))) { |
| 172 | pmd = pmd_offset(pud, addr); |
| 173 | if (likely(!pmd_none(*pmd))) |
| 174 | if (pmd_large(*pmd)) |
| 175 | return addr; |
| 176 | } |
| 177 | } |
| 178 | } |
| 179 | return 0; |
| 180 | } |
Alex Shi | e7b52ff | 2012-06-28 09:02:17 +0800 | [diff] [blame] | 181 | |
Alex Shi | 611ae8e | 2012-06-28 09:02:22 +0800 | [diff] [blame] | 182 | void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start, |
| 183 | unsigned long end, unsigned long vmflag) |
| 184 | { |
| 185 | unsigned long addr; |
| 186 | unsigned act_entries, tlb_entries = 0; |
| 187 | |
| 188 | preempt_disable(); |
| 189 | if (current->active_mm != mm) |
| 190 | goto flush_all; |
| 191 | |
| 192 | if (!current->mm) { |
| 193 | leave_mm(smp_processor_id()); |
| 194 | goto flush_all; |
| 195 | } |
| 196 | |
| 197 | if (end == TLB_FLUSH_ALL || tlb_flushall_shift == -1 |
| 198 | || vmflag == VM_HUGETLB) { |
| 199 | local_flush_tlb(); |
| 200 | goto flush_all; |
| 201 | } |
| 202 | |
| 203 | /* In modern CPU, last level tlb used for both data/ins */ |
| 204 | if (vmflag & VM_EXEC) |
| 205 | tlb_entries = tlb_lli_4k[ENTRIES]; |
| 206 | else |
| 207 | tlb_entries = tlb_lld_4k[ENTRIES]; |
| 208 | /* Assume all of TLB entries was occupied by this task */ |
| 209 | act_entries = mm->total_vm > tlb_entries ? tlb_entries : mm->total_vm; |
| 210 | |
| 211 | /* tlb_flushall_shift is on balance point, details in commit log */ |
| 212 | if ((end - start) >> PAGE_SHIFT > act_entries >> tlb_flushall_shift) |
| 213 | local_flush_tlb(); |
| 214 | else { |
| 215 | if (has_large_page(mm, start, end)) { |
| 216 | local_flush_tlb(); |
| 217 | goto flush_all; |
| 218 | } |
| 219 | /* flush range by one by one 'invlpg' */ |
| 220 | for (addr = start; addr < end; addr += PAGE_SIZE) |
| 221 | __flush_tlb_single(addr); |
| 222 | |
| 223 | if (cpumask_any_but(mm_cpumask(mm), |
| 224 | smp_processor_id()) < nr_cpu_ids) |
| 225 | flush_tlb_others(mm_cpumask(mm), mm, start, end); |
| 226 | preempt_enable(); |
Alex Shi | e7b52ff | 2012-06-28 09:02:17 +0800 | [diff] [blame] | 227 | return; |
| 228 | } |
| 229 | |
Alex Shi | 611ae8e | 2012-06-28 09:02:22 +0800 | [diff] [blame] | 230 | flush_all: |
Alex Shi | e7b52ff | 2012-06-28 09:02:17 +0800 | [diff] [blame] | 231 | if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids) |
| 232 | flush_tlb_others(mm_cpumask(mm), mm, 0UL, TLB_FLUSH_ALL); |
| 233 | preempt_enable(); |
| 234 | } |
| 235 | |
Alex Shi | e7b52ff | 2012-06-28 09:02:17 +0800 | [diff] [blame] | 236 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long start) |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 237 | { |
| 238 | struct mm_struct *mm = vma->vm_mm; |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 239 | |
| 240 | preempt_disable(); |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 241 | |
| 242 | if (current->active_mm == mm) { |
| 243 | if (current->mm) |
Alex Shi | e7b52ff | 2012-06-28 09:02:17 +0800 | [diff] [blame] | 244 | __flush_tlb_one(start); |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 245 | else |
| 246 | leave_mm(smp_processor_id()); |
| 247 | } |
| 248 | |
Rusty Russell | 78f1c4d | 2009-09-24 09:34:51 -0600 | [diff] [blame] | 249 | if (cpumask_any_but(mm_cpumask(mm), smp_processor_id()) < nr_cpu_ids) |
Alex Shi | e7b52ff | 2012-06-28 09:02:17 +0800 | [diff] [blame] | 250 | flush_tlb_others(mm_cpumask(mm), mm, start, 0UL); |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 251 | |
| 252 | preempt_enable(); |
| 253 | } |
| 254 | |
| 255 | static void do_flush_tlb_all(void *info) |
| 256 | { |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 257 | __flush_tlb_all(); |
Alex Shi | c6ae41e | 2012-05-11 15:35:27 +0800 | [diff] [blame] | 258 | if (this_cpu_read(cpu_tlbstate.state) == TLBSTATE_LAZY) |
Borislav Petkov | 3f8afb7 | 2010-07-21 14:47:05 +0200 | [diff] [blame] | 259 | leave_mm(smp_processor_id()); |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 260 | } |
| 261 | |
| 262 | void flush_tlb_all(void) |
| 263 | { |
Jens Axboe | 15c8b6c | 2008-05-09 09:39:44 +0200 | [diff] [blame] | 264 | on_each_cpu(do_flush_tlb_all, NULL, 1); |
Glauber Costa | c048fdf | 2008-03-03 14:12:54 -0300 | [diff] [blame] | 265 | } |
Alex Shi | 3df3212 | 2012-06-28 09:02:20 +0800 | [diff] [blame] | 266 | |
Alex Shi | effee4b | 2012-06-28 09:02:24 +0800 | [diff] [blame^] | 267 | static void do_kernel_range_flush(void *info) |
| 268 | { |
| 269 | struct flush_tlb_info *f = info; |
| 270 | unsigned long addr; |
| 271 | |
| 272 | /* flush range by one by one 'invlpg' */ |
| 273 | for (addr = f->flush_start; addr < f->flush_end; addr += PAGE_SIZE) |
| 274 | __flush_tlb_single(addr); |
| 275 | } |
| 276 | |
| 277 | void flush_tlb_kernel_range(unsigned long start, unsigned long end) |
| 278 | { |
| 279 | unsigned act_entries; |
| 280 | struct flush_tlb_info info; |
| 281 | |
| 282 | /* In modern CPU, last level tlb used for both data/ins */ |
| 283 | act_entries = tlb_lld_4k[ENTRIES]; |
| 284 | |
| 285 | /* Balance as user space task's flush, a bit conservative */ |
| 286 | if (end == TLB_FLUSH_ALL || tlb_flushall_shift == -1 || |
| 287 | (end - start) >> PAGE_SHIFT > act_entries >> tlb_flushall_shift) |
| 288 | |
| 289 | on_each_cpu(do_flush_tlb_all, NULL, 1); |
| 290 | else { |
| 291 | info.flush_start = start; |
| 292 | info.flush_end = end; |
| 293 | on_each_cpu(do_kernel_range_flush, &info, 1); |
| 294 | } |
| 295 | } |
| 296 | |
Alex Shi | 3df3212 | 2012-06-28 09:02:20 +0800 | [diff] [blame] | 297 | #ifdef CONFIG_DEBUG_TLBFLUSH |
| 298 | static ssize_t tlbflush_read_file(struct file *file, char __user *user_buf, |
| 299 | size_t count, loff_t *ppos) |
| 300 | { |
| 301 | char buf[32]; |
| 302 | unsigned int len; |
| 303 | |
| 304 | len = sprintf(buf, "%hd\n", tlb_flushall_shift); |
| 305 | return simple_read_from_buffer(user_buf, count, ppos, buf, len); |
| 306 | } |
| 307 | |
| 308 | static ssize_t tlbflush_write_file(struct file *file, |
| 309 | const char __user *user_buf, size_t count, loff_t *ppos) |
| 310 | { |
| 311 | char buf[32]; |
| 312 | ssize_t len; |
| 313 | s8 shift; |
| 314 | |
| 315 | len = min(count, sizeof(buf) - 1); |
| 316 | if (copy_from_user(buf, user_buf, len)) |
| 317 | return -EFAULT; |
| 318 | |
| 319 | buf[len] = '\0'; |
| 320 | if (kstrtos8(buf, 0, &shift)) |
| 321 | return -EINVAL; |
| 322 | |
| 323 | if (shift > 64) |
| 324 | return -EINVAL; |
| 325 | |
| 326 | tlb_flushall_shift = shift; |
| 327 | return count; |
| 328 | } |
| 329 | |
| 330 | static const struct file_operations fops_tlbflush = { |
| 331 | .read = tlbflush_read_file, |
| 332 | .write = tlbflush_write_file, |
| 333 | .llseek = default_llseek, |
| 334 | }; |
| 335 | |
| 336 | static int __cpuinit create_tlb_flushall_shift(void) |
| 337 | { |
| 338 | if (cpu_has_invlpg) { |
| 339 | debugfs_create_file("tlb_flushall_shift", S_IRUSR | S_IWUSR, |
| 340 | arch_debugfs_dir, NULL, &fops_tlbflush); |
| 341 | } |
| 342 | return 0; |
| 343 | } |
| 344 | late_initcall(create_tlb_flushall_shift); |
| 345 | #endif |