blob: 87060ad6829d7851f99fc09e1242971f5b6dad0d [file] [log] [blame]
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +03001# IOMMU_API always gets selected by whoever wants it.
2config IOMMU_API
3 bool
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +03004
Joerg Roedel68255b62011-06-14 15:51:54 +02005menuconfig IOMMU_SUPPORT
6 bool "IOMMU Hardware Support"
7 default y
8 ---help---
9 Say Y here if you want to compile device drivers for IO Memory
10 Management Units into the kernel. These devices usually allow to
11 remap DMA requests and/or remap interrupts from other devices on the
12 system.
13
14if IOMMU_SUPPORT
15
Will Deaconfdb1d7b2014-11-14 17:16:49 +000016menu "Generic IOMMU Pagetable Support"
17
18# Selected by the actual pagetable implementations
19config IOMMU_IO_PGTABLE
20 bool
21
Will Deacone1d3c0f2014-11-14 17:18:23 +000022config IOMMU_IO_PGTABLE_LPAE
23 bool "ARMv7/v8 Long Descriptor Format"
24 select IOMMU_IO_PGTABLE
25 help
26 Enable support for the ARM long descriptor pagetable format.
27 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
28 sizes at both stage-1 and stage-2, as well as address spaces
29 up to 48-bits in size.
30
Will Deaconfe4b9912014-11-17 23:31:12 +000031config IOMMU_IO_PGTABLE_LPAE_SELFTEST
32 bool "LPAE selftests"
33 depends on IOMMU_IO_PGTABLE_LPAE
34 help
35 Enable self-tests for LPAE page table allocator. This performs
36 a series of page-table consistency checks during boot.
37
38 If unsure, say N here.
39
Will Deaconfdb1d7b2014-11-14 17:16:49 +000040endmenu
41
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030042config OF_IOMMU
43 def_bool y
Will Deacon7eba1d52014-08-27 16:20:32 +010044 depends on OF && IOMMU_API
Hiroshi Doyu4e0ee782012-06-25 14:23:54 +030045
Varun Sethi695093e2013-07-15 10:20:57 +053046config FSL_PAMU
47 bool "Freescale IOMMU support"
48 depends on PPC_E500MC
49 select IOMMU_API
50 select GENERIC_ALLOCATOR
51 help
52 Freescale PAMU support. PAMU is the IOMMU present on Freescale QorIQ platforms.
53 PAMU can authorize memory access, remap the memory address, and remap I/O
54 transaction types.
55
Ohad Ben-Cohenb10f1272011-06-02 03:20:08 +030056# MSM IOMMU support
57config MSM_IOMMU
58 bool "MSM IOMMU Support"
59 depends on ARCH_MSM8X60 || ARCH_MSM8960
60 select IOMMU_API
61 help
62 Support for the IOMMUs found on certain Qualcomm SOCs.
63 These IOMMUs allow virtualization of the address space used by most
64 cores within the multimedia subsystem.
65
66 If unsure, say N here.
67
68config IOMMU_PGTABLES_L2
69 def_bool y
70 depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030071
72# AMD IOMMU support
73config AMD_IOMMU
74 bool "AMD IOMMU support"
75 select SWIOTLB
76 select PCI_MSI
Joerg Roedel52815b72011-11-17 17:24:28 +010077 select PCI_ATS
78 select PCI_PRI
79 select PCI_PASID
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030080 select IOMMU_API
Thomas Petazzoni0dbc6072013-10-03 11:59:14 +020081 depends on X86_64 && PCI && ACPI
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030082 ---help---
83 With this option you can enable support for AMD IOMMU hardware in
84 your system. An IOMMU is a hardware component which provides
85 remapping of DMA memory accesses from devices. With an AMD IOMMU you
Masanari Iida59bf8962012-04-18 00:01:21 +090086 can isolate the DMA memory of different devices and protect the
Ohad Ben-Cohen29b68412011-06-05 18:22:18 +030087 system from misbehaving device drivers or hardware.
88
89 You can find out if your system has an AMD IOMMU if you look into
90 your BIOS for an option to enable it or if you have an IVRS ACPI
91 table.
92
93config AMD_IOMMU_STATS
94 bool "Export AMD IOMMU statistics to debugfs"
95 depends on AMD_IOMMU
96 select DEBUG_FS
97 ---help---
98 This option enables code in the AMD IOMMU driver to collect various
99 statistics about whats happening in the driver and exports that
100 information to userspace via debugfs.
101 If unsure, say N.
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300102
Joerg Roedele3c495c2011-11-09 12:31:15 +0100103config AMD_IOMMU_V2
Kees Cooka446e212013-01-16 18:53:39 -0800104 tristate "AMD IOMMU Version 2 driver"
Borislav Petkove5cac322014-07-10 12:44:56 +0200105 depends on AMD_IOMMU
Joerg Roedel8736b2c2011-11-24 16:21:52 +0100106 select MMU_NOTIFIER
Joerg Roedele3c495c2011-11-09 12:31:15 +0100107 ---help---
108 This option enables support for the AMD IOMMUv2 features of the IOMMU
109 hardware. Select this option if you want to use devices that support
Masanari Iida59bf8962012-04-18 00:01:21 +0900110 the PCI PRI and PASID interface.
Joerg Roedele3c495c2011-11-09 12:31:15 +0100111
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300112# Intel IOMMU support
Suresh Siddhad3f13812011-08-23 17:05:25 -0700113config DMAR_TABLE
114 bool
115
116config INTEL_IOMMU
117 bool "Support for Intel IOMMU using DMA Remapping Devices"
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300118 depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC)
119 select IOMMU_API
Suresh Siddhad3f13812011-08-23 17:05:25 -0700120 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300121 help
122 DMA remapping (DMAR) devices support enables independent address
123 translations for Direct Memory Access (DMA) from devices.
124 These DMA remapping devices are reported via ACPI tables
125 and include PCI device scope covered by these DMA
126 remapping devices.
127
Suresh Siddhad3f13812011-08-23 17:05:25 -0700128config INTEL_IOMMU_DEFAULT_ON
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300129 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700130 prompt "Enable Intel DMA Remapping Devices by default"
131 depends on INTEL_IOMMU
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300132 help
133 Selecting this option will enable a DMAR device at boot time if
134 one is found. If this option is not selected, DMAR support can
135 be enabled by passing intel_iommu=on to the kernel.
136
Suresh Siddhad3f13812011-08-23 17:05:25 -0700137config INTEL_IOMMU_BROKEN_GFX_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300138 bool "Workaround broken graphics drivers (going away soon)"
Suresh Siddhad3f13812011-08-23 17:05:25 -0700139 depends on INTEL_IOMMU && BROKEN && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300140 ---help---
141 Current Graphics drivers tend to use physical address
142 for DMA and avoid using DMA APIs. Setting this config
143 option permits the IOMMU driver to set a unity map for
144 all the OS-visible memory. Hence the driver can continue
145 to use physical addresses for DMA, at least until this
146 option is removed in the 2.6.32 kernel.
147
Suresh Siddhad3f13812011-08-23 17:05:25 -0700148config INTEL_IOMMU_FLOPPY_WA
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300149 def_bool y
Suresh Siddhad3f13812011-08-23 17:05:25 -0700150 depends on INTEL_IOMMU && X86
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300151 ---help---
152 Floppy disk drivers are known to bypass DMA API calls
153 thereby failing to work when IOMMU is enabled. This
154 workaround will setup a 1:1 mapping for the first
155 16MiB to make floppy (an ISA device) work.
156
Suresh Siddhad3f13812011-08-23 17:05:25 -0700157config IRQ_REMAP
Kees Cooka446e212013-01-16 18:53:39 -0800158 bool "Support for Interrupt Remapping"
159 depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI
Suresh Siddhad3f13812011-08-23 17:05:25 -0700160 select DMAR_TABLE
Ohad Ben-Cohen166e9272011-06-10 21:42:27 +0300161 ---help---
162 Supports Interrupt remapping for IO-APIC and MSI devices.
163 To use x2apic mode in the CPU's which support x2APIC enhancements or
164 to support platforms with CPU's having > 8 bit APIC ID, say Y.
Joerg Roedel68255b62011-06-14 15:51:54 +0200165
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300166# OMAP IOMMU support
167config OMAP_IOMMU
168 bool "OMAP IOMMU Support"
Arnd Bergmannae191582013-03-05 23:16:48 +0100169 depends on ARCH_OMAP2PLUS
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300170 select IOMMU_API
171
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300172config OMAP_IOMMU_DEBUG
Suman Anna61c75352014-10-22 17:22:30 -0500173 bool "Export OMAP IOMMU internals in DebugFS"
174 depends on OMAP_IOMMU && DEBUG_FS
175 ---help---
176 Select this to see extensive information about
177 the internal state of OMAP IOMMU in debugfs.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300178
Suman Anna61c75352014-10-22 17:22:30 -0500179 Say N unless you know you need this.
Ohad Ben-Cohenfcf3a6e2011-08-15 23:21:41 +0300180
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800181config ROCKCHIP_IOMMU
182 bool "Rockchip IOMMU Support"
Joerg Roedel11175882014-11-03 18:16:56 +0100183 depends on ARM
184 depends on ARCH_ROCKCHIP || COMPILE_TEST
Daniel Kurtzc68a2922014-11-03 10:53:27 +0800185 select IOMMU_API
186 select ARM_DMA_USE_IOMMU
187 help
188 Support for IOMMUs found on Rockchip rk32xx SOCs.
189 These IOMMUs allow virtualization of the address space used by most
190 cores within the multimedia subsystem.
191 Say Y here if you are using a Rockchip SoC that includes an IOMMU
192 device.
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300193
Hiroshi DOYUd53e54b2011-11-16 17:36:37 +0200194config TEGRA_IOMMU_GART
195 bool "Tegra GART IOMMU Support"
196 depends on ARCH_TEGRA_2x_SOC
197 select IOMMU_API
198 help
199 Enables support for remapping discontiguous physical memory
200 shared with the operating system into contiguous I/O virtual
201 space through the GART (Graphics Address Relocation Table)
202 hardware included on Tegra SoCs.
203
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200204config TEGRA_IOMMU_SMMU
Thierry Reding89184652014-04-16 09:24:44 +0200205 bool "NVIDIA Tegra SMMU Support"
206 depends on ARCH_TEGRA
207 depends on TEGRA_AHB
208 depends on TEGRA_MC
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200209 select IOMMU_API
210 help
Thierry Reding89184652014-04-16 09:24:44 +0200211 This driver supports the IOMMU hardware (SMMU) found on NVIDIA Tegra
212 SoCs (Tegra30 up to Tegra124).
Hiroshi DOYU7a31f6f2011-11-17 07:31:31 +0200213
KyongHo Cho2a965362012-05-12 05:56:09 +0900214config EXYNOS_IOMMU
215 bool "Exynos IOMMU Support"
Mark Brown20911ce2014-12-15 15:54:42 +0000216 depends on ARCH_EXYNOS && ARM
KyongHo Cho2a965362012-05-12 05:56:09 +0900217 select IOMMU_API
Tushar Behera4802c1d2014-07-04 15:01:08 +0530218 select ARM_DMA_USE_IOMMU
KyongHo Cho2a965362012-05-12 05:56:09 +0900219 help
Sachin Kamat5455d702014-05-22 09:50:55 +0530220 Support for the IOMMU (System MMU) of Samsung Exynos application
221 processor family. This enables H/W multimedia accelerators to see
222 non-linear physical memory chunks as linear memory in their
223 address space.
KyongHo Cho2a965362012-05-12 05:56:09 +0900224
225 If unsure, say N here.
226
227config EXYNOS_IOMMU_DEBUG
228 bool "Debugging log for Exynos IOMMU"
229 depends on EXYNOS_IOMMU
230 help
231 Select this to see the detailed log message that shows what
Sachin Kamat5455d702014-05-22 09:50:55 +0530232 happens in the IOMMU driver.
KyongHo Cho2a965362012-05-12 05:56:09 +0900233
Sachin Kamat5455d702014-05-22 09:50:55 +0530234 Say N unless you need kernel log message for IOMMU debugging.
KyongHo Cho2a965362012-05-12 05:56:09 +0900235
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900236config SHMOBILE_IPMMU
237 bool
238
239config SHMOBILE_IPMMU_TLB
240 bool
241
242config SHMOBILE_IOMMU
243 bool "IOMMU for Renesas IPMMU/IPMMUI"
244 default n
Linus Torvaldsf63c4822013-11-15 18:57:42 -0800245 depends on ARM
Paul Bolleb8354432014-02-08 22:21:54 +0100246 depends on ARCH_SHMOBILE || COMPILE_TEST
Hideki EIRAKUc2c460f2013-01-21 19:54:26 +0900247 select IOMMU_API
248 select ARM_DMA_USE_IOMMU
249 select SHMOBILE_IPMMU
250 select SHMOBILE_IPMMU_TLB
251 help
252 Support for Renesas IPMMU/IPMMUI. This option enables
253 remapping of DMA memory accesses from all of the IP blocks
254 on the ICB.
255
256 Warning: Drivers (including userspace drivers of UIO
257 devices) of the IP blocks on the ICB *must* use addresses
258 allocated from the IPMMU (iova) for DMA with this option
259 enabled.
260
261 If unsure, say N.
262
263choice
264 prompt "IPMMU/IPMMUI address space size"
265 default SHMOBILE_IOMMU_ADDRSIZE_2048MB
266 depends on SHMOBILE_IOMMU
267 help
268 This option sets IPMMU/IPMMUI address space size by
269 adjusting the 1st level page table size. The page table size
270 is calculated as follows:
271
272 page table size = number of page table entries * 4 bytes
273 number of page table entries = address space size / 1 MiB
274
275 For example, when the address space size is 2048 MiB, the
276 1st level page table size is 8192 bytes.
277
278 config SHMOBILE_IOMMU_ADDRSIZE_2048MB
279 bool "2 GiB"
280
281 config SHMOBILE_IOMMU_ADDRSIZE_1024MB
282 bool "1 GiB"
283
284 config SHMOBILE_IOMMU_ADDRSIZE_512MB
285 bool "512 MiB"
286
287 config SHMOBILE_IOMMU_ADDRSIZE_256MB
288 bool "256 MiB"
289
290 config SHMOBILE_IOMMU_ADDRSIZE_128MB
291 bool "128 MiB"
292
293 config SHMOBILE_IOMMU_ADDRSIZE_64MB
294 bool "64 MiB"
295
296 config SHMOBILE_IOMMU_ADDRSIZE_32MB
297 bool "32 MiB"
298
299endchoice
300
301config SHMOBILE_IOMMU_L1SIZE
302 int
303 default 8192 if SHMOBILE_IOMMU_ADDRSIZE_2048MB
304 default 4096 if SHMOBILE_IOMMU_ADDRSIZE_1024MB
305 default 2048 if SHMOBILE_IOMMU_ADDRSIZE_512MB
306 default 1024 if SHMOBILE_IOMMU_ADDRSIZE_256MB
307 default 512 if SHMOBILE_IOMMU_ADDRSIZE_128MB
308 default 256 if SHMOBILE_IOMMU_ADDRSIZE_64MB
309 default 128 if SHMOBILE_IOMMU_ADDRSIZE_32MB
310
Laurent Pinchartd25a2a12014-04-02 12:47:37 +0200311config IPMMU_VMSA
312 bool "Renesas VMSA-compatible IPMMU"
313 depends on ARM_LPAE
314 depends on ARCH_SHMOBILE || COMPILE_TEST
315 select IOMMU_API
316 select ARM_DMA_USE_IOMMU
317 help
318 Support for the Renesas VMSA-compatible IPMMU Renesas found in the
319 R-Mobile APE6 and R-Car H2/M2 SoCs.
320
321 If unsure, say N.
322
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000323config SPAPR_TCE_IOMMU
324 bool "sPAPR TCE IOMMU Support"
Alexey Kardashevskiy5b251992013-05-21 13:33:11 +1000325 depends on PPC_POWERNV || PPC_PSERIES
Alexey Kardashevskiy4e13c1a2013-05-21 13:33:09 +1000326 select IOMMU_API
327 help
328 Enables bits of IOMMU API required by VFIO. The iommu_ops
329 is not implemented as it is not necessary for VFIO.
330
Will Deacon45ae7cf2013-06-24 18:31:25 +0100331config ARM_SMMU
332 bool "ARM Ltd. System MMU (SMMU) Support"
Will Deacon518f7132014-11-14 17:17:54 +0000333 depends on ARM64 || ARM
Will Deacon45ae7cf2013-06-24 18:31:25 +0100334 select IOMMU_API
Will Deacon518f7132014-11-14 17:17:54 +0000335 select IOMMU_IO_PGTABLE_LPAE
Will Deacon45ae7cf2013-06-24 18:31:25 +0100336 select ARM_DMA_USE_IOMMU if ARM
337 help
338 Support for implementations of the ARM System MMU architecture
Will Deacon518f7132014-11-14 17:17:54 +0000339 versions 1 and 2.
Will Deacon45ae7cf2013-06-24 18:31:25 +0100340
341 Say Y here if your SoC includes an IOMMU device implementing
342 the ARM SMMU architecture.
343
Ohad Ben-Cohenab493a02011-06-02 02:48:05 +0300344endif # IOMMU_SUPPORT