Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 1 | /******************************************************************************* |
| 2 | |
| 3 | Intel(R) Gigabit Ethernet Linux driver |
Alexander Duyck | 86d5d38 | 2009-02-06 23:23:12 +0000 | [diff] [blame] | 4 | Copyright(c) 2007-2009 Intel Corporation. |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 5 | |
| 6 | This program is free software; you can redistribute it and/or modify it |
| 7 | under the terms and conditions of the GNU General Public License, |
| 8 | version 2, as published by the Free Software Foundation. |
| 9 | |
| 10 | This program is distributed in the hope it will be useful, but WITHOUT |
| 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| 12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| 13 | more details. |
| 14 | |
| 15 | You should have received a copy of the GNU General Public License along with |
| 16 | this program; if not, write to the Free Software Foundation, Inc., |
| 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
| 18 | |
| 19 | The full GNU General Public License is included in this distribution in |
| 20 | the file called "COPYING". |
| 21 | |
| 22 | Contact Information: |
| 23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> |
| 24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 |
| 25 | |
| 26 | *******************************************************************************/ |
| 27 | |
| 28 | |
| 29 | /* Linux PRO/1000 Ethernet Driver main header file */ |
| 30 | |
| 31 | #ifndef _IGB_H_ |
| 32 | #define _IGB_H_ |
| 33 | |
| 34 | #include "e1000_mac.h" |
| 35 | #include "e1000_82575.h" |
| 36 | |
Patrick Ohly | 38c845c | 2009-02-12 05:03:41 +0000 | [diff] [blame] | 37 | #include <linux/clocksource.h> |
Patrick Ohly | 33af6bc | 2009-02-12 05:03:43 +0000 | [diff] [blame] | 38 | #include <linux/timecompare.h> |
| 39 | #include <linux/net_tstamp.h> |
Patrick Ohly | 38c845c | 2009-02-12 05:03:41 +0000 | [diff] [blame] | 40 | |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 41 | struct igb_adapter; |
| 42 | |
Alexander Duyck | 6eb5a7f | 2008-07-08 15:14:44 -0700 | [diff] [blame] | 43 | /* ((1000000000ns / (6000ints/s * 1024ns)) << 2 = 648 */ |
| 44 | #define IGB_START_ITR 648 |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 45 | |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 46 | /* TX/RX descriptor defines */ |
| 47 | #define IGB_DEFAULT_TXD 256 |
| 48 | #define IGB_MIN_TXD 80 |
| 49 | #define IGB_MAX_TXD 4096 |
| 50 | |
| 51 | #define IGB_DEFAULT_RXD 256 |
| 52 | #define IGB_MIN_RXD 80 |
| 53 | #define IGB_MAX_RXD 4096 |
| 54 | |
| 55 | #define IGB_DEFAULT_ITR 3 /* dynamic */ |
| 56 | #define IGB_MAX_ITR_USECS 10000 |
| 57 | #define IGB_MIN_ITR_USECS 10 |
Alexander Duyck | 047e003 | 2009-10-27 15:49:27 +0000 | [diff] [blame] | 58 | #define NON_Q_VECTORS 1 |
| 59 | #define MAX_Q_VECTORS 8 |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 60 | |
| 61 | /* Transmit and receive queues */ |
Alexander Duyck | 1bfaf07 | 2009-02-19 20:39:23 -0800 | [diff] [blame] | 62 | #define IGB_MAX_RX_QUEUES (adapter->vfs_allocated_count ? \ |
| 63 | (adapter->vfs_allocated_count > 6 ? 1 : 2) : 4) |
| 64 | #define IGB_MAX_TX_QUEUES IGB_MAX_RX_QUEUES |
| 65 | #define IGB_ABS_MAX_TX_QUEUES 4 |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 66 | |
Alexander Duyck | 4ae196d | 2009-02-19 20:40:07 -0800 | [diff] [blame] | 67 | #define IGB_MAX_VF_MC_ENTRIES 30 |
| 68 | #define IGB_MAX_VF_FUNCTIONS 8 |
| 69 | #define IGB_MAX_VFTA_ENTRIES 128 |
| 70 | |
| 71 | struct vf_data_storage { |
| 72 | unsigned char vf_mac_addresses[ETH_ALEN]; |
| 73 | u16 vf_mc_hashes[IGB_MAX_VF_MC_ENTRIES]; |
| 74 | u16 num_vf_mc_hashes; |
Alexander Duyck | ae641bd | 2009-09-03 14:49:33 +0000 | [diff] [blame] | 75 | u16 vlans_enabled; |
Alexander Duyck | f2ca0db | 2009-10-27 23:46:57 +0000 | [diff] [blame^] | 76 | u32 flags; |
| 77 | unsigned long last_nack; |
Alexander Duyck | 4ae196d | 2009-02-19 20:40:07 -0800 | [diff] [blame] | 78 | }; |
| 79 | |
Alexander Duyck | f2ca0db | 2009-10-27 23:46:57 +0000 | [diff] [blame^] | 80 | #define IGB_VF_FLAG_CTS 0x00000001 /* VF is clear to send data */ |
| 81 | |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 82 | /* RX descriptor control thresholds. |
| 83 | * PTHRESH - MAC will consider prefetch if it has fewer than this number of |
| 84 | * descriptors available in its onboard memory. |
| 85 | * Setting this to 0 disables RX descriptor prefetch. |
| 86 | * HTHRESH - MAC will only prefetch if there are at least this many descriptors |
| 87 | * available in host memory. |
| 88 | * If PTHRESH is 0, this should also be 0. |
| 89 | * WTHRESH - RX descriptor writeback threshold - MAC will delay writing back |
| 90 | * descriptors until either it has this many to write back, or the |
| 91 | * ITR timer expires. |
| 92 | */ |
Alexander Duyck | 85b430b | 2009-10-27 15:50:29 +0000 | [diff] [blame] | 93 | #define IGB_RX_PTHRESH (hw->mac.type <= e1000_82576 ? 16 : 8) |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 94 | #define IGB_RX_HTHRESH 8 |
| 95 | #define IGB_RX_WTHRESH 1 |
Alexander Duyck | 85b430b | 2009-10-27 15:50:29 +0000 | [diff] [blame] | 96 | #define IGB_TX_PTHRESH 8 |
| 97 | #define IGB_TX_HTHRESH 1 |
| 98 | #define IGB_TX_WTHRESH ((hw->mac.type == e1000_82576 && \ |
| 99 | adapter->msix_entries) ? 0 : 16) |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 100 | |
| 101 | /* this is the size past which hardware will drop packets when setting LPE=0 */ |
| 102 | #define MAXIMUM_ETHERNET_VLAN_SIZE 1522 |
| 103 | |
| 104 | /* Supported Rx Buffer Sizes */ |
| 105 | #define IGB_RXBUFFER_128 128 /* Used for packet split */ |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 106 | #define IGB_RXBUFFER_1024 1024 |
| 107 | #define IGB_RXBUFFER_2048 2048 |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 108 | #define IGB_RXBUFFER_16384 16384 |
| 109 | |
Alexander Duyck | e173952 | 2009-02-19 20:39:44 -0800 | [diff] [blame] | 110 | #define MAX_STD_JUMBO_FRAME_SIZE 9234 |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 111 | |
| 112 | /* How many Tx Descriptors do we need to call netif_wake_queue ? */ |
| 113 | #define IGB_TX_QUEUE_WAKE 16 |
| 114 | /* How many Rx Buffers do we bundle into one write to the hardware ? */ |
| 115 | #define IGB_RX_BUFFER_WRITE 16 /* Must be power of 2 */ |
| 116 | |
| 117 | #define AUTO_ALL_MODES 0 |
| 118 | #define IGB_EEPROM_APME 0x0400 |
| 119 | |
| 120 | #ifndef IGB_MASTER_SLAVE |
| 121 | /* Switch to override PHY master/slave setting */ |
| 122 | #define IGB_MASTER_SLAVE e1000_ms_hw_default |
| 123 | #endif |
| 124 | |
| 125 | #define IGB_MNG_VLAN_NONE -1 |
| 126 | |
| 127 | /* wrapper around a pointer to a socket buffer, |
| 128 | * so a DMA handle can be stored along with the buffer */ |
| 129 | struct igb_buffer { |
| 130 | struct sk_buff *skb; |
| 131 | dma_addr_t dma; |
| 132 | union { |
| 133 | /* TX */ |
| 134 | struct { |
| 135 | unsigned long time_stamp; |
Alexander Duyck | 0e014cb | 2008-12-26 01:33:18 -0800 | [diff] [blame] | 136 | u16 length; |
| 137 | u16 next_to_watch; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 138 | }; |
| 139 | /* RX */ |
| 140 | struct { |
| 141 | struct page *page; |
| 142 | u64 page_dma; |
Alexander Duyck | bf36c1a | 2008-07-08 15:11:40 -0700 | [diff] [blame] | 143 | unsigned int page_offset; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 144 | }; |
| 145 | }; |
| 146 | }; |
| 147 | |
Jesper Dangaard Brouer | 8c0ab70 | 2009-05-26 13:50:31 +0000 | [diff] [blame] | 148 | struct igb_tx_queue_stats { |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 149 | u64 packets; |
| 150 | u64 bytes; |
Alexander Duyck | 04a5fcaa | 2009-10-27 15:52:27 +0000 | [diff] [blame] | 151 | u64 restart_queue; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 152 | }; |
| 153 | |
Jesper Dangaard Brouer | 8c0ab70 | 2009-05-26 13:50:31 +0000 | [diff] [blame] | 154 | struct igb_rx_queue_stats { |
| 155 | u64 packets; |
| 156 | u64 bytes; |
| 157 | u64 drops; |
Alexander Duyck | 04a5fcaa | 2009-10-27 15:52:27 +0000 | [diff] [blame] | 158 | u64 csum_err; |
| 159 | u64 alloc_failed; |
Jesper Dangaard Brouer | 8c0ab70 | 2009-05-26 13:50:31 +0000 | [diff] [blame] | 160 | }; |
| 161 | |
Alexander Duyck | 047e003 | 2009-10-27 15:49:27 +0000 | [diff] [blame] | 162 | struct igb_q_vector { |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 163 | struct igb_adapter *adapter; /* backlink */ |
Alexander Duyck | 047e003 | 2009-10-27 15:49:27 +0000 | [diff] [blame] | 164 | struct igb_ring *rx_ring; |
| 165 | struct igb_ring *tx_ring; |
| 166 | struct napi_struct napi; |
| 167 | |
| 168 | u32 eims_value; |
| 169 | u16 cpu; |
| 170 | |
| 171 | u16 itr_val; |
| 172 | u8 set_itr; |
| 173 | u8 itr_shift; |
| 174 | void __iomem *itr_register; |
| 175 | |
| 176 | char name[IFNAMSIZ + 9]; |
| 177 | }; |
| 178 | |
| 179 | struct igb_ring { |
| 180 | struct igb_q_vector *q_vector; /* backlink to q_vector */ |
Alexander Duyck | e694e96 | 2009-10-27 15:53:06 +0000 | [diff] [blame] | 181 | struct net_device *netdev; /* back pointer to net_device */ |
Alexander Duyck | 8078529 | 2009-10-27 15:51:47 +0000 | [diff] [blame] | 182 | struct pci_dev *pdev; /* pci device for dma mapping */ |
Alexander Duyck | 047e003 | 2009-10-27 15:49:27 +0000 | [diff] [blame] | 183 | dma_addr_t dma; /* phys address of the ring */ |
Alexander Duyck | e694e96 | 2009-10-27 15:53:06 +0000 | [diff] [blame] | 184 | void *desc; /* descriptor ring memory */ |
Alexander Duyck | 047e003 | 2009-10-27 15:49:27 +0000 | [diff] [blame] | 185 | unsigned int size; /* length of desc. ring in bytes */ |
| 186 | unsigned int count; /* number of desc. in the ring */ |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 187 | u16 next_to_use; |
| 188 | u16 next_to_clean; |
Alexander Duyck | fce99e3 | 2009-10-27 15:51:27 +0000 | [diff] [blame] | 189 | void __iomem *head; |
| 190 | void __iomem *tail; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 191 | struct igb_buffer *buffer_info; /* array of buffer info structs */ |
| 192 | |
Alexander Duyck | 047e003 | 2009-10-27 15:49:27 +0000 | [diff] [blame] | 193 | u8 queue_index; |
| 194 | u8 reg_idx; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 195 | |
| 196 | unsigned int total_bytes; |
| 197 | unsigned int total_packets; |
| 198 | |
Alexander Duyck | 85ad76b | 2009-10-27 15:52:46 +0000 | [diff] [blame] | 199 | u32 flags; |
| 200 | |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 201 | union { |
| 202 | /* TX */ |
| 203 | struct { |
Jesper Dangaard Brouer | 8c0ab70 | 2009-05-26 13:50:31 +0000 | [diff] [blame] | 204 | struct igb_tx_queue_stats tx_stats; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 205 | bool detect_tx_hung; |
| 206 | }; |
| 207 | /* RX */ |
| 208 | struct { |
Jesper Dangaard Brouer | 8c0ab70 | 2009-05-26 13:50:31 +0000 | [diff] [blame] | 209 | struct igb_rx_queue_stats rx_stats; |
Alexander Duyck | 4c84485 | 2009-10-27 15:52:07 +0000 | [diff] [blame] | 210 | u32 rx_buffer_len; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 211 | }; |
| 212 | }; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 213 | }; |
| 214 | |
Alexander Duyck | 85ad76b | 2009-10-27 15:52:46 +0000 | [diff] [blame] | 215 | #define IGB_RING_FLAG_RX_CSUM 0x00000001 /* RX CSUM enabled */ |
| 216 | #define IGB_RING_FLAG_RX_SCTP_CSUM 0x00000002 /* SCTP CSUM offload enabled */ |
| 217 | |
| 218 | #define IGB_RING_FLAG_TX_CTX_IDX 0x00000001 /* HW requires context index */ |
| 219 | |
| 220 | #define IGB_ADVTXD_DCMD (E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS) |
| 221 | |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 222 | #define E1000_RX_DESC_ADV(R, i) \ |
| 223 | (&(((union e1000_adv_rx_desc *)((R).desc))[i])) |
| 224 | #define E1000_TX_DESC_ADV(R, i) \ |
| 225 | (&(((union e1000_adv_tx_desc *)((R).desc))[i])) |
| 226 | #define E1000_TX_CTXTDESC_ADV(R, i) \ |
| 227 | (&(((struct e1000_adv_tx_context_desc *)((R).desc))[i])) |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 228 | |
Alexander Duyck | d7ee5b3 | 2009-10-27 15:54:23 +0000 | [diff] [blame] | 229 | /* igb_desc_unused - calculate if we have unused descriptors */ |
| 230 | static inline int igb_desc_unused(struct igb_ring *ring) |
| 231 | { |
| 232 | if (ring->next_to_clean > ring->next_to_use) |
| 233 | return ring->next_to_clean - ring->next_to_use - 1; |
| 234 | |
| 235 | return ring->count + ring->next_to_clean - ring->next_to_use - 1; |
| 236 | } |
| 237 | |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 238 | /* board specific private data structure */ |
| 239 | |
| 240 | struct igb_adapter { |
| 241 | struct timer_list watchdog_timer; |
| 242 | struct timer_list phy_info_timer; |
| 243 | struct vlan_group *vlgrp; |
| 244 | u16 mng_vlan_id; |
| 245 | u32 bd_number; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 246 | u32 wol; |
| 247 | u32 en_mng_pt; |
| 248 | u16 link_speed; |
| 249 | u16 link_duplex; |
| 250 | unsigned int total_tx_bytes; |
| 251 | unsigned int total_tx_packets; |
| 252 | unsigned int total_rx_bytes; |
| 253 | unsigned int total_rx_packets; |
| 254 | /* Interrupt Throttle Rate */ |
Alexander Duyck | 4fc82ad | 2009-10-27 23:45:42 +0000 | [diff] [blame] | 255 | u32 rx_itr_setting; |
| 256 | u32 tx_itr_setting; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 257 | u16 tx_itr; |
| 258 | u16 rx_itr; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 259 | |
| 260 | struct work_struct reset_task; |
| 261 | struct work_struct watchdog_task; |
| 262 | bool fc_autoneg; |
| 263 | u8 tx_timeout_factor; |
| 264 | struct timer_list blink_timer; |
| 265 | unsigned long led_status; |
| 266 | |
| 267 | /* TX */ |
| 268 | struct igb_ring *tx_ring; /* One per active queue */ |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 269 | unsigned long tx_queue_len; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 270 | u32 gotc; |
| 271 | u64 gotc_old; |
| 272 | u64 tpt_old; |
| 273 | u64 colc_old; |
| 274 | u32 tx_timeout_count; |
| 275 | |
| 276 | /* RX */ |
| 277 | struct igb_ring *rx_ring; /* One per active queue */ |
| 278 | int num_tx_queues; |
| 279 | int num_rx_queues; |
| 280 | |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 281 | u32 gorc; |
| 282 | u64 gorc_old; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 283 | u32 max_frame_size; |
| 284 | u32 min_frame_size; |
| 285 | |
| 286 | /* OS defined structs */ |
| 287 | struct net_device *netdev; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 288 | struct pci_dev *pdev; |
Patrick Ohly | 38c845c | 2009-02-12 05:03:41 +0000 | [diff] [blame] | 289 | struct cyclecounter cycles; |
| 290 | struct timecounter clock; |
Patrick Ohly | 33af6bc | 2009-02-12 05:03:43 +0000 | [diff] [blame] | 291 | struct timecompare compare; |
| 292 | struct hwtstamp_config hwtstamp_config; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 293 | |
| 294 | /* structs defined in e1000_hw.h */ |
| 295 | struct e1000_hw hw; |
| 296 | struct e1000_hw_stats stats; |
| 297 | struct e1000_phy_info phy_info; |
| 298 | struct e1000_phy_stats phy_stats; |
| 299 | |
| 300 | u32 test_icr; |
| 301 | struct igb_ring test_tx_ring; |
| 302 | struct igb_ring test_rx_ring; |
| 303 | |
| 304 | int msg_enable; |
Alexander Duyck | 047e003 | 2009-10-27 15:49:27 +0000 | [diff] [blame] | 305 | |
| 306 | unsigned int num_q_vectors; |
| 307 | struct igb_q_vector *q_vector[MAX_Q_VECTORS]; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 308 | struct msix_entry *msix_entries; |
| 309 | u32 eims_enable_mask; |
PJ Waskiewicz | 844290e | 2008-06-27 11:00:39 -0700 | [diff] [blame] | 310 | u32 eims_other; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 311 | |
| 312 | /* to not mess up cache alignment, always add to the bottom */ |
| 313 | unsigned long state; |
Alexander Duyck | 7dfc16f | 2008-07-08 15:10:46 -0700 | [diff] [blame] | 314 | unsigned int flags; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 315 | u32 eeprom_wol; |
Taku Izumi | 42bfd33a | 2008-06-20 12:10:30 +0900 | [diff] [blame] | 316 | |
Alexander Duyck | 1bfaf07 | 2009-02-19 20:39:23 -0800 | [diff] [blame] | 317 | struct igb_ring *multi_tx_table[IGB_ABS_MAX_TX_QUEUES]; |
Alexander Duyck | 68fd991 | 2008-11-20 00:48:10 -0800 | [diff] [blame] | 318 | unsigned int tx_ring_count; |
| 319 | unsigned int rx_ring_count; |
Alexander Duyck | 1bfaf07 | 2009-02-19 20:39:23 -0800 | [diff] [blame] | 320 | unsigned int vfs_allocated_count; |
Alexander Duyck | 4ae196d | 2009-02-19 20:40:07 -0800 | [diff] [blame] | 321 | struct vf_data_storage *vf_data; |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 322 | }; |
| 323 | |
Alexander Duyck | 7dfc16f | 2008-07-08 15:10:46 -0700 | [diff] [blame] | 324 | #define IGB_FLAG_HAS_MSI (1 << 0) |
Alexander Duyck | cbd347a | 2009-02-15 23:59:44 -0800 | [diff] [blame] | 325 | #define IGB_FLAG_DCA_ENABLED (1 << 1) |
| 326 | #define IGB_FLAG_QUAD_PORT_A (1 << 2) |
Alexander Duyck | 4fc82ad | 2009-10-27 23:45:42 +0000 | [diff] [blame] | 327 | #define IGB_FLAG_QUEUE_PAIRS (1 << 3) |
Alexander Duyck | 7dfc16f | 2008-07-08 15:10:46 -0700 | [diff] [blame] | 328 | |
Alexander Duyck | c5b9bd5 | 2009-10-27 23:46:01 +0000 | [diff] [blame] | 329 | #define IGB_82576_TSYNC_SHIFT 19 |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 330 | enum e1000_state_t { |
| 331 | __IGB_TESTING, |
| 332 | __IGB_RESETTING, |
| 333 | __IGB_DOWN |
| 334 | }; |
| 335 | |
| 336 | enum igb_boards { |
| 337 | board_82575, |
| 338 | }; |
| 339 | |
| 340 | extern char igb_driver_name[]; |
| 341 | extern char igb_driver_version[]; |
| 342 | |
| 343 | extern char *igb_get_hw_dev_name(struct e1000_hw *hw); |
| 344 | extern int igb_up(struct igb_adapter *); |
| 345 | extern void igb_down(struct igb_adapter *); |
| 346 | extern void igb_reinit_locked(struct igb_adapter *); |
| 347 | extern void igb_reset(struct igb_adapter *); |
| 348 | extern int igb_set_spd_dplx(struct igb_adapter *, u16); |
Alexander Duyck | 8078529 | 2009-10-27 15:51:47 +0000 | [diff] [blame] | 349 | extern int igb_setup_tx_resources(struct igb_ring *); |
| 350 | extern int igb_setup_rx_resources(struct igb_ring *); |
Alexander Duyck | 68fd991 | 2008-11-20 00:48:10 -0800 | [diff] [blame] | 351 | extern void igb_free_tx_resources(struct igb_ring *); |
| 352 | extern void igb_free_rx_resources(struct igb_ring *); |
Alexander Duyck | d7ee5b3 | 2009-10-27 15:54:23 +0000 | [diff] [blame] | 353 | extern void igb_configure_tx_ring(struct igb_adapter *, struct igb_ring *); |
| 354 | extern void igb_configure_rx_ring(struct igb_adapter *, struct igb_ring *); |
| 355 | extern void igb_setup_tctl(struct igb_adapter *); |
| 356 | extern void igb_setup_rctl(struct igb_adapter *); |
Alexander Duyck | b1a436c | 2009-10-27 15:54:43 +0000 | [diff] [blame] | 357 | extern netdev_tx_t igb_xmit_frame_ring_adv(struct sk_buff *, struct igb_ring *); |
| 358 | extern void igb_unmap_and_free_tx_resource(struct igb_ring *, |
| 359 | struct igb_buffer *); |
Alexander Duyck | d7ee5b3 | 2009-10-27 15:54:23 +0000 | [diff] [blame] | 360 | extern void igb_alloc_rx_buffers_adv(struct igb_ring *, int); |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 361 | extern void igb_update_stats(struct igb_adapter *); |
| 362 | extern void igb_set_ethtool_ops(struct net_device *); |
| 363 | |
Alexander Duyck | f5f4cf0 | 2008-11-21 21:30:24 -0800 | [diff] [blame] | 364 | static inline s32 igb_reset_phy(struct e1000_hw *hw) |
| 365 | { |
Alexander Duyck | a8d2a0c | 2009-02-06 23:17:26 +0000 | [diff] [blame] | 366 | if (hw->phy.ops.reset) |
| 367 | return hw->phy.ops.reset(hw); |
Alexander Duyck | f5f4cf0 | 2008-11-21 21:30:24 -0800 | [diff] [blame] | 368 | |
| 369 | return 0; |
| 370 | } |
| 371 | |
| 372 | static inline s32 igb_read_phy_reg(struct e1000_hw *hw, u32 offset, u16 *data) |
| 373 | { |
Alexander Duyck | a8d2a0c | 2009-02-06 23:17:26 +0000 | [diff] [blame] | 374 | if (hw->phy.ops.read_reg) |
| 375 | return hw->phy.ops.read_reg(hw, offset, data); |
Alexander Duyck | f5f4cf0 | 2008-11-21 21:30:24 -0800 | [diff] [blame] | 376 | |
| 377 | return 0; |
| 378 | } |
| 379 | |
| 380 | static inline s32 igb_write_phy_reg(struct e1000_hw *hw, u32 offset, u16 data) |
| 381 | { |
Alexander Duyck | a8d2a0c | 2009-02-06 23:17:26 +0000 | [diff] [blame] | 382 | if (hw->phy.ops.write_reg) |
| 383 | return hw->phy.ops.write_reg(hw, offset, data); |
Alexander Duyck | f5f4cf0 | 2008-11-21 21:30:24 -0800 | [diff] [blame] | 384 | |
| 385 | return 0; |
| 386 | } |
| 387 | |
| 388 | static inline s32 igb_get_phy_info(struct e1000_hw *hw) |
| 389 | { |
| 390 | if (hw->phy.ops.get_phy_info) |
| 391 | return hw->phy.ops.get_phy_info(hw); |
| 392 | |
| 393 | return 0; |
| 394 | } |
| 395 | |
Auke Kok | 9d5c824 | 2008-01-24 02:22:38 -0800 | [diff] [blame] | 396 | #endif /* _IGB_H_ */ |