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Mike Turquette9d9f78e2012-03-15 23:11:20 -07001/*
2 * Copyright (C) 2011 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
3 * Copyright (C) 2011 Richard Zhao, Linaro <richard.zhao@linaro.org>
4 * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Adjustable divider clock implementation
11 */
12
13#include <linux/clk-provider.h>
14#include <linux/module.h>
15#include <linux/slab.h>
16#include <linux/io.h>
17#include <linux/err.h>
18#include <linux/string.h>
James Hogan1a3cd182013-01-15 10:28:05 +000019#include <linux/log2.h>
Mike Turquette9d9f78e2012-03-15 23:11:20 -070020
21/*
22 * DOC: basic adjustable divider clock that cannot gate
23 *
24 * Traits of this clock:
25 * prepare - clk_prepare only ensures that parents are prepared
26 * enable - clk_enable only ensures that parents are enabled
Tomi Valkeinenb11d2822014-02-13 12:03:59 +020027 * rate - rate is adjustable. clk->rate = DIV_ROUND_UP(parent->rate / divisor)
Mike Turquette9d9f78e2012-03-15 23:11:20 -070028 * parent - fixed parent. No clk_set_parent support
29 */
30
31#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
32
Stephen Boydbca96902015-01-19 18:05:29 -080033#define div_mask(width) ((1 << (width)) - 1)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053034
Rajendra Nayak357c3f02012-06-29 19:06:32 +053035static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
36{
37 unsigned int maxdiv = 0;
38 const struct clk_div_table *clkt;
39
40 for (clkt = table; clkt->div; clkt++)
41 if (clkt->div > maxdiv)
42 maxdiv = clkt->div;
43 return maxdiv;
44}
45
Maxime COQUELIN774b5142014-01-29 17:24:07 +010046static unsigned int _get_table_mindiv(const struct clk_div_table *table)
47{
48 unsigned int mindiv = UINT_MAX;
49 const struct clk_div_table *clkt;
50
51 for (clkt = table; clkt->div; clkt++)
52 if (clkt->div < mindiv)
53 mindiv = clkt->div;
54 return mindiv;
55}
56
Stephen Boydbca96902015-01-19 18:05:29 -080057static unsigned int _get_maxdiv(const struct clk_div_table *table, u8 width,
58 unsigned long flags)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053059{
Stephen Boydbca96902015-01-19 18:05:29 -080060 if (flags & CLK_DIVIDER_ONE_BASED)
61 return div_mask(width);
62 if (flags & CLK_DIVIDER_POWER_OF_TWO)
63 return 1 << div_mask(width);
64 if (table)
65 return _get_table_maxdiv(table);
66 return div_mask(width) + 1;
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053067}
68
Rajendra Nayak357c3f02012-06-29 19:06:32 +053069static unsigned int _get_table_div(const struct clk_div_table *table,
70 unsigned int val)
71{
72 const struct clk_div_table *clkt;
73
74 for (clkt = table; clkt->div; clkt++)
75 if (clkt->val == val)
76 return clkt->div;
77 return 0;
78}
79
Stephen Boydbca96902015-01-19 18:05:29 -080080static unsigned int _get_div(const struct clk_div_table *table,
81 unsigned int val, unsigned long flags)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053082{
Stephen Boydbca96902015-01-19 18:05:29 -080083 if (flags & CLK_DIVIDER_ONE_BASED)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053084 return val;
Stephen Boydbca96902015-01-19 18:05:29 -080085 if (flags & CLK_DIVIDER_POWER_OF_TWO)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053086 return 1 << val;
Stephen Boydbca96902015-01-19 18:05:29 -080087 if (table)
88 return _get_table_div(table, val);
Rajendra Nayak6d9252b2012-05-17 15:52:13 +053089 return val + 1;
90}
91
Rajendra Nayak357c3f02012-06-29 19:06:32 +053092static unsigned int _get_table_val(const struct clk_div_table *table,
93 unsigned int div)
94{
95 const struct clk_div_table *clkt;
96
97 for (clkt = table; clkt->div; clkt++)
98 if (clkt->div == div)
99 return clkt->val;
100 return 0;
101}
102
Stephen Boydbca96902015-01-19 18:05:29 -0800103static unsigned int _get_val(const struct clk_div_table *table,
104 unsigned int div, unsigned long flags)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530105{
Stephen Boydbca96902015-01-19 18:05:29 -0800106 if (flags & CLK_DIVIDER_ONE_BASED)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530107 return div;
Stephen Boydbca96902015-01-19 18:05:29 -0800108 if (flags & CLK_DIVIDER_POWER_OF_TWO)
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530109 return __ffs(div);
Stephen Boydbca96902015-01-19 18:05:29 -0800110 if (table)
111 return _get_table_val(table, div);
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530112 return div - 1;
113}
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700114
Stephen Boydbca96902015-01-19 18:05:29 -0800115unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
116 unsigned int val,
117 const struct clk_div_table *table,
118 unsigned long flags)
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700119{
Stephen Boydbca96902015-01-19 18:05:29 -0800120 unsigned int div;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700121
Stephen Boydbca96902015-01-19 18:05:29 -0800122 div = _get_div(table, val, flags);
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530123 if (!div) {
Stephen Boydbca96902015-01-19 18:05:29 -0800124 WARN(!(flags & CLK_DIVIDER_ALLOW_ZERO),
Soren Brinkmann056b20532013-04-02 15:36:56 -0700125 "%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
126 __clk_get_name(hw->clk));
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530127 return parent_rate;
128 }
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700129
Tomi Valkeinenb11d2822014-02-13 12:03:59 +0200130 return DIV_ROUND_UP(parent_rate, div);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700131}
Stephen Boydbca96902015-01-19 18:05:29 -0800132EXPORT_SYMBOL_GPL(divider_recalc_rate);
133
134static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
135 unsigned long parent_rate)
136{
137 struct clk_divider *divider = to_clk_divider(hw);
138 unsigned int val;
139
140 val = clk_readl(divider->reg) >> divider->shift;
141 val &= div_mask(divider->width);
142
143 return divider_recalc_rate(hw, parent_rate, val, divider->table,
144 divider->flags);
145}
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700146
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530147static bool _is_valid_table_div(const struct clk_div_table *table,
148 unsigned int div)
149{
150 const struct clk_div_table *clkt;
151
152 for (clkt = table; clkt->div; clkt++)
153 if (clkt->div == div)
154 return true;
155 return false;
156}
157
Stephen Boydbca96902015-01-19 18:05:29 -0800158static bool _is_valid_div(const struct clk_div_table *table, unsigned int div,
159 unsigned long flags)
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530160{
Stephen Boydbca96902015-01-19 18:05:29 -0800161 if (flags & CLK_DIVIDER_POWER_OF_TWO)
James Hogan1a3cd182013-01-15 10:28:05 +0000162 return is_power_of_2(div);
Stephen Boydbca96902015-01-19 18:05:29 -0800163 if (table)
164 return _is_valid_table_div(table, div);
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530165 return true;
166}
167
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100168static int _round_up_table(const struct clk_div_table *table, int div)
169{
170 const struct clk_div_table *clkt;
Maxime COQUELINfe52e752014-05-07 18:48:52 +0200171 int up = INT_MAX;
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100172
173 for (clkt = table; clkt->div; clkt++) {
174 if (clkt->div == div)
175 return clkt->div;
176 else if (clkt->div < div)
177 continue;
178
179 if ((clkt->div - div) < (up - div))
180 up = clkt->div;
181 }
182
183 return up;
184}
185
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100186static int _round_down_table(const struct clk_div_table *table, int div)
187{
188 const struct clk_div_table *clkt;
189 int down = _get_table_mindiv(table);
190
191 for (clkt = table; clkt->div; clkt++) {
192 if (clkt->div == div)
193 return clkt->div;
194 else if (clkt->div > div)
195 continue;
196
197 if ((div - clkt->div) < (div - down))
198 down = clkt->div;
199 }
200
201 return down;
202}
203
Stephen Boydbca96902015-01-19 18:05:29 -0800204static int _div_round_up(const struct clk_div_table *table,
205 unsigned long parent_rate, unsigned long rate,
206 unsigned long flags)
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100207{
208 int div = DIV_ROUND_UP(parent_rate, rate);
209
Stephen Boydbca96902015-01-19 18:05:29 -0800210 if (flags & CLK_DIVIDER_POWER_OF_TWO)
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100211 div = __roundup_pow_of_two(div);
Stephen Boydbca96902015-01-19 18:05:29 -0800212 if (table)
213 div = _round_up_table(table, div);
Maxime COQUELINdd23c2c2014-01-29 17:24:06 +0100214
215 return div;
216}
217
Stephen Boydbca96902015-01-19 18:05:29 -0800218static int _div_round_closest(const struct clk_div_table *table,
219 unsigned long parent_rate, unsigned long rate,
220 unsigned long flags)
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100221{
Uwe Kleine-König93155142015-02-21 11:40:25 +0100222 int up, down;
Uwe Kleine-König26bac952015-02-21 11:40:24 +0100223 unsigned long up_rate, down_rate;
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100224
Uwe Kleine-König93155142015-02-21 11:40:25 +0100225 up = DIV_ROUND_UP(parent_rate, rate);
226 down = parent_rate / rate;
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100227
Stephen Boydbca96902015-01-19 18:05:29 -0800228 if (flags & CLK_DIVIDER_POWER_OF_TWO) {
Uwe Kleine-König93155142015-02-21 11:40:25 +0100229 up = __roundup_pow_of_two(up);
230 down = __rounddown_pow_of_two(down);
Stephen Boydbca96902015-01-19 18:05:29 -0800231 } else if (table) {
Uwe Kleine-König93155142015-02-21 11:40:25 +0100232 up = _round_up_table(table, up);
233 down = _round_down_table(table, down);
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100234 }
235
Uwe Kleine-König26bac952015-02-21 11:40:24 +0100236 up_rate = DIV_ROUND_UP(parent_rate, up);
237 down_rate = DIV_ROUND_UP(parent_rate, down);
238
239 return (rate - up_rate) <= (down_rate - rate) ? up : down;
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100240}
241
Stephen Boydbca96902015-01-19 18:05:29 -0800242static int _div_round(const struct clk_div_table *table,
243 unsigned long parent_rate, unsigned long rate,
244 unsigned long flags)
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100245{
Stephen Boydbca96902015-01-19 18:05:29 -0800246 if (flags & CLK_DIVIDER_ROUND_CLOSEST)
247 return _div_round_closest(table, parent_rate, rate, flags);
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100248
Stephen Boydbca96902015-01-19 18:05:29 -0800249 return _div_round_up(table, parent_rate, rate, flags);
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100250}
251
Stephen Boydbca96902015-01-19 18:05:29 -0800252static bool _is_best_div(unsigned long rate, unsigned long now,
253 unsigned long best, unsigned long flags)
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100254{
Stephen Boydbca96902015-01-19 18:05:29 -0800255 if (flags & CLK_DIVIDER_ROUND_CLOSEST)
Maxime COQUELIN774b5142014-01-29 17:24:07 +0100256 return abs(rate - now) < abs(rate - best);
257
258 return now <= rate && now > best;
259}
260
Stephen Boydbca96902015-01-19 18:05:29 -0800261static int _next_div(const struct clk_div_table *table, int div,
262 unsigned long flags)
Maxime COQUELIN0e2de782014-01-29 17:24:08 +0100263{
264 div++;
265
Stephen Boydbca96902015-01-19 18:05:29 -0800266 if (flags & CLK_DIVIDER_POWER_OF_TWO)
Maxime COQUELIN0e2de782014-01-29 17:24:08 +0100267 return __roundup_pow_of_two(div);
Stephen Boydbca96902015-01-19 18:05:29 -0800268 if (table)
269 return _round_up_table(table, div);
Maxime COQUELIN0e2de782014-01-29 17:24:08 +0100270
271 return div;
272}
273
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700274static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
Stephen Boydbca96902015-01-19 18:05:29 -0800275 unsigned long *best_parent_rate,
276 const struct clk_div_table *table, u8 width,
277 unsigned long flags)
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700278{
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700279 int i, bestdiv = 0;
280 unsigned long parent_rate, best = 0, now, maxdiv;
Shawn Guo081c9022013-06-02 22:20:55 +0800281 unsigned long parent_rate_saved = *best_parent_rate;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700282
283 if (!rate)
284 rate = 1;
285
Stephen Boydbca96902015-01-19 18:05:29 -0800286 maxdiv = _get_maxdiv(table, width, flags);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700287
Shawn Guo81536e02012-04-12 20:50:17 +0800288 if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) {
289 parent_rate = *best_parent_rate;
Stephen Boydbca96902015-01-19 18:05:29 -0800290 bestdiv = _div_round(table, parent_rate, rate, flags);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700291 bestdiv = bestdiv == 0 ? 1 : bestdiv;
292 bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;
293 return bestdiv;
294 }
295
296 /*
297 * The maximum divider we can use without overflowing
298 * unsigned long in rate * i below
299 */
300 maxdiv = min(ULONG_MAX / rate, maxdiv);
301
Stephen Boydbca96902015-01-19 18:05:29 -0800302 for (i = 1; i <= maxdiv; i = _next_div(table, i, flags)) {
303 if (!_is_valid_div(table, i, flags))
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530304 continue;
Shawn Guo081c9022013-06-02 22:20:55 +0800305 if (rate * i == parent_rate_saved) {
306 /*
307 * It's the most ideal case if the requested rate can be
308 * divided from parent clock without needing to change
309 * parent rate, so return the divider immediately.
310 */
311 *best_parent_rate = parent_rate_saved;
312 return i;
313 }
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700314 parent_rate = __clk_round_rate(__clk_get_parent(hw->clk),
Uwe Kleine-Königda321132015-02-21 11:40:23 +0100315 rate * i);
Tomi Valkeinenb11d2822014-02-13 12:03:59 +0200316 now = DIV_ROUND_UP(parent_rate, i);
Stephen Boydbca96902015-01-19 18:05:29 -0800317 if (_is_best_div(rate, now, best, flags)) {
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700318 bestdiv = i;
319 best = now;
320 *best_parent_rate = parent_rate;
321 }
322 }
323
324 if (!bestdiv) {
Stephen Boydbca96902015-01-19 18:05:29 -0800325 bestdiv = _get_maxdiv(table, width, flags);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700326 *best_parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 1);
327 }
328
329 return bestdiv;
330}
331
Stephen Boydbca96902015-01-19 18:05:29 -0800332long divider_round_rate(struct clk_hw *hw, unsigned long rate,
333 unsigned long *prate, const struct clk_div_table *table,
334 u8 width, unsigned long flags)
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700335{
336 int div;
Stephen Boydbca96902015-01-19 18:05:29 -0800337
338 div = clk_divider_bestdiv(hw, rate, prate, table, width, flags);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700339
Tomi Valkeinenb11d2822014-02-13 12:03:59 +0200340 return DIV_ROUND_UP(*prate, div);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700341}
Stephen Boydbca96902015-01-19 18:05:29 -0800342EXPORT_SYMBOL_GPL(divider_round_rate);
343
344static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
345 unsigned long *prate)
346{
347 struct clk_divider *divider = to_clk_divider(hw);
348 int bestdiv;
349
350 /* if read only, just return current value */
351 if (divider->flags & CLK_DIVIDER_READ_ONLY) {
352 bestdiv = readl(divider->reg) >> divider->shift;
353 bestdiv &= div_mask(divider->width);
354 bestdiv = _get_div(divider->table, bestdiv, divider->flags);
Heiko Stübner2f7bf4a2015-02-24 11:39:25 +0100355 return DIV_ROUND_UP(*prate, bestdiv);
Stephen Boydbca96902015-01-19 18:05:29 -0800356 }
357
358 return divider_round_rate(hw, rate, prate, divider->table,
359 divider->width, divider->flags);
360}
361
362int divider_get_val(unsigned long rate, unsigned long parent_rate,
363 const struct clk_div_table *table, u8 width,
364 unsigned long flags)
365{
366 unsigned int div, value;
367
368 div = DIV_ROUND_UP(parent_rate, rate);
369
370 if (!_is_valid_div(table, div, flags))
371 return -EINVAL;
372
373 value = _get_val(table, div, flags);
374
375 return min_t(unsigned int, value, div_mask(width));
376}
377EXPORT_SYMBOL_GPL(divider_get_val);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700378
Shawn Guo1c0035d2012-04-12 20:50:18 +0800379static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
380 unsigned long parent_rate)
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700381{
382 struct clk_divider *divider = to_clk_divider(hw);
Stephen Boydbca96902015-01-19 18:05:29 -0800383 unsigned int value;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700384 unsigned long flags = 0;
385 u32 val;
386
Stephen Boydbca96902015-01-19 18:05:29 -0800387 value = divider_get_val(rate, parent_rate, divider->table,
388 divider->width, divider->flags);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700389
390 if (divider->lock)
391 spin_lock_irqsave(divider->lock, flags);
392
Haojian Zhuangd57dfe72013-06-08 22:47:18 +0800393 if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
Stephen Boydbca96902015-01-19 18:05:29 -0800394 val = div_mask(divider->width) << (divider->shift + 16);
Haojian Zhuangd57dfe72013-06-08 22:47:18 +0800395 } else {
Gerhard Sittigaa514ce2013-07-22 14:14:40 +0200396 val = clk_readl(divider->reg);
Stephen Boydbca96902015-01-19 18:05:29 -0800397 val &= ~(div_mask(divider->width) << divider->shift);
Haojian Zhuangd57dfe72013-06-08 22:47:18 +0800398 }
Rajendra Nayak6d9252b2012-05-17 15:52:13 +0530399 val |= value << divider->shift;
Gerhard Sittigaa514ce2013-07-22 14:14:40 +0200400 clk_writel(val, divider->reg);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700401
402 if (divider->lock)
403 spin_unlock_irqrestore(divider->lock, flags);
404
405 return 0;
406}
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700407
Shawn Guo822c2502012-03-27 15:23:22 +0800408const struct clk_ops clk_divider_ops = {
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700409 .recalc_rate = clk_divider_recalc_rate,
410 .round_rate = clk_divider_round_rate,
411 .set_rate = clk_divider_set_rate,
412};
413EXPORT_SYMBOL_GPL(clk_divider_ops);
414
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530415static struct clk *_register_divider(struct device *dev, const char *name,
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700416 const char *parent_name, unsigned long flags,
417 void __iomem *reg, u8 shift, u8 width,
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530418 u8 clk_divider_flags, const struct clk_div_table *table,
419 spinlock_t *lock)
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700420{
421 struct clk_divider *div;
422 struct clk *clk;
Saravana Kannan0197b3e2012-04-25 22:58:56 -0700423 struct clk_init_data init;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700424
Haojian Zhuangd57dfe72013-06-08 22:47:18 +0800425 if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) {
426 if (width + shift > 16) {
427 pr_warn("divider value exceeds LOWORD field\n");
428 return ERR_PTR(-EINVAL);
429 }
430 }
431
Mike Turquette27d54592012-03-26 17:51:03 -0700432 /* allocate the divider */
Stephen Boydd122db72015-05-14 16:47:10 -0700433 div = kzalloc(sizeof(*div), GFP_KERNEL);
434 if (!div)
Mike Turquette27d54592012-03-26 17:51:03 -0700435 return ERR_PTR(-ENOMEM);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700436
Saravana Kannan0197b3e2012-04-25 22:58:56 -0700437 init.name = name;
James Hogane6d5e7d2014-11-14 15:32:09 +0000438 init.ops = &clk_divider_ops;
Rajendra Nayakf7d8caa2012-06-01 14:02:47 +0530439 init.flags = flags | CLK_IS_BASIC;
Saravana Kannan0197b3e2012-04-25 22:58:56 -0700440 init.parent_names = (parent_name ? &parent_name: NULL);
441 init.num_parents = (parent_name ? 1 : 0);
442
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700443 /* struct clk_divider assignments */
444 div->reg = reg;
445 div->shift = shift;
446 div->width = width;
447 div->flags = clk_divider_flags;
448 div->lock = lock;
Saravana Kannan0197b3e2012-04-25 22:58:56 -0700449 div->hw.init = &init;
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530450 div->table = table;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700451
Mike Turquette27d54592012-03-26 17:51:03 -0700452 /* register the clock */
Saravana Kannan0197b3e2012-04-25 22:58:56 -0700453 clk = clk_register(dev, &div->hw);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700454
Mike Turquette27d54592012-03-26 17:51:03 -0700455 if (IS_ERR(clk))
456 kfree(div);
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700457
Mike Turquette27d54592012-03-26 17:51:03 -0700458 return clk;
Mike Turquette9d9f78e2012-03-15 23:11:20 -0700459}
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530460
461/**
462 * clk_register_divider - register a divider clock with the clock framework
463 * @dev: device registering this clock
464 * @name: name of this clock
465 * @parent_name: name of clock's parent
466 * @flags: framework-specific flags
467 * @reg: register address to adjust divider
468 * @shift: number of bits to shift the bitfield
469 * @width: width of the bitfield
470 * @clk_divider_flags: divider-specific flags for this clock
471 * @lock: shared register lock for this clock
472 */
473struct clk *clk_register_divider(struct device *dev, const char *name,
474 const char *parent_name, unsigned long flags,
475 void __iomem *reg, u8 shift, u8 width,
476 u8 clk_divider_flags, spinlock_t *lock)
477{
478 return _register_divider(dev, name, parent_name, flags, reg, shift,
479 width, clk_divider_flags, NULL, lock);
480}
Fabio Estevam4c5eeea2013-08-02 13:14:07 -0300481EXPORT_SYMBOL_GPL(clk_register_divider);
Rajendra Nayak357c3f02012-06-29 19:06:32 +0530482
483/**
484 * clk_register_divider_table - register a table based divider clock with
485 * the clock framework
486 * @dev: device registering this clock
487 * @name: name of this clock
488 * @parent_name: name of clock's parent
489 * @flags: framework-specific flags
490 * @reg: register address to adjust divider
491 * @shift: number of bits to shift the bitfield
492 * @width: width of the bitfield
493 * @clk_divider_flags: divider-specific flags for this clock
494 * @table: array of divider/value pairs ending with a div set to 0
495 * @lock: shared register lock for this clock
496 */
497struct clk *clk_register_divider_table(struct device *dev, const char *name,
498 const char *parent_name, unsigned long flags,
499 void __iomem *reg, u8 shift, u8 width,
500 u8 clk_divider_flags, const struct clk_div_table *table,
501 spinlock_t *lock)
502{
503 return _register_divider(dev, name, parent_name, flags, reg, shift,
504 width, clk_divider_flags, table, lock);
505}
Fabio Estevam4c5eeea2013-08-02 13:14:07 -0300506EXPORT_SYMBOL_GPL(clk_register_divider_table);
Krzysztof Kozlowski4e3c0212015-01-05 10:52:40 +0100507
508void clk_unregister_divider(struct clk *clk)
509{
510 struct clk_divider *div;
511 struct clk_hw *hw;
512
513 hw = __clk_get_hw(clk);
514 if (!hw)
515 return;
516
517 div = to_clk_divider(hw);
518
519 clk_unregister(clk);
520 kfree(div);
521}
522EXPORT_SYMBOL_GPL(clk_unregister_divider);