Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 1 | /* |
Andrew Victor | 9d04126 | 2007-02-05 11:42:07 +0100 | [diff] [blame] | 2 | * arch/arm/mach-at91/at91sam9260.c |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2006 SAN People |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | */ |
| 12 | |
| 13 | #include <linux/module.h> |
| 14 | |
| 15 | #include <asm/mach/arch.h> |
| 16 | #include <asm/mach/map.h> |
Andrew Victor | f7eee89 | 2007-02-15 08:17:38 +0100 | [diff] [blame^] | 17 | #include <asm/arch/cpu.h> |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 18 | #include <asm/arch/at91sam9260.h> |
| 19 | #include <asm/arch/at91_pmc.h> |
Andrew Victor | e9d10a1 | 2007-01-09 12:47:51 +0100 | [diff] [blame] | 20 | #include <asm/arch/at91_rstc.h> |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 21 | |
| 22 | #include "generic.h" |
| 23 | #include "clock.h" |
| 24 | |
| 25 | static struct map_desc at91sam9260_io_desc[] __initdata = { |
| 26 | { |
| 27 | .virtual = AT91_VA_BASE_SYS, |
| 28 | .pfn = __phys_to_pfn(AT91_BASE_SYS), |
| 29 | .length = SZ_16K, |
| 30 | .type = MT_DEVICE, |
Andrew Victor | f7eee89 | 2007-02-15 08:17:38 +0100 | [diff] [blame^] | 31 | } |
| 32 | }; |
| 33 | |
| 34 | static struct map_desc at91sam9260_sram_desc[] __initdata = { |
| 35 | { |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 36 | .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE, |
| 37 | .pfn = __phys_to_pfn(AT91SAM9260_SRAM0_BASE), |
| 38 | .length = AT91SAM9260_SRAM0_SIZE, |
| 39 | .type = MT_DEVICE, |
| 40 | }, { |
| 41 | .virtual = AT91_IO_VIRT_BASE - AT91SAM9260_SRAM0_SIZE - AT91SAM9260_SRAM1_SIZE, |
| 42 | .pfn = __phys_to_pfn(AT91SAM9260_SRAM1_BASE), |
| 43 | .length = AT91SAM9260_SRAM1_SIZE, |
| 44 | .type = MT_DEVICE, |
Andrew Victor | f7eee89 | 2007-02-15 08:17:38 +0100 | [diff] [blame^] | 45 | } |
| 46 | }; |
| 47 | |
| 48 | static struct map_desc at91sam9xe_sram_desc[] __initdata = { |
| 49 | { |
| 50 | .pfn = __phys_to_pfn(AT91SAM9XE_SRAM_BASE), |
| 51 | .type = MT_DEVICE, |
| 52 | } |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 53 | }; |
| 54 | |
| 55 | /* -------------------------------------------------------------------- |
| 56 | * Clocks |
| 57 | * -------------------------------------------------------------------- */ |
| 58 | |
| 59 | /* |
| 60 | * The peripheral clocks. |
| 61 | */ |
| 62 | static struct clk pioA_clk = { |
| 63 | .name = "pioA_clk", |
| 64 | .pmc_mask = 1 << AT91SAM9260_ID_PIOA, |
| 65 | .type = CLK_TYPE_PERIPHERAL, |
| 66 | }; |
| 67 | static struct clk pioB_clk = { |
| 68 | .name = "pioB_clk", |
| 69 | .pmc_mask = 1 << AT91SAM9260_ID_PIOB, |
| 70 | .type = CLK_TYPE_PERIPHERAL, |
| 71 | }; |
| 72 | static struct clk pioC_clk = { |
| 73 | .name = "pioC_clk", |
| 74 | .pmc_mask = 1 << AT91SAM9260_ID_PIOC, |
| 75 | .type = CLK_TYPE_PERIPHERAL, |
| 76 | }; |
| 77 | static struct clk adc_clk = { |
| 78 | .name = "adc_clk", |
| 79 | .pmc_mask = 1 << AT91SAM9260_ID_ADC, |
| 80 | .type = CLK_TYPE_PERIPHERAL, |
| 81 | }; |
| 82 | static struct clk usart0_clk = { |
| 83 | .name = "usart0_clk", |
| 84 | .pmc_mask = 1 << AT91SAM9260_ID_US0, |
| 85 | .type = CLK_TYPE_PERIPHERAL, |
| 86 | }; |
| 87 | static struct clk usart1_clk = { |
| 88 | .name = "usart1_clk", |
| 89 | .pmc_mask = 1 << AT91SAM9260_ID_US1, |
| 90 | .type = CLK_TYPE_PERIPHERAL, |
| 91 | }; |
| 92 | static struct clk usart2_clk = { |
| 93 | .name = "usart2_clk", |
| 94 | .pmc_mask = 1 << AT91SAM9260_ID_US2, |
| 95 | .type = CLK_TYPE_PERIPHERAL, |
| 96 | }; |
| 97 | static struct clk mmc_clk = { |
| 98 | .name = "mci_clk", |
| 99 | .pmc_mask = 1 << AT91SAM9260_ID_MCI, |
| 100 | .type = CLK_TYPE_PERIPHERAL, |
| 101 | }; |
| 102 | static struct clk udc_clk = { |
| 103 | .name = "udc_clk", |
| 104 | .pmc_mask = 1 << AT91SAM9260_ID_UDP, |
| 105 | .type = CLK_TYPE_PERIPHERAL, |
| 106 | }; |
| 107 | static struct clk twi_clk = { |
| 108 | .name = "twi_clk", |
| 109 | .pmc_mask = 1 << AT91SAM9260_ID_TWI, |
| 110 | .type = CLK_TYPE_PERIPHERAL, |
| 111 | }; |
| 112 | static struct clk spi0_clk = { |
| 113 | .name = "spi0_clk", |
| 114 | .pmc_mask = 1 << AT91SAM9260_ID_SPI0, |
| 115 | .type = CLK_TYPE_PERIPHERAL, |
| 116 | }; |
| 117 | static struct clk spi1_clk = { |
| 118 | .name = "spi1_clk", |
| 119 | .pmc_mask = 1 << AT91SAM9260_ID_SPI1, |
| 120 | .type = CLK_TYPE_PERIPHERAL, |
| 121 | }; |
Andrew Victor | c177a1e | 2007-02-08 10:25:38 +0100 | [diff] [blame] | 122 | static struct clk tc0_clk = { |
| 123 | .name = "tc0_clk", |
| 124 | .pmc_mask = 1 << AT91SAM9260_ID_TC0, |
| 125 | .type = CLK_TYPE_PERIPHERAL, |
| 126 | }; |
| 127 | static struct clk tc1_clk = { |
| 128 | .name = "tc1_clk", |
| 129 | .pmc_mask = 1 << AT91SAM9260_ID_TC1, |
| 130 | .type = CLK_TYPE_PERIPHERAL, |
| 131 | }; |
| 132 | static struct clk tc2_clk = { |
| 133 | .name = "tc2_clk", |
| 134 | .pmc_mask = 1 << AT91SAM9260_ID_TC2, |
| 135 | .type = CLK_TYPE_PERIPHERAL, |
| 136 | }; |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 137 | static struct clk ohci_clk = { |
| 138 | .name = "ohci_clk", |
| 139 | .pmc_mask = 1 << AT91SAM9260_ID_UHP, |
| 140 | .type = CLK_TYPE_PERIPHERAL, |
| 141 | }; |
Andrew Victor | 69b2e99 | 2007-02-14 08:44:43 +0100 | [diff] [blame] | 142 | static struct clk macb_clk = { |
| 143 | .name = "macb_clk", |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 144 | .pmc_mask = 1 << AT91SAM9260_ID_EMAC, |
| 145 | .type = CLK_TYPE_PERIPHERAL, |
| 146 | }; |
| 147 | static struct clk isi_clk = { |
| 148 | .name = "isi_clk", |
| 149 | .pmc_mask = 1 << AT91SAM9260_ID_ISI, |
| 150 | .type = CLK_TYPE_PERIPHERAL, |
| 151 | }; |
| 152 | static struct clk usart3_clk = { |
| 153 | .name = "usart3_clk", |
| 154 | .pmc_mask = 1 << AT91SAM9260_ID_US3, |
| 155 | .type = CLK_TYPE_PERIPHERAL, |
| 156 | }; |
| 157 | static struct clk usart4_clk = { |
| 158 | .name = "usart4_clk", |
| 159 | .pmc_mask = 1 << AT91SAM9260_ID_US4, |
| 160 | .type = CLK_TYPE_PERIPHERAL, |
| 161 | }; |
| 162 | static struct clk usart5_clk = { |
| 163 | .name = "usart5_clk", |
| 164 | .pmc_mask = 1 << AT91SAM9260_ID_US5, |
| 165 | .type = CLK_TYPE_PERIPHERAL, |
| 166 | }; |
Andrew Victor | c177a1e | 2007-02-08 10:25:38 +0100 | [diff] [blame] | 167 | static struct clk tc3_clk = { |
| 168 | .name = "tc3_clk", |
| 169 | .pmc_mask = 1 << AT91SAM9260_ID_TC3, |
| 170 | .type = CLK_TYPE_PERIPHERAL, |
| 171 | }; |
| 172 | static struct clk tc4_clk = { |
| 173 | .name = "tc4_clk", |
| 174 | .pmc_mask = 1 << AT91SAM9260_ID_TC4, |
| 175 | .type = CLK_TYPE_PERIPHERAL, |
| 176 | }; |
| 177 | static struct clk tc5_clk = { |
| 178 | .name = "tc5_clk", |
| 179 | .pmc_mask = 1 << AT91SAM9260_ID_TC5, |
| 180 | .type = CLK_TYPE_PERIPHERAL, |
| 181 | }; |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 182 | |
| 183 | static struct clk *periph_clocks[] __initdata = { |
| 184 | &pioA_clk, |
| 185 | &pioB_clk, |
| 186 | &pioC_clk, |
| 187 | &adc_clk, |
| 188 | &usart0_clk, |
| 189 | &usart1_clk, |
| 190 | &usart2_clk, |
| 191 | &mmc_clk, |
| 192 | &udc_clk, |
| 193 | &twi_clk, |
| 194 | &spi0_clk, |
| 195 | &spi1_clk, |
| 196 | // ssc |
Andrew Victor | c177a1e | 2007-02-08 10:25:38 +0100 | [diff] [blame] | 197 | &tc0_clk, |
| 198 | &tc1_clk, |
| 199 | &tc2_clk, |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 200 | &ohci_clk, |
Andrew Victor | 69b2e99 | 2007-02-14 08:44:43 +0100 | [diff] [blame] | 201 | &macb_clk, |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 202 | &isi_clk, |
| 203 | &usart3_clk, |
| 204 | &usart4_clk, |
| 205 | &usart5_clk, |
Andrew Victor | c177a1e | 2007-02-08 10:25:38 +0100 | [diff] [blame] | 206 | &tc3_clk, |
| 207 | &tc4_clk, |
| 208 | &tc5_clk, |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 209 | // irq0 .. irq2 |
| 210 | }; |
| 211 | |
| 212 | /* |
| 213 | * The two programmable clocks. |
| 214 | * You must configure pin multiplexing to bring these signals out. |
| 215 | */ |
| 216 | static struct clk pck0 = { |
| 217 | .name = "pck0", |
| 218 | .pmc_mask = AT91_PMC_PCK0, |
| 219 | .type = CLK_TYPE_PROGRAMMABLE, |
| 220 | .id = 0, |
| 221 | }; |
| 222 | static struct clk pck1 = { |
| 223 | .name = "pck1", |
| 224 | .pmc_mask = AT91_PMC_PCK1, |
| 225 | .type = CLK_TYPE_PROGRAMMABLE, |
| 226 | .id = 1, |
| 227 | }; |
| 228 | |
| 229 | static void __init at91sam9260_register_clocks(void) |
| 230 | { |
| 231 | int i; |
| 232 | |
| 233 | for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) |
| 234 | clk_register(periph_clocks[i]); |
| 235 | |
| 236 | clk_register(&pck0); |
| 237 | clk_register(&pck1); |
| 238 | } |
| 239 | |
| 240 | /* -------------------------------------------------------------------- |
| 241 | * GPIO |
| 242 | * -------------------------------------------------------------------- */ |
| 243 | |
| 244 | static struct at91_gpio_bank at91sam9260_gpio[] = { |
| 245 | { |
| 246 | .id = AT91SAM9260_ID_PIOA, |
| 247 | .offset = AT91_PIOA, |
| 248 | .clock = &pioA_clk, |
| 249 | }, { |
| 250 | .id = AT91SAM9260_ID_PIOB, |
| 251 | .offset = AT91_PIOB, |
| 252 | .clock = &pioB_clk, |
| 253 | }, { |
| 254 | .id = AT91SAM9260_ID_PIOC, |
| 255 | .offset = AT91_PIOC, |
| 256 | .clock = &pioC_clk, |
| 257 | } |
| 258 | }; |
| 259 | |
| 260 | static void at91sam9260_reset(void) |
| 261 | { |
Andrew Victor | e9d10a1 | 2007-01-09 12:47:51 +0100 | [diff] [blame] | 262 | at91_sys_write(AT91_RSTC_CR, (0xA5 << 24) | AT91_RSTC_PROCRST | AT91_RSTC_PERRST); |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 263 | } |
| 264 | |
| 265 | |
| 266 | /* -------------------------------------------------------------------- |
| 267 | * AT91SAM9260 processor initialization |
| 268 | * -------------------------------------------------------------------- */ |
| 269 | |
Andrew Victor | f7eee89 | 2007-02-15 08:17:38 +0100 | [diff] [blame^] | 270 | static void __init at91sam9xe_initialize(void) |
| 271 | { |
| 272 | unsigned long cidr, sram_size; |
| 273 | |
| 274 | cidr = at91_sys_read(AT91_DBGU_CIDR); |
| 275 | |
| 276 | switch (cidr & AT91_CIDR_SRAMSIZ) { |
| 277 | case AT91_CIDR_SRAMSIZ_32K: |
| 278 | sram_size = 2 * SZ_16K; |
| 279 | break; |
| 280 | case AT91_CIDR_SRAMSIZ_16K: |
| 281 | default: |
| 282 | sram_size = SZ_16K; |
| 283 | } |
| 284 | |
| 285 | at91sam9xe_sram_desc->virtual = AT91_IO_VIRT_BASE - sram_size; |
| 286 | at91sam9xe_sram_desc->length = sram_size; |
| 287 | |
| 288 | iotable_init(at91sam9xe_sram_desc, ARRAY_SIZE(at91sam9xe_sram_desc)); |
| 289 | } |
| 290 | |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 291 | void __init at91sam9260_initialize(unsigned long main_clock) |
| 292 | { |
| 293 | /* Map peripherals */ |
| 294 | iotable_init(at91sam9260_io_desc, ARRAY_SIZE(at91sam9260_io_desc)); |
| 295 | |
Andrew Victor | f7eee89 | 2007-02-15 08:17:38 +0100 | [diff] [blame^] | 296 | if (cpu_is_at91sam9xe()) |
| 297 | at91sam9xe_initialize(); |
| 298 | else |
| 299 | iotable_init(at91sam9260_sram_desc, ARRAY_SIZE(at91sam9260_sram_desc)); |
| 300 | |
Andrew Victor | 62c1660 | 2006-11-30 12:27:38 +0100 | [diff] [blame] | 301 | at91_arch_reset = at91sam9260_reset; |
| 302 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) |
| 303 | | (1 << AT91SAM9260_ID_IRQ2); |
| 304 | |
| 305 | /* Init clock subsystem */ |
| 306 | at91_clock_init(main_clock); |
| 307 | |
| 308 | /* Register the processor-specific clocks */ |
| 309 | at91sam9260_register_clocks(); |
| 310 | |
| 311 | /* Register GPIO subsystem */ |
| 312 | at91_gpio_init(at91sam9260_gpio, 3); |
| 313 | } |
| 314 | |
| 315 | /* -------------------------------------------------------------------- |
| 316 | * Interrupt initialization |
| 317 | * -------------------------------------------------------------------- */ |
| 318 | |
| 319 | /* |
| 320 | * The default interrupt priority levels (0 = lowest, 7 = highest). |
| 321 | */ |
| 322 | static unsigned int at91sam9260_default_irq_priority[NR_AIC_IRQS] __initdata = { |
| 323 | 7, /* Advanced Interrupt Controller */ |
| 324 | 7, /* System Peripherals */ |
| 325 | 0, /* Parallel IO Controller A */ |
| 326 | 0, /* Parallel IO Controller B */ |
| 327 | 0, /* Parallel IO Controller C */ |
| 328 | 0, /* Analog-to-Digital Converter */ |
| 329 | 6, /* USART 0 */ |
| 330 | 6, /* USART 1 */ |
| 331 | 6, /* USART 2 */ |
| 332 | 0, /* Multimedia Card Interface */ |
| 333 | 4, /* USB Device Port */ |
| 334 | 0, /* Two-Wire Interface */ |
| 335 | 6, /* Serial Peripheral Interface 0 */ |
| 336 | 6, /* Serial Peripheral Interface 1 */ |
| 337 | 5, /* Serial Synchronous Controller */ |
| 338 | 0, |
| 339 | 0, |
| 340 | 0, /* Timer Counter 0 */ |
| 341 | 0, /* Timer Counter 1 */ |
| 342 | 0, /* Timer Counter 2 */ |
| 343 | 3, /* USB Host port */ |
| 344 | 3, /* Ethernet */ |
| 345 | 0, /* Image Sensor Interface */ |
| 346 | 6, /* USART 3 */ |
| 347 | 6, /* USART 4 */ |
| 348 | 6, /* USART 5 */ |
| 349 | 0, /* Timer Counter 3 */ |
| 350 | 0, /* Timer Counter 4 */ |
| 351 | 0, /* Timer Counter 5 */ |
| 352 | 0, /* Advanced Interrupt Controller */ |
| 353 | 0, /* Advanced Interrupt Controller */ |
| 354 | 0, /* Advanced Interrupt Controller */ |
| 355 | }; |
| 356 | |
| 357 | void __init at91sam9260_init_interrupts(unsigned int priority[NR_AIC_IRQS]) |
| 358 | { |
| 359 | if (!priority) |
| 360 | priority = at91sam9260_default_irq_priority; |
| 361 | |
| 362 | /* Initialize the AIC interrupt controller */ |
| 363 | at91_aic_init(priority); |
| 364 | |
| 365 | /* Enable GPIO interrupts */ |
| 366 | at91_gpio_irq_setup(); |
| 367 | } |