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Rob Clarkc8afe682013-06-26 12:44:06 -04001/*
2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef __MSM_DRV_H__
19#define __MSM_DRV_H__
20
21#include <linux/kernel.h>
22#include <linux/clk.h>
23#include <linux/cpufreq.h>
24#include <linux/module.h>
Rob Clark060530f2014-03-03 14:19:12 -050025#include <linux/component.h>
Rob Clarkc8afe682013-06-26 12:44:06 -040026#include <linux/platform_device.h>
27#include <linux/pm.h>
28#include <linux/pm_runtime.h>
29#include <linux/slab.h>
30#include <linux/list.h>
31#include <linux/iommu.h>
32#include <linux/types.h>
33#include <asm/sizes.h>
34
35#ifndef CONFIG_OF
36#include <mach/board.h>
37#include <mach/socinfo.h>
38#include <mach/iommu_domains.h>
39#endif
40
41#include <drm/drmP.h>
Rob Clarkcf3a7e42014-11-08 13:21:06 -050042#include <drm/drm_atomic.h>
43#include <drm/drm_atomic_helper.h>
Rob Clarkc8afe682013-06-26 12:44:06 -040044#include <drm/drm_crtc_helper.h>
Rob Clarkcf3a7e42014-11-08 13:21:06 -050045#include <drm/drm_plane_helper.h>
Rob Clarkc8afe682013-06-26 12:44:06 -040046#include <drm/drm_fb_helper.h>
Rob Clark7198e6b2013-07-19 12:59:32 -040047#include <drm/msm_drm.h>
Daniel Vetterd9fc9412014-09-23 15:46:53 +020048#include <drm/drm_gem.h>
Rob Clarkc8afe682013-06-26 12:44:06 -040049
50struct msm_kms;
Rob Clark7198e6b2013-07-19 12:59:32 -040051struct msm_gpu;
Rob Clark871d8122013-11-16 12:56:06 -050052struct msm_mmu;
Rob Clarka7d3c952014-05-30 14:47:38 -040053struct msm_rd_state;
Rob Clark70c70f02014-05-30 14:49:43 -040054struct msm_perf_state;
Rob Clarka7d3c952014-05-30 14:47:38 -040055struct msm_gem_submit;
Rob Clarkc8afe682013-06-26 12:44:06 -040056
Rob Clark7198e6b2013-07-19 12:59:32 -040057#define NUM_DOMAINS 2 /* one for KMS, then one per gpu core (?) */
58
59struct msm_file_private {
60 /* currently we don't do anything useful with this.. but when
61 * per-context address spaces are supported we'd keep track of
62 * the context's page-tables here.
63 */
64 int dummy;
65};
Rob Clarkc8afe682013-06-26 12:44:06 -040066
67struct msm_drm_private {
68
69 struct msm_kms *kms;
70
Rob Clark060530f2014-03-03 14:19:12 -050071 /* subordinate devices, if present: */
Rob Clark067fef32014-11-04 13:33:14 -050072 struct platform_device *gpu_pdev;
73
74 /* possibly this should be in the kms component, but it is
75 * shared by both mdp4 and mdp5..
76 */
77 struct hdmi *hdmi;
Rob Clark060530f2014-03-03 14:19:12 -050078
Rob Clark7198e6b2013-07-19 12:59:32 -040079 /* when we have more than one 'msm_gpu' these need to be an array: */
80 struct msm_gpu *gpu;
81 struct msm_file_private *lastctx;
82
Rob Clarkc8afe682013-06-26 12:44:06 -040083 struct drm_fb_helper *fbdev;
84
Rob Clark7198e6b2013-07-19 12:59:32 -040085 uint32_t next_fence, completed_fence;
86 wait_queue_head_t fence_event;
87
Rob Clarka7d3c952014-05-30 14:47:38 -040088 struct msm_rd_state *rd;
Rob Clark70c70f02014-05-30 14:49:43 -040089 struct msm_perf_state *perf;
Rob Clarka7d3c952014-05-30 14:47:38 -040090
Rob Clarkc8afe682013-06-26 12:44:06 -040091 /* list of GEM objects: */
92 struct list_head inactive_list;
93
94 struct workqueue_struct *wq;
95
Rob Clarkedd4fc62013-09-14 14:01:55 -040096 /* callbacks deferred until bo is inactive: */
97 struct list_head fence_cbs;
98
Rob Clark871d8122013-11-16 12:56:06 -050099 /* registered MMUs: */
100 unsigned int num_mmus;
101 struct msm_mmu *mmus[NUM_DOMAINS];
Rob Clarkc8afe682013-06-26 12:44:06 -0400102
Rob Clarka8623912013-10-08 12:57:48 -0400103 unsigned int num_planes;
104 struct drm_plane *planes[8];
105
Rob Clarkc8afe682013-06-26 12:44:06 -0400106 unsigned int num_crtcs;
107 struct drm_crtc *crtcs[8];
108
109 unsigned int num_encoders;
110 struct drm_encoder *encoders[8];
111
Rob Clarka3376e32013-08-30 13:02:15 -0400112 unsigned int num_bridges;
113 struct drm_bridge *bridges[8];
114
Rob Clarkc8afe682013-06-26 12:44:06 -0400115 unsigned int num_connectors;
116 struct drm_connector *connectors[8];
Rob Clark871d8122013-11-16 12:56:06 -0500117
118 /* VRAM carveout, used when no IOMMU: */
119 struct {
120 unsigned long size;
121 dma_addr_t paddr;
122 /* NOTE: mm managed at the page level, size is in # of pages
123 * and position mm_node->start is in # of pages:
124 */
125 struct drm_mm mm;
126 } vram;
Rob Clarkc8afe682013-06-26 12:44:06 -0400127};
128
129struct msm_format {
130 uint32_t pixel_format;
131};
132
Rob Clarkedd4fc62013-09-14 14:01:55 -0400133/* callback from wq once fence has passed: */
134struct msm_fence_cb {
135 struct work_struct work;
136 uint32_t fence;
137 void (*func)(struct msm_fence_cb *cb);
138};
139
140void __msm_fence_worker(struct work_struct *work);
141
142#define INIT_FENCE_CB(_cb, _func) do { \
143 INIT_WORK(&(_cb)->work, __msm_fence_worker); \
144 (_cb)->func = _func; \
145 } while (0)
146
Rob Clarkcf3a7e42014-11-08 13:21:06 -0500147int msm_atomic_commit(struct drm_device *dev,
148 struct drm_atomic_state *state, bool async);
149
Rob Clark871d8122013-11-16 12:56:06 -0500150int msm_register_mmu(struct drm_device *dev, struct msm_mmu *mmu);
Rob Clarkc8afe682013-06-26 12:44:06 -0400151
Rob Clark7198e6b2013-07-19 12:59:32 -0400152int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence,
153 struct timespec *timeout);
Rob Clark69193e52014-11-07 18:10:04 -0500154int msm_queue_fence_cb(struct drm_device *dev,
155 struct msm_fence_cb *cb, uint32_t fence);
Rob Clark7198e6b2013-07-19 12:59:32 -0400156void msm_update_fence(struct drm_device *dev, uint32_t fence);
157
158int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
159 struct drm_file *file);
160
Daniel Thompson77a147e2014-11-12 11:38:14 +0000161int msm_gem_mmap_obj(struct drm_gem_object *obj,
162 struct vm_area_struct *vma);
Rob Clarkc8afe682013-06-26 12:44:06 -0400163int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
164int msm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
165uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
166int msm_gem_get_iova_locked(struct drm_gem_object *obj, int id,
167 uint32_t *iova);
168int msm_gem_get_iova(struct drm_gem_object *obj, int id, uint32_t *iova);
Rob Clark2638d902014-11-08 09:13:37 -0500169uint32_t msm_gem_iova(struct drm_gem_object *obj, int id);
Rob Clark05b84912013-09-28 11:28:35 -0400170struct page **msm_gem_get_pages(struct drm_gem_object *obj);
171void msm_gem_put_pages(struct drm_gem_object *obj);
Rob Clarkc8afe682013-06-26 12:44:06 -0400172void msm_gem_put_iova(struct drm_gem_object *obj, int id);
173int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
174 struct drm_mode_create_dumb *args);
Rob Clarkc8afe682013-06-26 12:44:06 -0400175int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
176 uint32_t handle, uint64_t *offset);
Rob Clark05b84912013-09-28 11:28:35 -0400177struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
178void *msm_gem_prime_vmap(struct drm_gem_object *obj);
179void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
Daniel Thompson77a147e2014-11-12 11:38:14 +0000180int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
Rob Clark05b84912013-09-28 11:28:35 -0400181struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
Maarten Lankhorstb5e9c1a2014-01-09 11:03:14 +0100182 struct dma_buf_attachment *attach, struct sg_table *sg);
Rob Clark05b84912013-09-28 11:28:35 -0400183int msm_gem_prime_pin(struct drm_gem_object *obj);
184void msm_gem_prime_unpin(struct drm_gem_object *obj);
Rob Clarkc8afe682013-06-26 12:44:06 -0400185void *msm_gem_vaddr_locked(struct drm_gem_object *obj);
186void *msm_gem_vaddr(struct drm_gem_object *obj);
Rob Clarkedd4fc62013-09-14 14:01:55 -0400187int msm_gem_queue_inactive_cb(struct drm_gem_object *obj,
188 struct msm_fence_cb *cb);
Rob Clark7198e6b2013-07-19 12:59:32 -0400189void msm_gem_move_to_active(struct drm_gem_object *obj,
Rob Clarkbf6811f2013-09-01 13:25:09 -0400190 struct msm_gpu *gpu, bool write, uint32_t fence);
Rob Clark7198e6b2013-07-19 12:59:32 -0400191void msm_gem_move_to_inactive(struct drm_gem_object *obj);
192int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op,
193 struct timespec *timeout);
194int msm_gem_cpu_fini(struct drm_gem_object *obj);
Rob Clarkc8afe682013-06-26 12:44:06 -0400195void msm_gem_free_object(struct drm_gem_object *obj);
196int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
197 uint32_t size, uint32_t flags, uint32_t *handle);
198struct drm_gem_object *msm_gem_new(struct drm_device *dev,
199 uint32_t size, uint32_t flags);
Rob Clark05b84912013-09-28 11:28:35 -0400200struct drm_gem_object *msm_gem_import(struct drm_device *dev,
201 uint32_t size, struct sg_table *sgt);
Rob Clarkc8afe682013-06-26 12:44:06 -0400202
Rob Clark2638d902014-11-08 09:13:37 -0500203int msm_framebuffer_prepare(struct drm_framebuffer *fb, int id);
204void msm_framebuffer_cleanup(struct drm_framebuffer *fb, int id);
205uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb, int id, int plane);
Rob Clarkc8afe682013-06-26 12:44:06 -0400206struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
207const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
208struct drm_framebuffer *msm_framebuffer_init(struct drm_device *dev,
209 struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **bos);
210struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
211 struct drm_file *file, struct drm_mode_fb_cmd2 *mode_cmd);
212
213struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
214
Rob Clarkdada25b2013-12-01 12:12:54 -0500215struct hdmi;
Rob Clark067fef32014-11-04 13:33:14 -0500216int hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
217 struct drm_encoder *encoder);
Rob Clarkc8afe682013-06-26 12:44:06 -0400218void __init hdmi_register(void);
219void __exit hdmi_unregister(void);
220
221#ifdef CONFIG_DEBUG_FS
222void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
223void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
224void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
Rob Clarka7d3c952014-05-30 14:47:38 -0400225int msm_debugfs_late_init(struct drm_device *dev);
226int msm_rd_debugfs_init(struct drm_minor *minor);
227void msm_rd_debugfs_cleanup(struct drm_minor *minor);
228void msm_rd_dump_submit(struct msm_gem_submit *submit);
Rob Clark70c70f02014-05-30 14:49:43 -0400229int msm_perf_debugfs_init(struct drm_minor *minor);
230void msm_perf_debugfs_cleanup(struct drm_minor *minor);
Rob Clarka7d3c952014-05-30 14:47:38 -0400231#else
232static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
233static inline void msm_rd_dump_submit(struct msm_gem_submit *submit) {}
Rob Clarkc8afe682013-06-26 12:44:06 -0400234#endif
235
236void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
237 const char *dbgname);
238void msm_writel(u32 data, void __iomem *addr);
239u32 msm_readl(const void __iomem *addr);
240
241#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
242#define VERB(fmt, ...) if (0) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
243
Rob Clarkf816f272013-09-11 17:34:07 -0400244static inline bool fence_completed(struct drm_device *dev, uint32_t fence)
245{
246 struct msm_drm_private *priv = dev->dev_private;
247 return priv->completed_fence >= fence;
248}
249
Rob Clarkc8afe682013-06-26 12:44:06 -0400250static inline int align_pitch(int width, int bpp)
251{
252 int bytespp = (bpp + 7) / 8;
253 /* adreno needs pitch aligned to 32 pixels: */
254 return bytespp * ALIGN(width, 32);
255}
256
257/* for the generated headers: */
258#define INVALID_IDX(idx) ({BUG(); 0;})
Rob Clark7198e6b2013-07-19 12:59:32 -0400259#define fui(x) ({BUG(); 0;})
260#define util_float_to_half(x) ({BUG(); 0;})
261
Rob Clarkc8afe682013-06-26 12:44:06 -0400262
263#define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
264
265/* for conditionally setting boolean flag(s): */
266#define COND(bool, val) ((bool) ? (val) : 0)
267
Rob Clarkc8afe682013-06-26 12:44:06 -0400268
269#endif /* __MSM_DRV_H__ */