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Antti Palosaaried85ada2012-09-01 21:09:21 -03001/*
2 * Elonics E4000 silicon tuner driver
3 *
4 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21#include "e4000_priv.h"
Antti Palosaari35c00c92013-09-02 13:06:13 -030022#include <linux/math64.h>
Antti Palosaaried85ada2012-09-01 21:09:21 -030023
Antti Palosaaried85ada2012-09-01 21:09:21 -030024static int e4000_init(struct dvb_frontend *fe)
25{
Antti Palosaaric5f51b12014-02-10 22:52:51 -030026 struct e4000 *s = fe->tuner_priv;
Antti Palosaaried85ada2012-09-01 21:09:21 -030027 int ret;
28
Antti Palosaari13bd82d2014-08-24 23:35:48 -030029 dev_dbg(&s->client->dev, "\n");
Antti Palosaaried85ada2012-09-01 21:09:21 -030030
Antti Palosaaried85ada2012-09-01 21:09:21 -030031 /* dummy I2C to ensure I2C wakes up */
Antti Palosaaric5f51b12014-02-10 22:52:51 -030032 ret = regmap_write(s->regmap, 0x02, 0x40);
Antti Palosaaried85ada2012-09-01 21:09:21 -030033
34 /* reset */
Antti Palosaaric5f51b12014-02-10 22:52:51 -030035 ret = regmap_write(s->regmap, 0x00, 0x01);
36 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -030037 goto err;
38
39 /* disable output clock */
Antti Palosaaric5f51b12014-02-10 22:52:51 -030040 ret = regmap_write(s->regmap, 0x06, 0x00);
41 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -030042 goto err;
43
Antti Palosaaric5f51b12014-02-10 22:52:51 -030044 ret = regmap_write(s->regmap, 0x7a, 0x96);
45 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -030046 goto err;
47
48 /* configure gains */
Antti Palosaaric5f51b12014-02-10 22:52:51 -030049 ret = regmap_bulk_write(s->regmap, 0x7e, "\x01\xfe", 2);
50 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -030051 goto err;
52
Antti Palosaaric5f51b12014-02-10 22:52:51 -030053 ret = regmap_write(s->regmap, 0x82, 0x00);
54 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -030055 goto err;
56
Antti Palosaaric5f51b12014-02-10 22:52:51 -030057 ret = regmap_write(s->regmap, 0x24, 0x05);
58 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -030059 goto err;
60
Antti Palosaaric5f51b12014-02-10 22:52:51 -030061 ret = regmap_bulk_write(s->regmap, 0x87, "\x20\x01", 2);
62 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -030063 goto err;
64
Antti Palosaaric5f51b12014-02-10 22:52:51 -030065 ret = regmap_bulk_write(s->regmap, 0x9f, "\x7f\x07", 2);
66 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -030067 goto err;
68
Antti Palosaaried85ada2012-09-01 21:09:21 -030069 /* DC offset control */
Antti Palosaaric5f51b12014-02-10 22:52:51 -030070 ret = regmap_write(s->regmap, 0x2d, 0x1f);
71 if (ret)
Antti Palosaari85146112013-07-24 02:04:12 -030072 goto err;
73
Antti Palosaaric5f51b12014-02-10 22:52:51 -030074 ret = regmap_bulk_write(s->regmap, 0x70, "\x01\x01", 2);
75 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -030076 goto err;
77
78 /* gain control */
Antti Palosaaric5f51b12014-02-10 22:52:51 -030079 ret = regmap_write(s->regmap, 0x1a, 0x17);
80 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -030081 goto err;
82
Antti Palosaaric5f51b12014-02-10 22:52:51 -030083 ret = regmap_write(s->regmap, 0x1f, 0x1a);
84 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -030085 goto err;
86
Antti Palosaaric5f51b12014-02-10 22:52:51 -030087 s->active = true;
Antti Palosaaried85ada2012-09-01 21:09:21 -030088err:
Antti Palosaari1c73fc62014-02-08 04:21:10 -030089 if (ret)
Antti Palosaari13bd82d2014-08-24 23:35:48 -030090 dev_dbg(&s->client->dev, "failed=%d\n", ret);
Antti Palosaaried85ada2012-09-01 21:09:21 -030091
Antti Palosaaried85ada2012-09-01 21:09:21 -030092 return ret;
93}
94
95static int e4000_sleep(struct dvb_frontend *fe)
96{
Antti Palosaaric5f51b12014-02-10 22:52:51 -030097 struct e4000 *s = fe->tuner_priv;
Antti Palosaaried85ada2012-09-01 21:09:21 -030098 int ret;
99
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300100 dev_dbg(&s->client->dev, "\n");
Antti Palosaaried85ada2012-09-01 21:09:21 -0300101
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300102 s->active = false;
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300103
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300104 ret = regmap_write(s->regmap, 0x00, 0x00);
105 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -0300106 goto err;
Antti Palosaaried85ada2012-09-01 21:09:21 -0300107err:
Antti Palosaari1c73fc62014-02-08 04:21:10 -0300108 if (ret)
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300109 dev_dbg(&s->client->dev, "failed=%d\n", ret);
Antti Palosaaried85ada2012-09-01 21:09:21 -0300110
Antti Palosaaried85ada2012-09-01 21:09:21 -0300111 return ret;
112}
113
114static int e4000_set_params(struct dvb_frontend *fe)
115{
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300116 struct e4000 *s = fe->tuner_priv;
Antti Palosaaried85ada2012-09-01 21:09:21 -0300117 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
Antti Palosaari0e3a71c2015-04-21 21:18:45 -0300118 int ret, i;
119 unsigned int div_n, k, k_cw, div_out;
Antti Palosaari0ed0b222014-01-27 03:13:19 -0300120 u64 f_vco;
Antti Palosaari85146112013-07-24 02:04:12 -0300121 u8 buf[5], i_data[4], q_data[4];
Antti Palosaaried85ada2012-09-01 21:09:21 -0300122
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300123 dev_dbg(&s->client->dev,
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300124 "delivery_system=%d frequency=%u bandwidth_hz=%u\n",
125 c->delivery_system, c->frequency, c->bandwidth_hz);
Antti Palosaaried85ada2012-09-01 21:09:21 -0300126
Antti Palosaaried85ada2012-09-01 21:09:21 -0300127 /* gain control manual */
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300128 ret = regmap_write(s->regmap, 0x1a, 0x00);
129 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -0300130 goto err;
131
Antti Palosaari0e3a71c2015-04-21 21:18:45 -0300132 /*
133 * Fractional-N synthesizer
134 *
135 * +----------------------------+
136 * v |
137 * Fref +----+ +-------+ +------+ +---+
138 * ------> | PD | --> | VCO | ------> | /N.F | <-- | K |
139 * +----+ +-------+ +------+ +---+
140 * |
141 * |
142 * v
143 * +-------+ Fout
144 * | /Rout | ------>
145 * +-------+
146 */
Antti Palosaaried85ada2012-09-01 21:09:21 -0300147 for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) {
148 if (c->frequency <= e4000_pll_lut[i].freq)
149 break;
150 }
151
Julia Lawall58f087c2013-12-29 19:47:35 -0300152 if (i == ARRAY_SIZE(e4000_pll_lut)) {
153 ret = -EINVAL;
Antti Palosaaried85ada2012-09-01 21:09:21 -0300154 goto err;
Julia Lawall58f087c2013-12-29 19:47:35 -0300155 }
Antti Palosaaried85ada2012-09-01 21:09:21 -0300156
Antti Palosaari0e3a71c2015-04-21 21:18:45 -0300157 #define F_REF s->clock
158 div_out = e4000_pll_lut[i].div_out;
159 f_vco = (u64) c->frequency * div_out;
160 /* calculate PLL integer and fractional control word */
161 div_n = div_u64_rem(f_vco, F_REF, &k);
162 k_cw = div_u64((u64) k * 0x10000, F_REF);
163
164 dev_dbg(&s->client->dev,
165 "frequency=%u f_vco=%llu F_REF=%u div_n=%u k=%u k_cw=%04x div_out=%u\n",
166 c->frequency, f_vco, F_REF, div_n, k, k_cw, div_out);
167
168 buf[0] = div_n;
169 buf[1] = (k_cw >> 0) & 0xff;
170 buf[2] = (k_cw >> 8) & 0xff;
Antti Palosaaried85ada2012-09-01 21:09:21 -0300171 buf[3] = 0x00;
Antti Palosaari0e3a71c2015-04-21 21:18:45 -0300172 buf[4] = e4000_pll_lut[i].div_out_reg;
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300173 ret = regmap_bulk_write(s->regmap, 0x09, buf, 5);
174 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -0300175 goto err;
176
177 /* LNA filter (RF filter) */
178 for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) {
179 if (c->frequency <= e400_lna_filter_lut[i].freq)
180 break;
181 }
182
Julia Lawall58f087c2013-12-29 19:47:35 -0300183 if (i == ARRAY_SIZE(e400_lna_filter_lut)) {
184 ret = -EINVAL;
Antti Palosaaried85ada2012-09-01 21:09:21 -0300185 goto err;
Julia Lawall58f087c2013-12-29 19:47:35 -0300186 }
Antti Palosaaried85ada2012-09-01 21:09:21 -0300187
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300188 ret = regmap_write(s->regmap, 0x10, e400_lna_filter_lut[i].val);
189 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -0300190 goto err;
191
192 /* IF filters */
193 for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) {
194 if (c->bandwidth_hz <= e4000_if_filter_lut[i].freq)
195 break;
196 }
197
Julia Lawall58f087c2013-12-29 19:47:35 -0300198 if (i == ARRAY_SIZE(e4000_if_filter_lut)) {
199 ret = -EINVAL;
Antti Palosaaried85ada2012-09-01 21:09:21 -0300200 goto err;
Julia Lawall58f087c2013-12-29 19:47:35 -0300201 }
Antti Palosaaried85ada2012-09-01 21:09:21 -0300202
203 buf[0] = e4000_if_filter_lut[i].reg11_val;
204 buf[1] = e4000_if_filter_lut[i].reg12_val;
205
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300206 ret = regmap_bulk_write(s->regmap, 0x11, buf, 2);
207 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -0300208 goto err;
209
210 /* frequency band */
211 for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) {
212 if (c->frequency <= e4000_band_lut[i].freq)
213 break;
214 }
215
Julia Lawall58f087c2013-12-29 19:47:35 -0300216 if (i == ARRAY_SIZE(e4000_band_lut)) {
217 ret = -EINVAL;
Antti Palosaaried85ada2012-09-01 21:09:21 -0300218 goto err;
Julia Lawall58f087c2013-12-29 19:47:35 -0300219 }
Antti Palosaaried85ada2012-09-01 21:09:21 -0300220
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300221 ret = regmap_write(s->regmap, 0x07, e4000_band_lut[i].reg07_val);
222 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -0300223 goto err;
224
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300225 ret = regmap_write(s->regmap, 0x78, e4000_band_lut[i].reg78_val);
226 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -0300227 goto err;
228
Antti Palosaari85146112013-07-24 02:04:12 -0300229 /* DC offset */
230 for (i = 0; i < 4; i++) {
231 if (i == 0)
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300232 ret = regmap_bulk_write(s->regmap, 0x15, "\x00\x7e\x24", 3);
Antti Palosaari85146112013-07-24 02:04:12 -0300233 else if (i == 1)
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300234 ret = regmap_bulk_write(s->regmap, 0x15, "\x00\x7f", 2);
Antti Palosaari85146112013-07-24 02:04:12 -0300235 else if (i == 2)
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300236 ret = regmap_bulk_write(s->regmap, 0x15, "\x01", 1);
Antti Palosaari85146112013-07-24 02:04:12 -0300237 else
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300238 ret = regmap_bulk_write(s->regmap, 0x16, "\x7e", 1);
Antti Palosaari85146112013-07-24 02:04:12 -0300239
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300240 if (ret)
Antti Palosaari85146112013-07-24 02:04:12 -0300241 goto err;
242
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300243 ret = regmap_write(s->regmap, 0x29, 0x01);
244 if (ret)
Antti Palosaari85146112013-07-24 02:04:12 -0300245 goto err;
246
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300247 ret = regmap_bulk_read(s->regmap, 0x2a, buf, 3);
248 if (ret)
Antti Palosaari85146112013-07-24 02:04:12 -0300249 goto err;
250
251 i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f);
252 q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f);
253 }
254
Antti Palosaarid4992da2013-07-24 18:33:51 -0300255 swap(q_data[2], q_data[3]);
256 swap(i_data[2], i_data[3]);
257
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300258 ret = regmap_bulk_write(s->regmap, 0x50, q_data, 4);
259 if (ret)
Antti Palosaari85146112013-07-24 02:04:12 -0300260 goto err;
261
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300262 ret = regmap_bulk_write(s->regmap, 0x60, i_data, 4);
263 if (ret)
Antti Palosaari85146112013-07-24 02:04:12 -0300264 goto err;
265
Antti Palosaaried85ada2012-09-01 21:09:21 -0300266 /* gain control auto */
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300267 ret = regmap_write(s->regmap, 0x1a, 0x17);
268 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -0300269 goto err;
Antti Palosaaried85ada2012-09-01 21:09:21 -0300270err:
Antti Palosaari1c73fc62014-02-08 04:21:10 -0300271 if (ret)
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300272 dev_dbg(&s->client->dev, "failed=%d\n", ret);
Antti Palosaaried85ada2012-09-01 21:09:21 -0300273
Antti Palosaaried85ada2012-09-01 21:09:21 -0300274 return ret;
275}
276
277static int e4000_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
278{
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300279 struct e4000 *s = fe->tuner_priv;
Antti Palosaaried85ada2012-09-01 21:09:21 -0300280
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300281 dev_dbg(&s->client->dev, "\n");
Antti Palosaaried85ada2012-09-01 21:09:21 -0300282
283 *frequency = 0; /* Zero-IF */
284
285 return 0;
286}
287
Antti Palosaari320c6382014-03-16 18:13:05 -0300288#if IS_ENABLED(CONFIG_VIDEO_V4L2)
Antti Palosaariadaa6162014-01-26 21:02:53 -0300289static int e4000_set_lna_gain(struct dvb_frontend *fe)
290{
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300291 struct e4000 *s = fe->tuner_priv;
Antti Palosaariadaa6162014-01-26 21:02:53 -0300292 int ret;
293 u8 u8tmp;
Antti Palosaari1c73fc62014-02-08 04:21:10 -0300294
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300295 dev_dbg(&s->client->dev, "lna auto=%d->%d val=%d->%d\n",
296 s->lna_gain_auto->cur.val, s->lna_gain_auto->val,
297 s->lna_gain->cur.val, s->lna_gain->val);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300298
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300299 if (s->lna_gain_auto->val && s->if_gain_auto->cur.val)
Antti Palosaariadaa6162014-01-26 21:02:53 -0300300 u8tmp = 0x17;
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300301 else if (s->lna_gain_auto->val)
Antti Palosaariadaa6162014-01-26 21:02:53 -0300302 u8tmp = 0x19;
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300303 else if (s->if_gain_auto->cur.val)
Antti Palosaariadaa6162014-01-26 21:02:53 -0300304 u8tmp = 0x16;
305 else
306 u8tmp = 0x10;
307
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300308 ret = regmap_write(s->regmap, 0x1a, u8tmp);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300309 if (ret)
310 goto err;
311
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300312 if (s->lna_gain_auto->val == false) {
313 ret = regmap_write(s->regmap, 0x14, s->lna_gain->val);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300314 if (ret)
315 goto err;
316 }
Antti Palosaariadaa6162014-01-26 21:02:53 -0300317err:
Antti Palosaari1c73fc62014-02-08 04:21:10 -0300318 if (ret)
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300319 dev_dbg(&s->client->dev, "failed=%d\n", ret);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300320
Antti Palosaariadaa6162014-01-26 21:02:53 -0300321 return ret;
322}
323
324static int e4000_set_mixer_gain(struct dvb_frontend *fe)
325{
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300326 struct e4000 *s = fe->tuner_priv;
Antti Palosaariadaa6162014-01-26 21:02:53 -0300327 int ret;
328 u8 u8tmp;
Antti Palosaari1c73fc62014-02-08 04:21:10 -0300329
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300330 dev_dbg(&s->client->dev, "mixer auto=%d->%d val=%d->%d\n",
331 s->mixer_gain_auto->cur.val, s->mixer_gain_auto->val,
332 s->mixer_gain->cur.val, s->mixer_gain->val);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300333
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300334 if (s->mixer_gain_auto->val)
Antti Palosaariadaa6162014-01-26 21:02:53 -0300335 u8tmp = 0x15;
336 else
337 u8tmp = 0x14;
338
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300339 ret = regmap_write(s->regmap, 0x20, u8tmp);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300340 if (ret)
341 goto err;
342
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300343 if (s->mixer_gain_auto->val == false) {
344 ret = regmap_write(s->regmap, 0x15, s->mixer_gain->val);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300345 if (ret)
346 goto err;
347 }
Antti Palosaariadaa6162014-01-26 21:02:53 -0300348err:
Antti Palosaari1c73fc62014-02-08 04:21:10 -0300349 if (ret)
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300350 dev_dbg(&s->client->dev, "failed=%d\n", ret);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300351
Antti Palosaariadaa6162014-01-26 21:02:53 -0300352 return ret;
353}
354
355static int e4000_set_if_gain(struct dvb_frontend *fe)
356{
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300357 struct e4000 *s = fe->tuner_priv;
Antti Palosaariadaa6162014-01-26 21:02:53 -0300358 int ret;
359 u8 buf[2];
360 u8 u8tmp;
Antti Palosaari1c73fc62014-02-08 04:21:10 -0300361
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300362 dev_dbg(&s->client->dev, "if auto=%d->%d val=%d->%d\n",
363 s->if_gain_auto->cur.val, s->if_gain_auto->val,
364 s->if_gain->cur.val, s->if_gain->val);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300365
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300366 if (s->if_gain_auto->val && s->lna_gain_auto->cur.val)
Antti Palosaariadaa6162014-01-26 21:02:53 -0300367 u8tmp = 0x17;
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300368 else if (s->lna_gain_auto->cur.val)
Antti Palosaariadaa6162014-01-26 21:02:53 -0300369 u8tmp = 0x19;
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300370 else if (s->if_gain_auto->val)
Antti Palosaariadaa6162014-01-26 21:02:53 -0300371 u8tmp = 0x16;
372 else
373 u8tmp = 0x10;
374
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300375 ret = regmap_write(s->regmap, 0x1a, u8tmp);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300376 if (ret)
377 goto err;
378
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300379 if (s->if_gain_auto->val == false) {
380 buf[0] = e4000_if_gain_lut[s->if_gain->val].reg16_val;
381 buf[1] = e4000_if_gain_lut[s->if_gain->val].reg17_val;
382 ret = regmap_bulk_write(s->regmap, 0x16, buf, 2);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300383 if (ret)
384 goto err;
385 }
Antti Palosaariadaa6162014-01-26 21:02:53 -0300386err:
Antti Palosaari1c73fc62014-02-08 04:21:10 -0300387 if (ret)
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300388 dev_dbg(&s->client->dev, "failed=%d\n", ret);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300389
Antti Palosaariadaa6162014-01-26 21:02:53 -0300390 return ret;
391}
392
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300393static int e4000_pll_lock(struct dvb_frontend *fe)
394{
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300395 struct e4000 *s = fe->tuner_priv;
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300396 int ret;
Antti Palosaaribd428bb2014-02-08 06:20:35 -0300397 unsigned int utmp;
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300398
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300399 ret = regmap_read(s->regmap, 0x07, &utmp);
400 if (ret)
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300401 goto err;
402
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300403 s->pll_lock->val = (utmp & 0x01);
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300404err:
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300405 if (ret)
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300406 dev_dbg(&s->client->dev, "failed=%d\n", ret);
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300407
408 return ret;
409}
410
411static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
412{
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300413 struct e4000 *s = container_of(ctrl->handler, struct e4000, hdl);
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300414 int ret;
415
Mauro Carvalho Chehaba04557a2014-09-03 16:04:59 -0300416 if (!s->active)
Antti Palosaaribd428bb2014-02-08 06:20:35 -0300417 return 0;
418
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300419 switch (ctrl->id) {
420 case V4L2_CID_RF_TUNER_PLL_LOCK:
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300421 ret = e4000_pll_lock(s->fe);
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300422 break;
423 default:
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300424 dev_dbg(&s->client->dev, "unknown ctrl: id=%d name=%s\n",
425 ctrl->id, ctrl->name);
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300426 ret = -EINVAL;
427 }
428
429 return ret;
430}
431
Antti Palosaariadaa6162014-01-26 21:02:53 -0300432static int e4000_s_ctrl(struct v4l2_ctrl *ctrl)
433{
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300434 struct e4000 *s = container_of(ctrl->handler, struct e4000, hdl);
435 struct dvb_frontend *fe = s->fe;
Antti Palosaariadaa6162014-01-26 21:02:53 -0300436 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
437 int ret;
Antti Palosaari1c73fc62014-02-08 04:21:10 -0300438
Mauro Carvalho Chehaba04557a2014-09-03 16:04:59 -0300439 if (!s->active)
Antti Palosaaribd428bb2014-02-08 06:20:35 -0300440 return 0;
Antti Palosaariadaa6162014-01-26 21:02:53 -0300441
442 switch (ctrl->id) {
443 case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
444 case V4L2_CID_RF_TUNER_BANDWIDTH:
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300445 c->bandwidth_hz = s->bandwidth->val;
446 ret = e4000_set_params(s->fe);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300447 break;
448 case V4L2_CID_RF_TUNER_LNA_GAIN_AUTO:
449 case V4L2_CID_RF_TUNER_LNA_GAIN:
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300450 ret = e4000_set_lna_gain(s->fe);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300451 break;
452 case V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO:
453 case V4L2_CID_RF_TUNER_MIXER_GAIN:
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300454 ret = e4000_set_mixer_gain(s->fe);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300455 break;
456 case V4L2_CID_RF_TUNER_IF_GAIN_AUTO:
457 case V4L2_CID_RF_TUNER_IF_GAIN:
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300458 ret = e4000_set_if_gain(s->fe);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300459 break;
460 default:
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300461 dev_dbg(&s->client->dev, "unknown ctrl: id=%d name=%s\n",
462 ctrl->id, ctrl->name);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300463 ret = -EINVAL;
464 }
465
466 return ret;
467}
468
469static const struct v4l2_ctrl_ops e4000_ctrl_ops = {
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300470 .g_volatile_ctrl = e4000_g_volatile_ctrl,
Antti Palosaariadaa6162014-01-26 21:02:53 -0300471 .s_ctrl = e4000_s_ctrl,
472};
Antti Palosaari320c6382014-03-16 18:13:05 -0300473#endif
Antti Palosaariadaa6162014-01-26 21:02:53 -0300474
Antti Palosaaried85ada2012-09-01 21:09:21 -0300475static const struct dvb_tuner_ops e4000_tuner_ops = {
476 .info = {
477 .name = "Elonics E4000",
478 .frequency_min = 174000000,
479 .frequency_max = 862000000,
480 },
481
Antti Palosaaried85ada2012-09-01 21:09:21 -0300482 .init = e4000_init,
483 .sleep = e4000_sleep,
484 .set_params = e4000_set_params,
485
486 .get_if_frequency = e4000_get_if_frequency,
487};
488
Antti Palosaariadaa6162014-01-26 21:02:53 -0300489/*
490 * Use V4L2 subdev to carry V4L2 control handler, even we don't implement
491 * subdev itself, just to avoid reinventing the wheel.
492 */
Antti Palosaari28fd31f2013-10-15 19:22:45 -0300493static int e4000_probe(struct i2c_client *client,
494 const struct i2c_device_id *id)
Antti Palosaaried85ada2012-09-01 21:09:21 -0300495{
Antti Palosaari28fd31f2013-10-15 19:22:45 -0300496 struct e4000_config *cfg = client->dev.platform_data;
497 struct dvb_frontend *fe = cfg->fe;
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300498 struct e4000 *s;
Antti Palosaaried85ada2012-09-01 21:09:21 -0300499 int ret;
Antti Palosaaribd428bb2014-02-08 06:20:35 -0300500 unsigned int utmp;
501 static const struct regmap_config regmap_config = {
502 .reg_bits = 8,
503 .val_bits = 8,
504 .max_register = 0xff,
505 };
Antti Palosaaried85ada2012-09-01 21:09:21 -0300506
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300507 s = kzalloc(sizeof(struct e4000), GFP_KERNEL);
508 if (!s) {
Antti Palosaaried85ada2012-09-01 21:09:21 -0300509 ret = -ENOMEM;
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300510 dev_err(&client->dev, "kzalloc() failed\n");
Antti Palosaaried85ada2012-09-01 21:09:21 -0300511 goto err;
512 }
513
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300514 s->clock = cfg->clock;
515 s->client = client;
516 s->fe = cfg->fe;
517 s->regmap = devm_regmap_init_i2c(client, &regmap_config);
518 if (IS_ERR(s->regmap)) {
519 ret = PTR_ERR(s->regmap);
Antti Palosaaribd428bb2014-02-08 06:20:35 -0300520 goto err;
521 }
Antti Palosaaried85ada2012-09-01 21:09:21 -0300522
523 /* check if the tuner is there */
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300524 ret = regmap_read(s->regmap, 0x02, &utmp);
525 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -0300526 goto err;
527
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300528 dev_dbg(&s->client->dev, "chip id=%02x\n", utmp);
Antti Palosaaried85ada2012-09-01 21:09:21 -0300529
Antti Palosaaribd428bb2014-02-08 06:20:35 -0300530 if (utmp != 0x40) {
Antti Palosaari28fd31f2013-10-15 19:22:45 -0300531 ret = -ENODEV;
Antti Palosaaried85ada2012-09-01 21:09:21 -0300532 goto err;
Antti Palosaari28fd31f2013-10-15 19:22:45 -0300533 }
Antti Palosaaried85ada2012-09-01 21:09:21 -0300534
535 /* put sleep as chip seems to be in normal mode by default */
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300536 ret = regmap_write(s->regmap, 0x00, 0x00);
537 if (ret)
Antti Palosaaried85ada2012-09-01 21:09:21 -0300538 goto err;
539
Antti Palosaari320c6382014-03-16 18:13:05 -0300540#if IS_ENABLED(CONFIG_VIDEO_V4L2)
Antti Palosaariadaa6162014-01-26 21:02:53 -0300541 /* Register controls */
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300542 v4l2_ctrl_handler_init(&s->hdl, 9);
543 s->bandwidth_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
Antti Palosaariadaa6162014-01-26 21:02:53 -0300544 V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300545 s->bandwidth = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
Antti Palosaariadaa6162014-01-26 21:02:53 -0300546 V4L2_CID_RF_TUNER_BANDWIDTH, 4300000, 11000000, 100000, 4300000);
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300547 v4l2_ctrl_auto_cluster(2, &s->bandwidth_auto, 0, false);
548 s->lna_gain_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
Antti Palosaariadaa6162014-01-26 21:02:53 -0300549 V4L2_CID_RF_TUNER_LNA_GAIN_AUTO, 0, 1, 1, 1);
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300550 s->lna_gain = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
Antti Palosaariadaa6162014-01-26 21:02:53 -0300551 V4L2_CID_RF_TUNER_LNA_GAIN, 0, 15, 1, 10);
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300552 v4l2_ctrl_auto_cluster(2, &s->lna_gain_auto, 0, false);
553 s->mixer_gain_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
Antti Palosaariadaa6162014-01-26 21:02:53 -0300554 V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO, 0, 1, 1, 1);
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300555 s->mixer_gain = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
Antti Palosaariadaa6162014-01-26 21:02:53 -0300556 V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300557 v4l2_ctrl_auto_cluster(2, &s->mixer_gain_auto, 0, false);
558 s->if_gain_auto = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
Antti Palosaariadaa6162014-01-26 21:02:53 -0300559 V4L2_CID_RF_TUNER_IF_GAIN_AUTO, 0, 1, 1, 1);
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300560 s->if_gain = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
Antti Palosaariadaa6162014-01-26 21:02:53 -0300561 V4L2_CID_RF_TUNER_IF_GAIN, 0, 54, 1, 0);
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300562 v4l2_ctrl_auto_cluster(2, &s->if_gain_auto, 0, false);
563 s->pll_lock = v4l2_ctrl_new_std(&s->hdl, &e4000_ctrl_ops,
Antti Palosaariecfb7ca2014-02-07 02:55:57 -0300564 V4L2_CID_RF_TUNER_PLL_LOCK, 0, 1, 1, 0);
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300565 if (s->hdl.error) {
566 ret = s->hdl.error;
567 dev_err(&s->client->dev, "Could not initialize controls\n");
568 v4l2_ctrl_handler_free(&s->hdl);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300569 goto err;
570 }
571
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300572 s->sd.ctrl_handler = &s->hdl;
Antti Palosaari320c6382014-03-16 18:13:05 -0300573#endif
Antti Palosaariadaa6162014-01-26 21:02:53 -0300574
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300575 dev_info(&s->client->dev, "Elonics E4000 successfully identified\n");
Antti Palosaaried85ada2012-09-01 21:09:21 -0300576
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300577 fe->tuner_priv = s;
Antti Palosaari36f647b2012-09-22 12:32:27 -0300578 memcpy(&fe->ops.tuner_ops, &e4000_tuner_ops,
579 sizeof(struct dvb_tuner_ops));
580
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300581 v4l2_set_subdevdata(&s->sd, client);
582 i2c_set_clientdata(client, &s->sd);
Antti Palosaariadaa6162014-01-26 21:02:53 -0300583
Antti Palosaari28fd31f2013-10-15 19:22:45 -0300584 return 0;
Antti Palosaaried85ada2012-09-01 21:09:21 -0300585err:
Antti Palosaari1c73fc62014-02-08 04:21:10 -0300586 if (ret) {
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300587 dev_dbg(&client->dev, "failed=%d\n", ret);
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300588 kfree(s);
Antti Palosaari1c73fc62014-02-08 04:21:10 -0300589 }
Antti Palosaaried85ada2012-09-01 21:09:21 -0300590
Antti Palosaari28fd31f2013-10-15 19:22:45 -0300591 return ret;
Antti Palosaaried85ada2012-09-01 21:09:21 -0300592}
Antti Palosaari28fd31f2013-10-15 19:22:45 -0300593
594static int e4000_remove(struct i2c_client *client)
595{
Antti Palosaariadaa6162014-01-26 21:02:53 -0300596 struct v4l2_subdev *sd = i2c_get_clientdata(client);
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300597 struct e4000 *s = container_of(sd, struct e4000, sd);
598 struct dvb_frontend *fe = s->fe;
Antti Palosaari28fd31f2013-10-15 19:22:45 -0300599
Antti Palosaari13bd82d2014-08-24 23:35:48 -0300600 dev_dbg(&client->dev, "\n");
Antti Palosaari1c73fc62014-02-08 04:21:10 -0300601
Antti Palosaari320c6382014-03-16 18:13:05 -0300602#if IS_ENABLED(CONFIG_VIDEO_V4L2)
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300603 v4l2_ctrl_handler_free(&s->hdl);
Antti Palosaari320c6382014-03-16 18:13:05 -0300604#endif
Antti Palosaari28fd31f2013-10-15 19:22:45 -0300605 memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
606 fe->tuner_priv = NULL;
Antti Palosaaric5f51b12014-02-10 22:52:51 -0300607 kfree(s);
Antti Palosaari28fd31f2013-10-15 19:22:45 -0300608
609 return 0;
610}
611
612static const struct i2c_device_id e4000_id[] = {
613 {"e4000", 0},
614 {}
615};
616MODULE_DEVICE_TABLE(i2c, e4000_id);
617
618static struct i2c_driver e4000_driver = {
619 .driver = {
620 .owner = THIS_MODULE,
621 .name = "e4000",
622 },
623 .probe = e4000_probe,
624 .remove = e4000_remove,
625 .id_table = e4000_id,
626};
627
628module_i2c_driver(e4000_driver);
Antti Palosaaried85ada2012-09-01 21:09:21 -0300629
630MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver");
631MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
632MODULE_LICENSE("GPL");