blob: dd1e7eaef50fce8ebf514a35e3f49b36509e2419 [file] [log] [blame]
Oliver Schustere1fee942008-03-05 16:48:45 +01001/*
2 * Watchdog Timer Driver
3 * for ITE IT87xx Environment Control - Low Pin Count Input / Output
4 *
5 * (c) Copyright 2007 Oliver Schuster <olivers137@aol.com>
6 *
7 * Based on softdog.c by Alan Cox,
8 * 83977f_wdt.c by Jose Goncalves,
9 * it87.c by Chris Gauthron, Jean Delvare
10 *
11 * Data-sheets: Publicly available at the ITE website
12 * http://www.ite.com.tw/
13 *
14 * Support of the watchdog timers, which are available on
Guenter Roeckcddda072017-06-10 21:04:36 -070015 * IT8607, IT8620, IT8622, IT8625, IT8628, IT8655, IT8665, IT8686,
16 * IT8702, IT8712, IT8716, IT8718, IT8720, IT8721, IT8726, IT8728,
17 * and IT8783.
Oliver Schustere1fee942008-03-05 16:48:45 +010018 *
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
23 *
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
Oliver Schustere1fee942008-03-05 16:48:45 +010028 */
29
Joe Perches27c766a2012-02-15 15:06:19 -080030#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
Guenter Roeck1123c512017-06-10 21:04:35 -070032#include <linux/init.h>
33#include <linux/io.h>
34#include <linux/kernel.h>
Oliver Schustere1fee942008-03-05 16:48:45 +010035#include <linux/module.h>
36#include <linux/moduleparam.h>
37#include <linux/types.h>
Oliver Schustere1fee942008-03-05 16:48:45 +010038#include <linux/watchdog.h>
Oliver Schustere1fee942008-03-05 16:48:45 +010039
Oliver Schustere1fee942008-03-05 16:48:45 +010040#define WATCHDOG_NAME "IT87 WDT"
Oliver Schustere1fee942008-03-05 16:48:45 +010041
42/* Defaults for Module Parameter */
Wim Van Sebroeck5f3b2752011-02-23 20:04:38 +000043#define DEFAULT_TIMEOUT 60
Oliver Schustere1fee942008-03-05 16:48:45 +010044#define DEFAULT_TESTMODE 0
45#define DEFAULT_NOWAYOUT WATCHDOG_NOWAYOUT
46
47/* IO Ports */
48#define REG 0x2e
49#define VAL 0x2f
50
51/* Logical device Numbers LDN */
52#define GPIO 0x07
Oliver Schustere1fee942008-03-05 16:48:45 +010053
54/* Configuration Registers and Functions */
55#define LDNREG 0x07
56#define CHIPID 0x20
Wim Van Sebroeck5f3b2752011-02-23 20:04:38 +000057#define CHIPREV 0x22
Oliver Schustere1fee942008-03-05 16:48:45 +010058
59/* Chip Id numbers */
60#define NO_DEV_ID 0xffff
Guenter Roeckcddda072017-06-10 21:04:36 -070061#define IT8607_ID 0x8607
Maciej S. Szmigiero06716122016-12-15 23:52:36 +010062#define IT8620_ID 0x8620
Guenter Roeckcddda072017-06-10 21:04:36 -070063#define IT8622_ID 0x8622
64#define IT8625_ID 0x8625
65#define IT8628_ID 0x8628
66#define IT8655_ID 0x8655
67#define IT8665_ID 0x8665
68#define IT8686_ID 0x8686
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +020069#define IT8702_ID 0x8702
Oliver Schustere1fee942008-03-05 16:48:45 +010070#define IT8705_ID 0x8705
71#define IT8712_ID 0x8712
72#define IT8716_ID 0x8716
73#define IT8718_ID 0x8718
Ondrej Zajicekee3e9652010-09-14 02:47:28 +020074#define IT8720_ID 0x8720
Huaro Tomita4bc30272011-01-21 07:37:51 +090075#define IT8721_ID 0x8721
Oliver Schustere1fee942008-03-05 16:48:45 +010076#define IT8726_ID 0x8726 /* the data sheet suggest wrongly 0x8716 */
Diego Elio Pettenò198ca012012-03-14 20:49:04 +010077#define IT8728_ID 0x8728
Paolo Tetif83918f2014-10-19 21:39:33 +020078#define IT8783_ID 0x8783
Oliver Schustere1fee942008-03-05 16:48:45 +010079
80/* GPIO Configuration Registers LDN=0x07 */
Wim Van Sebroeck5f3b2752011-02-23 20:04:38 +000081#define WDTCTRL 0x71
Oliver Schustere1fee942008-03-05 16:48:45 +010082#define WDTCFG 0x72
83#define WDTVALLSB 0x73
84#define WDTVALMSB 0x74
85
Oliver Schustere1fee942008-03-05 16:48:45 +010086/* GPIO Bits WDTCFG */
87#define WDT_TOV1 0x80
88#define WDT_KRST 0x40
89#define WDT_TOVE 0x20
Huaro Tomita4bc30272011-01-21 07:37:51 +090090#define WDT_PWROK 0x10 /* not in it8721 */
Oliver Schustere1fee942008-03-05 16:48:45 +010091#define WDT_INT_MASK 0x0f
92
Guenter Roeck893dc8b2017-06-10 21:04:34 -070093static unsigned int max_units, chip_type;
Oliver Schustere1fee942008-03-05 16:48:45 +010094
Guenter Roeck1d7b8032017-06-10 21:04:33 -070095static unsigned int timeout = DEFAULT_TIMEOUT;
Guenter Roeck893dc8b2017-06-10 21:04:34 -070096static int testmode = DEFAULT_TESTMODE;
97static bool nowayout = DEFAULT_NOWAYOUT;
Oliver Schustere1fee942008-03-05 16:48:45 +010098
Oliver Schustere1fee942008-03-05 16:48:45 +010099module_param(timeout, int, 0);
100MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds, default="
101 __MODULE_STRING(DEFAULT_TIMEOUT));
102module_param(testmode, int, 0);
103MODULE_PARM_DESC(testmode, "Watchdog test mode (1 = no reboot), default="
104 __MODULE_STRING(DEFAULT_TESTMODE));
Wim Van Sebroeck86a1e182012-03-05 16:51:11 +0100105module_param(nowayout, bool, 0);
Oliver Schustere1fee942008-03-05 16:48:45 +0100106MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started, default="
107 __MODULE_STRING(WATCHDOG_NOWAYOUT));
108
109/* Superio Chip */
110
Nat Gurumoorthya134b822011-05-09 11:45:07 -0700111static inline int superio_enter(void)
Oliver Schustere1fee942008-03-05 16:48:45 +0100112{
Nat Gurumoorthya134b822011-05-09 11:45:07 -0700113 /*
114 * Try to reserve REG and REG + 1 for exclusive access.
115 */
116 if (!request_muxed_region(REG, 2, WATCHDOG_NAME))
117 return -EBUSY;
118
Oliver Schustere1fee942008-03-05 16:48:45 +0100119 outb(0x87, REG);
120 outb(0x01, REG);
121 outb(0x55, REG);
122 outb(0x55, REG);
Nat Gurumoorthya134b822011-05-09 11:45:07 -0700123 return 0;
Oliver Schustere1fee942008-03-05 16:48:45 +0100124}
125
126static inline void superio_exit(void)
127{
128 outb(0x02, REG);
129 outb(0x02, VAL);
Nat Gurumoorthya134b822011-05-09 11:45:07 -0700130 release_region(REG, 2);
Oliver Schustere1fee942008-03-05 16:48:45 +0100131}
132
133static inline void superio_select(int ldn)
134{
135 outb(LDNREG, REG);
136 outb(ldn, VAL);
137}
138
139static inline int superio_inb(int reg)
140{
141 outb(reg, REG);
142 return inb(VAL);
143}
144
145static inline void superio_outb(int val, int reg)
146{
Wim Van Sebroeck143a2e52009-03-18 08:35:09 +0000147 outb(reg, REG);
148 outb(val, VAL);
Oliver Schustere1fee942008-03-05 16:48:45 +0100149}
150
151static inline int superio_inw(int reg)
152{
153 int val;
154 outb(reg++, REG);
155 val = inb(VAL) << 8;
156 outb(reg, REG);
157 val |= inb(VAL);
158 return val;
159}
160
161static inline void superio_outw(int val, int reg)
162{
Wim Van Sebroeck143a2e52009-03-18 08:35:09 +0000163 outb(reg++, REG);
164 outb(val >> 8, VAL);
165 outb(reg, REG);
166 outb(val, VAL);
Oliver Schustere1fee942008-03-05 16:48:45 +0100167}
168
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200169/* Internal function, should be called after superio_select(GPIO) */
Guenter Roeck893dc8b2017-06-10 21:04:34 -0700170static void _wdt_update_timeout(unsigned int t)
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200171{
Huaro Tomita4bc30272011-01-21 07:37:51 +0900172 unsigned char cfg = WDT_KRST;
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200173
174 if (testmode)
175 cfg = 0;
176
Guenter Roeck893dc8b2017-06-10 21:04:34 -0700177 if (t <= max_units)
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200178 cfg |= WDT_TOV1;
179 else
Guenter Roeck893dc8b2017-06-10 21:04:34 -0700180 t /= 60;
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200181
Huaro Tomita4bc30272011-01-21 07:37:51 +0900182 if (chip_type != IT8721_ID)
183 cfg |= WDT_PWROK;
184
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200185 superio_outb(cfg, WDTCFG);
Guenter Roeck893dc8b2017-06-10 21:04:34 -0700186 superio_outb(t, WDTVALLSB);
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200187 if (max_units > 255)
Guenter Roeck893dc8b2017-06-10 21:04:34 -0700188 superio_outb(t >> 8, WDTVALMSB);
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200189}
190
Guenter Roeck893dc8b2017-06-10 21:04:34 -0700191static int wdt_update_timeout(unsigned int t)
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700192{
193 int ret;
194
195 ret = superio_enter();
196 if (ret)
197 return ret;
198
199 superio_select(GPIO);
Guenter Roeck893dc8b2017-06-10 21:04:34 -0700200 _wdt_update_timeout(t);
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700201 superio_exit();
202
203 return 0;
204}
205
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200206static int wdt_round_time(int t)
207{
208 t += 59;
209 t -= t % 60;
210 return t;
211}
212
Oliver Schustere1fee942008-03-05 16:48:45 +0100213/* watchdog timer handling */
214
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700215static int wdt_start(struct watchdog_device *wdd)
Oliver Schustere1fee942008-03-05 16:48:45 +0100216{
Guenter Roeck893dc8b2017-06-10 21:04:34 -0700217 return wdt_update_timeout(wdd->timeout);
Oliver Schustere1fee942008-03-05 16:48:45 +0100218}
219
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700220static int wdt_stop(struct watchdog_device *wdd)
Oliver Schustere1fee942008-03-05 16:48:45 +0100221{
Guenter Roeck893dc8b2017-06-10 21:04:34 -0700222 return wdt_update_timeout(0);
Oliver Schustere1fee942008-03-05 16:48:45 +0100223}
224
225/**
226 * wdt_set_timeout - set a new timeout value with watchdog ioctl
227 * @t: timeout value in seconds
228 *
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200229 * The hardware device has a 8 or 16 bit watchdog timer (depends on
230 * chip version) that can be configured to count seconds or minutes.
Oliver Schustere1fee942008-03-05 16:48:45 +0100231 *
232 * Used within WDIOC_SETTIMEOUT watchdog device ioctl.
233 */
234
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700235static int wdt_set_timeout(struct watchdog_device *wdd, unsigned int t)
Oliver Schustere1fee942008-03-05 16:48:45 +0100236{
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700237 int ret = 0;
Oliver Schustere1fee942008-03-05 16:48:45 +0100238
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200239 if (t > max_units)
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700240 t = wdt_round_time(t);
Oliver Schustere1fee942008-03-05 16:48:45 +0100241
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700242 wdd->timeout = t;
Nat Gurumoorthya134b822011-05-09 11:45:07 -0700243
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700244 if (watchdog_hw_running(wdd))
Guenter Roeck893dc8b2017-06-10 21:04:34 -0700245 ret = wdt_update_timeout(t);
Oliver Schustere1fee942008-03-05 16:48:45 +0100246
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700247 return ret;
Oliver Schustere1fee942008-03-05 16:48:45 +0100248}
249
Wim Van Sebroeck42747d72009-12-26 18:55:22 +0000250static const struct watchdog_info ident = {
Oliver Schustere1fee942008-03-05 16:48:45 +0100251 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700252 .firmware_version = 1,
Oliver Schustere1fee942008-03-05 16:48:45 +0100253 .identity = WATCHDOG_NAME,
254};
255
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700256static struct watchdog_ops wdt_ops = {
257 .owner = THIS_MODULE,
258 .start = wdt_start,
259 .stop = wdt_stop,
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700260 .set_timeout = wdt_set_timeout,
261};
Oliver Schustere1fee942008-03-05 16:48:45 +0100262
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700263static struct watchdog_device wdt_dev = {
264 .info = &ident,
265 .ops = &wdt_ops,
266 .min_timeout = 1,
267};
Oliver Schustere1fee942008-03-05 16:48:45 +0100268
Oliver Schustere1fee942008-03-05 16:48:45 +0100269static int __init it87_wdt_init(void)
270{
Oliver Schustere1fee942008-03-05 16:48:45 +0100271 u8 chip_rev;
Guenter Roeck893dc8b2017-06-10 21:04:34 -0700272 int rc;
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200273
Nat Gurumoorthya134b822011-05-09 11:45:07 -0700274 rc = superio_enter();
275 if (rc)
276 return rc;
277
Oliver Schustere1fee942008-03-05 16:48:45 +0100278 chip_type = superio_inw(CHIPID);
279 chip_rev = superio_inb(CHIPREV) & 0x0f;
280 superio_exit();
Oliver Schustere1fee942008-03-05 16:48:45 +0100281
282 switch (chip_type) {
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200283 case IT8702_ID:
284 max_units = 255;
285 break;
286 case IT8712_ID:
287 max_units = (chip_rev < 8) ? 255 : 65535;
288 break;
Oliver Schustere1fee942008-03-05 16:48:45 +0100289 case IT8716_ID:
Oliver Schustere1fee942008-03-05 16:48:45 +0100290 case IT8726_ID:
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200291 max_units = 65535;
Oliver Schustere1fee942008-03-05 16:48:45 +0100292 break;
Guenter Roeckcddda072017-06-10 21:04:36 -0700293 case IT8607_ID:
Maciej S. Szmigiero06716122016-12-15 23:52:36 +0100294 case IT8620_ID:
Guenter Roeckcddda072017-06-10 21:04:36 -0700295 case IT8622_ID:
296 case IT8625_ID:
297 case IT8628_ID:
298 case IT8655_ID:
299 case IT8665_ID:
300 case IT8686_ID:
Ondrej Zajicekee3e9652010-09-14 02:47:28 +0200301 case IT8718_ID:
302 case IT8720_ID:
Huaro Tomita4bc30272011-01-21 07:37:51 +0900303 case IT8721_ID:
Diego Elio Pettenò198ca012012-03-14 20:49:04 +0100304 case IT8728_ID:
Paolo Tetif83918f2014-10-19 21:39:33 +0200305 case IT8783_ID:
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200306 max_units = 65535;
Ondrej Zajicekee3e9652010-09-14 02:47:28 +0200307 break;
Oliver Schustere1fee942008-03-05 16:48:45 +0100308 case IT8705_ID:
Joe Perches27c766a2012-02-15 15:06:19 -0800309 pr_err("Unsupported Chip found, Chip %04x Revision %02x\n",
Oliver Schustere1fee942008-03-05 16:48:45 +0100310 chip_type, chip_rev);
311 return -ENODEV;
312 case NO_DEV_ID:
Joe Perches27c766a2012-02-15 15:06:19 -0800313 pr_err("no device\n");
Oliver Schustere1fee942008-03-05 16:48:45 +0100314 return -ENODEV;
315 default:
Joe Perches27c766a2012-02-15 15:06:19 -0800316 pr_err("Unknown Chip found, Chip %04x Revision %04x\n",
Oliver Schustere1fee942008-03-05 16:48:45 +0100317 chip_type, chip_rev);
318 return -ENODEV;
319 }
320
Nat Gurumoorthya134b822011-05-09 11:45:07 -0700321 rc = superio_enter();
322 if (rc)
323 return rc;
Oliver Schustere1fee942008-03-05 16:48:45 +0100324
325 superio_select(GPIO);
326 superio_outb(WDT_TOV1, WDTCFG);
327 superio_outb(0x00, WDTCTRL);
Guenter Roeck893dc8b2017-06-10 21:04:34 -0700328 superio_exit();
Oliver Schustere1fee942008-03-05 16:48:45 +0100329
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200330 if (timeout < 1 || timeout > max_units * 60) {
Oliver Schustere1fee942008-03-05 16:48:45 +0100331 timeout = DEFAULT_TIMEOUT;
Joe Perches27c766a2012-02-15 15:06:19 -0800332 pr_warn("Timeout value out of range, use default %d sec\n",
333 DEFAULT_TIMEOUT);
Oliver Schustere1fee942008-03-05 16:48:45 +0100334 }
335
Ondrej Zajicekdfb0b8e2010-09-14 02:54:16 +0200336 if (timeout > max_units)
337 timeout = wdt_round_time(timeout);
338
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700339 wdt_dev.timeout = timeout;
340 wdt_dev.max_timeout = max_units * 60;
341
Guenter Roeck1123c512017-06-10 21:04:35 -0700342 watchdog_stop_on_reboot(&wdt_dev);
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700343 rc = watchdog_register_device(&wdt_dev);
344 if (rc) {
345 pr_err("Cannot register watchdog device (err=%d)\n", rc);
Guenter Roeck1123c512017-06-10 21:04:35 -0700346 return rc;
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700347 }
348
Guenter Roeck893dc8b2017-06-10 21:04:34 -0700349 pr_info("Chip IT%04x revision %d initialized. timeout=%d sec (nowayout=%d testmode=%d)\n",
350 chip_type, chip_rev, timeout, nowayout, testmode);
Oliver Schustere1fee942008-03-05 16:48:45 +0100351
352 return 0;
Oliver Schustere1fee942008-03-05 16:48:45 +0100353}
354
355static void __exit it87_wdt_exit(void)
356{
Guenter Roeck1d7b8032017-06-10 21:04:33 -0700357 watchdog_unregister_device(&wdt_dev);
Oliver Schustere1fee942008-03-05 16:48:45 +0100358}
359
360module_init(it87_wdt_init);
361module_exit(it87_wdt_exit);
362
363MODULE_AUTHOR("Oliver Schuster");
364MODULE_DESCRIPTION("Hardware Watchdog Device Driver for IT87xx EC-LPC I/O");
365MODULE_LICENSE("GPL");