Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 1 | #ifndef LINUX_MSI_H |
| 2 | #define LINUX_MSI_H |
| 3 | |
Neil Horman | b50cac5 | 2011-10-06 14:08:18 -0400 | [diff] [blame] | 4 | #include <linux/kobject.h> |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 5 | #include <linux/list.h> |
| 6 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 7 | struct msi_msg { |
| 8 | u32 address_lo; /* low 32 bits of msi message address */ |
| 9 | u32 address_hi; /* high 32 bits of msi message address */ |
| 10 | u32 data; /* 16 bits of msi message data */ |
| 11 | }; |
| 12 | |
Yijing Wang | 38737d8 | 2014-10-27 10:44:36 +0800 | [diff] [blame] | 13 | extern int pci_msi_ignore_mask; |
Satoru Takeuchi | c54c187 | 2007-01-18 13:50:05 +0900 | [diff] [blame] | 14 | /* Helper functions */ |
Thomas Gleixner | 1c9db52 | 2010-09-28 16:46:51 +0200 | [diff] [blame] | 15 | struct irq_data; |
Thomas Gleixner | 39431ac | 2010-09-28 19:09:51 +0200 | [diff] [blame] | 16 | struct msi_desc; |
Bjorn Helgaas | 2366d06 | 2013-04-18 10:55:46 -0600 | [diff] [blame] | 17 | void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg); |
Bjorn Helgaas | 2366d06 | 2013-04-18 10:55:46 -0600 | [diff] [blame] | 18 | void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg); |
Jiang Liu | 891d4a4 | 2014-11-09 23:10:33 +0800 | [diff] [blame] | 19 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 20 | struct msi_desc { |
| 21 | struct { |
Matthew Wilcox | 24d2755 | 2009-03-17 08:54:06 -0400 | [diff] [blame] | 22 | __u8 is_msix : 1; |
Yijing Wang | 31ea5d4 | 2014-06-19 16:30:30 +0800 | [diff] [blame] | 23 | __u8 multiple: 3; /* log2 num of messages allocated */ |
| 24 | __u8 multi_cap : 3; /* log2 num of messages supported */ |
Bjorn Helgaas | f762598 | 2013-11-14 11:28:18 -0700 | [diff] [blame] | 25 | __u8 maskbit : 1; /* mask-pending bit supported ? */ |
| 26 | __u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */ |
Bjorn Helgaas | f762598 | 2013-11-14 11:28:18 -0700 | [diff] [blame] | 27 | __u16 entry_nr; /* specific enabled entry */ |
| 28 | unsigned default_irq; /* default pre-assigned irq */ |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 29 | } msi_attrib; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 30 | |
Matthew Wilcox | f2440d9 | 2009-03-17 08:54:09 -0400 | [diff] [blame] | 31 | u32 masked; /* mask bits */ |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 32 | unsigned int irq; |
Alexander Gordeev | 65f6ae6 | 2013-05-13 11:05:48 +0200 | [diff] [blame] | 33 | unsigned int nvec_used; /* number of messages */ |
Michael Ellerman | 4aa9bc9 | 2007-04-05 17:19:10 +1000 | [diff] [blame] | 34 | struct list_head list; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 35 | |
Matthew Wilcox | 264d9ca | 2009-03-17 08:54:08 -0400 | [diff] [blame] | 36 | union { |
| 37 | void __iomem *mask_base; |
| 38 | u8 mask_pos; |
| 39 | }; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 40 | struct pci_dev *dev; |
| 41 | |
Eric W. Biederman | 392ee1e | 2007-03-08 13:04:57 -0700 | [diff] [blame] | 42 | /* Last set MSI message */ |
| 43 | struct msi_msg msg; |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 44 | }; |
| 45 | |
Jiang Liu | d31eb34 | 2014-11-15 22:24:03 +0800 | [diff] [blame] | 46 | /* Helpers to hide struct msi_desc implementation details */ |
| 47 | #define msi_desc_to_dev(desc) (&(desc)->dev.dev) |
| 48 | #define dev_to_msi_list(dev) (&to_pci_dev((dev))->msi_list) |
| 49 | #define first_msi_entry(dev) \ |
| 50 | list_first_entry(dev_to_msi_list((dev)), struct msi_desc, list) |
| 51 | #define for_each_msi_entry(desc, dev) \ |
| 52 | list_for_each_entry((desc), dev_to_msi_list((dev)), list) |
| 53 | |
| 54 | #ifdef CONFIG_PCI_MSI |
| 55 | #define first_pci_msi_entry(pdev) first_msi_entry(&(pdev)->dev) |
| 56 | #define for_each_pci_msi_entry(desc, pdev) \ |
| 57 | for_each_msi_entry((desc), &(pdev)->dev) |
| 58 | |
| 59 | static inline struct pci_dev *msi_desc_to_pci_dev(struct msi_desc *desc) |
| 60 | { |
| 61 | return desc->dev; |
| 62 | } |
| 63 | #endif /* CONFIG_PCI_MSI */ |
| 64 | |
Jiang Liu | 891d4a4 | 2014-11-09 23:10:33 +0800 | [diff] [blame] | 65 | void __pci_read_msi_msg(struct msi_desc *entry, struct msi_msg *msg); |
Jiang Liu | 83a1891 | 2014-11-09 23:10:34 +0800 | [diff] [blame] | 66 | void __pci_write_msi_msg(struct msi_desc *entry, struct msi_msg *msg); |
| 67 | void pci_write_msi_msg(unsigned int irq, struct msi_msg *msg); |
| 68 | |
Thomas Gleixner | 23ed8d5 | 2014-11-23 11:55:58 +0100 | [diff] [blame] | 69 | u32 __pci_msix_desc_mask_irq(struct msi_desc *desc, u32 flag); |
| 70 | u32 __pci_msi_desc_mask_irq(struct msi_desc *desc, u32 mask, u32 flag); |
| 71 | void pci_msi_mask_irq(struct irq_data *data); |
| 72 | void pci_msi_unmask_irq(struct irq_data *data); |
| 73 | |
Jiang Liu | 83a1891 | 2014-11-09 23:10:34 +0800 | [diff] [blame] | 74 | /* Conversion helpers. Should be removed after merging */ |
| 75 | static inline void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg) |
| 76 | { |
| 77 | __pci_write_msi_msg(entry, msg); |
| 78 | } |
| 79 | static inline void write_msi_msg(int irq, struct msi_msg *msg) |
| 80 | { |
| 81 | pci_write_msi_msg(irq, msg); |
| 82 | } |
Thomas Gleixner | 23ed8d5 | 2014-11-23 11:55:58 +0100 | [diff] [blame] | 83 | static inline void mask_msi_irq(struct irq_data *data) |
| 84 | { |
| 85 | pci_msi_mask_irq(data); |
| 86 | } |
| 87 | static inline void unmask_msi_irq(struct irq_data *data) |
| 88 | { |
| 89 | pci_msi_unmask_irq(data); |
| 90 | } |
Jiang Liu | 891d4a4 | 2014-11-09 23:10:33 +0800 | [diff] [blame] | 91 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 92 | /* |
Thomas Petazzoni | 4287d82 | 2013-08-09 22:27:06 +0200 | [diff] [blame] | 93 | * The arch hooks to setup up msi irqs. Those functions are |
| 94 | * implemented as weak symbols so that they /can/ be overriden by |
| 95 | * architecture specific code if needed. |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 96 | */ |
Eric W. Biederman | f7feaca | 2007-01-28 12:56:37 -0700 | [diff] [blame] | 97 | int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 98 | void arch_teardown_msi_irq(unsigned int irq); |
Bjorn Helgaas | 2366d06 | 2013-04-18 10:55:46 -0600 | [diff] [blame] | 99 | int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type); |
| 100 | void arch_teardown_msi_irqs(struct pci_dev *dev); |
DuanZhenzhong | ac8344c | 2013-12-04 13:09:16 +0800 | [diff] [blame] | 101 | void arch_restore_msi_irqs(struct pci_dev *dev); |
Thomas Petazzoni | 4287d82 | 2013-08-09 22:27:06 +0200 | [diff] [blame] | 102 | |
| 103 | void default_teardown_msi_irqs(struct pci_dev *dev); |
DuanZhenzhong | ac8344c | 2013-12-04 13:09:16 +0800 | [diff] [blame] | 104 | void default_restore_msi_irqs(struct pci_dev *dev); |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 105 | |
Yijing Wang | c2791b8 | 2014-11-11 17:45:45 -0700 | [diff] [blame] | 106 | struct msi_controller { |
Thierry Reding | 0cbdcfc | 2013-08-09 22:27:08 +0200 | [diff] [blame] | 107 | struct module *owner; |
| 108 | struct device *dev; |
Thomas Petazzoni | 0d5a6db | 2013-08-09 22:27:09 +0200 | [diff] [blame] | 109 | struct device_node *of_node; |
| 110 | struct list_head list; |
Marc Zyngier | 020c312 | 2014-11-15 10:49:12 +0000 | [diff] [blame] | 111 | #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN |
| 112 | struct irq_domain *domain; |
| 113 | #endif |
Thierry Reding | 0cbdcfc | 2013-08-09 22:27:08 +0200 | [diff] [blame] | 114 | |
Yijing Wang | c2791b8 | 2014-11-11 17:45:45 -0700 | [diff] [blame] | 115 | int (*setup_irq)(struct msi_controller *chip, struct pci_dev *dev, |
Thierry Reding | 0cbdcfc | 2013-08-09 22:27:08 +0200 | [diff] [blame] | 116 | struct msi_desc *desc); |
Yijing Wang | c2791b8 | 2014-11-11 17:45:45 -0700 | [diff] [blame] | 117 | void (*teardown_irq)(struct msi_controller *chip, unsigned int irq); |
Thierry Reding | 0cbdcfc | 2013-08-09 22:27:08 +0200 | [diff] [blame] | 118 | }; |
| 119 | |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 120 | #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 121 | |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 122 | #include <linux/irqhandler.h> |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 123 | #include <asm/msi.h> |
| 124 | |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 125 | struct irq_domain; |
| 126 | struct irq_chip; |
| 127 | struct device_node; |
| 128 | struct msi_domain_info; |
| 129 | |
| 130 | /** |
| 131 | * struct msi_domain_ops - MSI interrupt domain callbacks |
| 132 | * @get_hwirq: Retrieve the resulting hw irq number |
| 133 | * @msi_init: Domain specific init function for MSI interrupts |
| 134 | * @msi_free: Domain specific function to free a MSI interrupts |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 135 | * @msi_check: Callback for verification of the domain/info/dev data |
| 136 | * @msi_prepare: Prepare the allocation of the interrupts in the domain |
| 137 | * @msi_finish: Optional callbacl to finalize the allocation |
| 138 | * @set_desc: Set the msi descriptor for an interrupt |
| 139 | * @handle_error: Optional error handler if the allocation fails |
| 140 | * |
| 141 | * @get_hwirq, @msi_init and @msi_free are callbacks used by |
| 142 | * msi_create_irq_domain() and related interfaces |
| 143 | * |
| 144 | * @msi_check, @msi_prepare, @msi_finish, @set_desc and @handle_error |
| 145 | * are callbacks used by msi_irq_domain_alloc_irqs() and related |
| 146 | * interfaces which are based on msi_desc. |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 147 | */ |
| 148 | struct msi_domain_ops { |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 149 | irq_hw_number_t (*get_hwirq)(struct msi_domain_info *info, |
| 150 | msi_alloc_info_t *arg); |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 151 | int (*msi_init)(struct irq_domain *domain, |
| 152 | struct msi_domain_info *info, |
| 153 | unsigned int virq, irq_hw_number_t hwirq, |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 154 | msi_alloc_info_t *arg); |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 155 | void (*msi_free)(struct irq_domain *domain, |
| 156 | struct msi_domain_info *info, |
| 157 | unsigned int virq); |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 158 | int (*msi_check)(struct irq_domain *domain, |
| 159 | struct msi_domain_info *info, |
| 160 | struct device *dev); |
| 161 | int (*msi_prepare)(struct irq_domain *domain, |
| 162 | struct device *dev, int nvec, |
| 163 | msi_alloc_info_t *arg); |
| 164 | void (*msi_finish)(msi_alloc_info_t *arg, int retval); |
| 165 | void (*set_desc)(msi_alloc_info_t *arg, |
| 166 | struct msi_desc *desc); |
| 167 | int (*handle_error)(struct irq_domain *domain, |
| 168 | struct msi_desc *desc, int error); |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 169 | }; |
| 170 | |
| 171 | /** |
| 172 | * struct msi_domain_info - MSI interrupt domain data |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 173 | * @flags: Flags to decribe features and capabilities |
| 174 | * @ops: The callback data structure |
| 175 | * @chip: Optional: associated interrupt chip |
| 176 | * @chip_data: Optional: associated interrupt chip data |
| 177 | * @handler: Optional: associated interrupt flow handler |
| 178 | * @handler_data: Optional: associated interrupt flow handler data |
| 179 | * @handler_name: Optional: associated interrupt flow handler name |
| 180 | * @data: Optional: domain specific data |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 181 | */ |
| 182 | struct msi_domain_info { |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 183 | u32 flags; |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 184 | struct msi_domain_ops *ops; |
| 185 | struct irq_chip *chip; |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 186 | void *chip_data; |
| 187 | irq_flow_handler_t handler; |
| 188 | void *handler_data; |
| 189 | const char *handler_name; |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 190 | void *data; |
| 191 | }; |
| 192 | |
Jiang Liu | aeeb596 | 2014-11-15 22:24:05 +0800 | [diff] [blame] | 193 | /* Flags for msi_domain_info */ |
| 194 | enum { |
| 195 | /* |
| 196 | * Init non implemented ops callbacks with default MSI domain |
| 197 | * callbacks. |
| 198 | */ |
| 199 | MSI_FLAG_USE_DEF_DOM_OPS = (1 << 0), |
| 200 | /* |
| 201 | * Init non implemented chip callbacks with default MSI chip |
| 202 | * callbacks. |
| 203 | */ |
| 204 | MSI_FLAG_USE_DEF_CHIP_OPS = (1 << 1), |
| 205 | /* Build identity map between hwirq and irq */ |
| 206 | MSI_FLAG_IDENTITY_MAP = (1 << 2), |
| 207 | /* Support multiple PCI MSI interrupts */ |
| 208 | MSI_FLAG_MULTI_PCI_MSI = (1 << 3), |
| 209 | /* Support PCI MSIX interrupts */ |
| 210 | MSI_FLAG_PCI_MSIX = (1 << 4), |
| 211 | }; |
| 212 | |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 213 | int msi_domain_set_affinity(struct irq_data *data, const struct cpumask *mask, |
| 214 | bool force); |
| 215 | |
| 216 | struct irq_domain *msi_create_irq_domain(struct device_node *of_node, |
| 217 | struct msi_domain_info *info, |
| 218 | struct irq_domain *parent); |
Jiang Liu | d910969 | 2014-11-15 22:24:04 +0800 | [diff] [blame] | 219 | int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev, |
| 220 | int nvec); |
| 221 | void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev); |
Jiang Liu | f3cf8bb | 2014-11-12 11:39:03 +0100 | [diff] [blame] | 222 | struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain); |
| 223 | |
| 224 | #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */ |
| 225 | |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 226 | #ifdef CONFIG_PCI_MSI_IRQ_DOMAIN |
| 227 | void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg); |
| 228 | struct irq_domain *pci_msi_create_irq_domain(struct device_node *node, |
| 229 | struct msi_domain_info *info, |
| 230 | struct irq_domain *parent); |
| 231 | int pci_msi_domain_alloc_irqs(struct irq_domain *domain, struct pci_dev *dev, |
| 232 | int nvec, int type); |
| 233 | void pci_msi_domain_free_irqs(struct irq_domain *domain, struct pci_dev *dev); |
Jiang Liu | 8e047ad | 2014-11-15 22:24:07 +0800 | [diff] [blame] | 234 | struct irq_domain *pci_msi_create_default_irq_domain(struct device_node *node, |
| 235 | struct msi_domain_info *info, struct irq_domain *parent); |
| 236 | |
Jiang Liu | 3878eae | 2014-11-11 21:02:18 +0800 | [diff] [blame] | 237 | irq_hw_number_t pci_msi_domain_calc_hwirq(struct pci_dev *dev, |
| 238 | struct msi_desc *desc); |
| 239 | int pci_msi_domain_check_cap(struct irq_domain *domain, |
| 240 | struct msi_domain_info *info, struct device *dev); |
| 241 | #endif /* CONFIG_PCI_MSI_IRQ_DOMAIN */ |
| 242 | |
Eric W. Biederman | 3b7d192 | 2006-10-04 02:16:59 -0700 | [diff] [blame] | 243 | #endif /* LINUX_MSI_H */ |