blob: bb306b4efa4c4a92b9afcce4b9ee8844223165d2 [file] [log] [blame]
Gilad Ben-Yossef4c3f9722018-01-22 09:27:00 +00001// SPDX-License-Identifier: GPL-2.0
2/* Copyright (C) 2012-2018 ARM Limited or its affiliates. */
3
4#include <crypto/authenc.h>
5#include <crypto/scatterwalk.h>
6#include <linux/dmapool.h>
7#include <linux/dma-mapping.h>
8
9#include "cc_buffer_mgr.h"
10#include "cc_lli_defs.h"
Gilad Ben-Yossef63ee04c2018-01-22 09:27:01 +000011#include "cc_cipher.h"
Gilad Ben-Yossef63893812018-01-22 09:27:02 +000012#include "cc_hash.h"
Gilad Ben-Yossef4c3f9722018-01-22 09:27:00 +000013
14enum dma_buffer_type {
15 DMA_NULL_TYPE = -1,
16 DMA_SGL_TYPE = 1,
17 DMA_BUFF_TYPE = 2,
18};
19
20struct buff_mgr_handle {
21 struct dma_pool *mlli_buffs_pool;
22};
23
24union buffer_array_entry {
25 struct scatterlist *sgl;
26 dma_addr_t buffer_dma;
27};
28
29struct buffer_array {
30 unsigned int num_of_buffers;
31 union buffer_array_entry entry[MAX_NUM_OF_BUFFERS_IN_MLLI];
32 unsigned int offset[MAX_NUM_OF_BUFFERS_IN_MLLI];
33 int nents[MAX_NUM_OF_BUFFERS_IN_MLLI];
34 int total_data_len[MAX_NUM_OF_BUFFERS_IN_MLLI];
35 enum dma_buffer_type type[MAX_NUM_OF_BUFFERS_IN_MLLI];
36 bool is_last[MAX_NUM_OF_BUFFERS_IN_MLLI];
37 u32 *mlli_nents[MAX_NUM_OF_BUFFERS_IN_MLLI];
38};
39
40static inline char *cc_dma_buf_type(enum cc_req_dma_buf_type type)
41{
42 switch (type) {
43 case CC_DMA_BUF_NULL:
44 return "BUF_NULL";
45 case CC_DMA_BUF_DLLI:
46 return "BUF_DLLI";
47 case CC_DMA_BUF_MLLI:
48 return "BUF_MLLI";
49 default:
50 return "BUF_INVALID";
51 }
52}
53
54/**
55 * cc_get_sgl_nents() - Get scatterlist number of entries.
56 *
57 * @sg_list: SG list
58 * @nbytes: [IN] Total SGL data bytes.
59 * @lbytes: [OUT] Returns the amount of bytes at the last entry
60 */
61static unsigned int cc_get_sgl_nents(struct device *dev,
62 struct scatterlist *sg_list,
63 unsigned int nbytes, u32 *lbytes,
64 bool *is_chained)
65{
66 unsigned int nents = 0;
67
68 while (nbytes && sg_list) {
69 if (sg_list->length) {
70 nents++;
71 /* get the number of bytes in the last entry */
72 *lbytes = nbytes;
73 nbytes -= (sg_list->length > nbytes) ?
74 nbytes : sg_list->length;
75 sg_list = sg_next(sg_list);
76 } else {
77 sg_list = (struct scatterlist *)sg_page(sg_list);
78 if (is_chained)
79 *is_chained = true;
80 }
81 }
82 dev_dbg(dev, "nents %d last bytes %d\n", nents, *lbytes);
83 return nents;
84}
85
86/**
87 * cc_zero_sgl() - Zero scatter scatter list data.
88 *
89 * @sgl:
90 */
91void cc_zero_sgl(struct scatterlist *sgl, u32 data_len)
92{
93 struct scatterlist *current_sg = sgl;
94 int sg_index = 0;
95
96 while (sg_index <= data_len) {
97 if (!current_sg) {
98 /* reached the end of the sgl --> just return back */
99 return;
100 }
101 memset(sg_virt(current_sg), 0, current_sg->length);
102 sg_index += current_sg->length;
103 current_sg = sg_next(current_sg);
104 }
105}
106
107/**
108 * cc_copy_sg_portion() - Copy scatter list data,
109 * from to_skip to end, to dest and vice versa
110 *
111 * @dest:
112 * @sg:
113 * @to_skip:
114 * @end:
115 * @direct:
116 */
117void cc_copy_sg_portion(struct device *dev, u8 *dest, struct scatterlist *sg,
118 u32 to_skip, u32 end, enum cc_sg_cpy_direct direct)
119{
120 u32 nents, lbytes;
121
122 nents = cc_get_sgl_nents(dev, sg, end, &lbytes, NULL);
123 sg_copy_buffer(sg, nents, (void *)dest, (end - to_skip + 1), to_skip,
124 (direct == CC_SG_TO_BUF));
125}
126
127static int cc_render_buff_to_mlli(struct device *dev, dma_addr_t buff_dma,
128 u32 buff_size, u32 *curr_nents,
129 u32 **mlli_entry_pp)
130{
131 u32 *mlli_entry_p = *mlli_entry_pp;
132 u32 new_nents;
133
134 /* Verify there is no memory overflow*/
135 new_nents = (*curr_nents + buff_size / CC_MAX_MLLI_ENTRY_SIZE + 1);
136 if (new_nents > MAX_NUM_OF_TOTAL_MLLI_ENTRIES)
137 return -ENOMEM;
138
139 /*handle buffer longer than 64 kbytes */
140 while (buff_size > CC_MAX_MLLI_ENTRY_SIZE) {
141 cc_lli_set_addr(mlli_entry_p, buff_dma);
142 cc_lli_set_size(mlli_entry_p, CC_MAX_MLLI_ENTRY_SIZE);
143 dev_dbg(dev, "entry[%d]: single_buff=0x%08X size=%08X\n",
144 *curr_nents, mlli_entry_p[LLI_WORD0_OFFSET],
145 mlli_entry_p[LLI_WORD1_OFFSET]);
146 buff_dma += CC_MAX_MLLI_ENTRY_SIZE;
147 buff_size -= CC_MAX_MLLI_ENTRY_SIZE;
148 mlli_entry_p = mlli_entry_p + 2;
149 (*curr_nents)++;
150 }
151 /*Last entry */
152 cc_lli_set_addr(mlli_entry_p, buff_dma);
153 cc_lli_set_size(mlli_entry_p, buff_size);
154 dev_dbg(dev, "entry[%d]: single_buff=0x%08X size=%08X\n",
155 *curr_nents, mlli_entry_p[LLI_WORD0_OFFSET],
156 mlli_entry_p[LLI_WORD1_OFFSET]);
157 mlli_entry_p = mlli_entry_p + 2;
158 *mlli_entry_pp = mlli_entry_p;
159 (*curr_nents)++;
160 return 0;
161}
162
163static int cc_render_sg_to_mlli(struct device *dev, struct scatterlist *sgl,
164 u32 sgl_data_len, u32 sgl_offset,
165 u32 *curr_nents, u32 **mlli_entry_pp)
166{
167 struct scatterlist *curr_sgl = sgl;
168 u32 *mlli_entry_p = *mlli_entry_pp;
169 s32 rc = 0;
170
171 for ( ; (curr_sgl && sgl_data_len);
172 curr_sgl = sg_next(curr_sgl)) {
173 u32 entry_data_len =
174 (sgl_data_len > sg_dma_len(curr_sgl) - sgl_offset) ?
175 sg_dma_len(curr_sgl) - sgl_offset :
176 sgl_data_len;
177 sgl_data_len -= entry_data_len;
178 rc = cc_render_buff_to_mlli(dev, sg_dma_address(curr_sgl) +
179 sgl_offset, entry_data_len,
180 curr_nents, &mlli_entry_p);
181 if (rc)
182 return rc;
183
184 sgl_offset = 0;
185 }
186 *mlli_entry_pp = mlli_entry_p;
187 return 0;
188}
189
190static int cc_generate_mlli(struct device *dev, struct buffer_array *sg_data,
191 struct mlli_params *mlli_params, gfp_t flags)
192{
193 u32 *mlli_p;
194 u32 total_nents = 0, prev_total_nents = 0;
195 int rc = 0, i;
196
197 dev_dbg(dev, "NUM of SG's = %d\n", sg_data->num_of_buffers);
198
199 /* Allocate memory from the pointed pool */
200 mlli_params->mlli_virt_addr =
201 dma_pool_alloc(mlli_params->curr_pool, flags,
202 &mlli_params->mlli_dma_addr);
203 if (!mlli_params->mlli_virt_addr) {
204 dev_err(dev, "dma_pool_alloc() failed\n");
205 rc = -ENOMEM;
206 goto build_mlli_exit;
207 }
208 /* Point to start of MLLI */
209 mlli_p = (u32 *)mlli_params->mlli_virt_addr;
210 /* go over all SG's and link it to one MLLI table */
211 for (i = 0; i < sg_data->num_of_buffers; i++) {
212 union buffer_array_entry *entry = &sg_data->entry[i];
213 u32 tot_len = sg_data->total_data_len[i];
214 u32 offset = sg_data->offset[i];
215
216 if (sg_data->type[i] == DMA_SGL_TYPE)
217 rc = cc_render_sg_to_mlli(dev, entry->sgl, tot_len,
218 offset, &total_nents,
219 &mlli_p);
220 else /*DMA_BUFF_TYPE*/
221 rc = cc_render_buff_to_mlli(dev, entry->buffer_dma,
222 tot_len, &total_nents,
223 &mlli_p);
224 if (rc)
225 return rc;
226
227 /* set last bit in the current table */
228 if (sg_data->mlli_nents[i]) {
229 /*Calculate the current MLLI table length for the
230 *length field in the descriptor
231 */
232 *sg_data->mlli_nents[i] +=
233 (total_nents - prev_total_nents);
234 prev_total_nents = total_nents;
235 }
236 }
237
238 /* Set MLLI size for the bypass operation */
239 mlli_params->mlli_len = (total_nents * LLI_ENTRY_BYTE_SIZE);
240
241 dev_dbg(dev, "MLLI params: virt_addr=%pK dma_addr=%pad mlli_len=0x%X\n",
242 mlli_params->mlli_virt_addr, &mlli_params->mlli_dma_addr,
243 mlli_params->mlli_len);
244
245build_mlli_exit:
246 return rc;
247}
248
249static void cc_add_sg_entry(struct device *dev, struct buffer_array *sgl_data,
250 unsigned int nents, struct scatterlist *sgl,
251 unsigned int data_len, unsigned int data_offset,
252 bool is_last_table, u32 *mlli_nents)
253{
254 unsigned int index = sgl_data->num_of_buffers;
255
256 dev_dbg(dev, "index=%u nents=%u sgl=%pK data_len=0x%08X is_last=%d\n",
257 index, nents, sgl, data_len, is_last_table);
258 sgl_data->nents[index] = nents;
259 sgl_data->entry[index].sgl = sgl;
260 sgl_data->offset[index] = data_offset;
261 sgl_data->total_data_len[index] = data_len;
262 sgl_data->type[index] = DMA_SGL_TYPE;
263 sgl_data->is_last[index] = is_last_table;
264 sgl_data->mlli_nents[index] = mlli_nents;
265 if (sgl_data->mlli_nents[index])
266 *sgl_data->mlli_nents[index] = 0;
267 sgl_data->num_of_buffers++;
268}
269
270static int cc_dma_map_sg(struct device *dev, struct scatterlist *sg, u32 nents,
271 enum dma_data_direction direction)
272{
273 u32 i, j;
274 struct scatterlist *l_sg = sg;
275
276 for (i = 0; i < nents; i++) {
277 if (!l_sg)
278 break;
279 if (dma_map_sg(dev, l_sg, 1, direction) != 1) {
280 dev_err(dev, "dma_map_page() sg buffer failed\n");
281 goto err;
282 }
283 l_sg = sg_next(l_sg);
284 }
285 return nents;
286
287err:
288 /* Restore mapped parts */
289 for (j = 0; j < i; j++) {
290 if (!sg)
291 break;
292 dma_unmap_sg(dev, sg, 1, direction);
293 sg = sg_next(sg);
294 }
295 return 0;
296}
297
298static int cc_map_sg(struct device *dev, struct scatterlist *sg,
299 unsigned int nbytes, int direction, u32 *nents,
300 u32 max_sg_nents, u32 *lbytes, u32 *mapped_nents)
301{
302 bool is_chained = false;
303
304 if (sg_is_last(sg)) {
305 /* One entry only case -set to DLLI */
306 if (dma_map_sg(dev, sg, 1, direction) != 1) {
307 dev_err(dev, "dma_map_sg() single buffer failed\n");
308 return -ENOMEM;
309 }
310 dev_dbg(dev, "Mapped sg: dma_address=%pad page=%p addr=%pK offset=%u length=%u\n",
311 &sg_dma_address(sg), sg_page(sg), sg_virt(sg),
312 sg->offset, sg->length);
313 *lbytes = nbytes;
314 *nents = 1;
315 *mapped_nents = 1;
316 } else { /*sg_is_last*/
317 *nents = cc_get_sgl_nents(dev, sg, nbytes, lbytes,
318 &is_chained);
319 if (*nents > max_sg_nents) {
320 *nents = 0;
321 dev_err(dev, "Too many fragments. current %d max %d\n",
322 *nents, max_sg_nents);
323 return -ENOMEM;
324 }
325 if (!is_chained) {
326 /* In case of mmu the number of mapped nents might
327 * be changed from the original sgl nents
328 */
329 *mapped_nents = dma_map_sg(dev, sg, *nents, direction);
330 if (*mapped_nents == 0) {
331 *nents = 0;
332 dev_err(dev, "dma_map_sg() sg buffer failed\n");
333 return -ENOMEM;
334 }
335 } else {
336 /*In this case the driver maps entry by entry so it
337 * must have the same nents before and after map
338 */
339 *mapped_nents = cc_dma_map_sg(dev, sg, *nents,
340 direction);
341 if (*mapped_nents != *nents) {
342 *nents = *mapped_nents;
343 dev_err(dev, "dma_map_sg() sg buffer failed\n");
344 return -ENOMEM;
345 }
346 }
347 }
348
349 return 0;
350}
351
Gilad Ben-Yossef63893812018-01-22 09:27:02 +0000352static int cc_set_hash_buf(struct device *dev, struct ahash_req_ctx *areq_ctx,
353 u8 *curr_buff, u32 curr_buff_cnt,
354 struct buffer_array *sg_data)
355{
356 dev_dbg(dev, " handle curr buff %x set to DLLI\n", curr_buff_cnt);
357 /* create sg for the current buffer */
358 sg_init_one(areq_ctx->buff_sg, curr_buff, curr_buff_cnt);
359 if (dma_map_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE) != 1) {
360 dev_err(dev, "dma_map_sg() src buffer failed\n");
361 return -ENOMEM;
362 }
363 dev_dbg(dev, "Mapped curr_buff: dma_address=%pad page=%p addr=%pK offset=%u length=%u\n",
364 &sg_dma_address(areq_ctx->buff_sg), sg_page(areq_ctx->buff_sg),
365 sg_virt(areq_ctx->buff_sg), areq_ctx->buff_sg->offset,
366 areq_ctx->buff_sg->length);
367 areq_ctx->data_dma_buf_type = CC_DMA_BUF_DLLI;
368 areq_ctx->curr_sg = areq_ctx->buff_sg;
369 areq_ctx->in_nents = 0;
370 /* prepare for case of MLLI */
371 cc_add_sg_entry(dev, sg_data, 1, areq_ctx->buff_sg, curr_buff_cnt, 0,
372 false, NULL);
373 return 0;
374}
375
Gilad Ben-Yossef63ee04c2018-01-22 09:27:01 +0000376void cc_unmap_cipher_request(struct device *dev, void *ctx,
Gilad Ben-Yossef63893812018-01-22 09:27:02 +0000377 unsigned int ivsize, struct scatterlist *src,
378 struct scatterlist *dst)
Gilad Ben-Yossef63ee04c2018-01-22 09:27:01 +0000379{
380 struct cipher_req_ctx *req_ctx = (struct cipher_req_ctx *)ctx;
381
382 if (req_ctx->gen_ctx.iv_dma_addr) {
383 dev_dbg(dev, "Unmapped iv: iv_dma_addr=%pad iv_size=%u\n",
384 &req_ctx->gen_ctx.iv_dma_addr, ivsize);
385 dma_unmap_single(dev, req_ctx->gen_ctx.iv_dma_addr,
386 ivsize,
387 req_ctx->is_giv ? DMA_BIDIRECTIONAL :
388 DMA_TO_DEVICE);
389 }
390 /* Release pool */
391 if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI &&
392 req_ctx->mlli_params.mlli_virt_addr) {
393 dma_pool_free(req_ctx->mlli_params.curr_pool,
394 req_ctx->mlli_params.mlli_virt_addr,
395 req_ctx->mlli_params.mlli_dma_addr);
396 }
397
398 dma_unmap_sg(dev, src, req_ctx->in_nents, DMA_BIDIRECTIONAL);
399 dev_dbg(dev, "Unmapped req->src=%pK\n", sg_virt(src));
400
401 if (src != dst) {
402 dma_unmap_sg(dev, dst, req_ctx->out_nents, DMA_BIDIRECTIONAL);
403 dev_dbg(dev, "Unmapped req->dst=%pK\n", sg_virt(dst));
404 }
405}
406
407int cc_map_cipher_request(struct cc_drvdata *drvdata, void *ctx,
408 unsigned int ivsize, unsigned int nbytes,
409 void *info, struct scatterlist *src,
410 struct scatterlist *dst, gfp_t flags)
411{
412 struct cipher_req_ctx *req_ctx = (struct cipher_req_ctx *)ctx;
413 struct mlli_params *mlli_params = &req_ctx->mlli_params;
414 struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
415 struct device *dev = drvdata_to_dev(drvdata);
416 struct buffer_array sg_data;
417 u32 dummy = 0;
418 int rc = 0;
419 u32 mapped_nents = 0;
420
421 req_ctx->dma_buf_type = CC_DMA_BUF_DLLI;
422 mlli_params->curr_pool = NULL;
423 sg_data.num_of_buffers = 0;
424
425 /* Map IV buffer */
426 if (ivsize) {
427 dump_byte_array("iv", (u8 *)info, ivsize);
428 req_ctx->gen_ctx.iv_dma_addr =
429 dma_map_single(dev, (void *)info,
430 ivsize,
431 req_ctx->is_giv ? DMA_BIDIRECTIONAL :
432 DMA_TO_DEVICE);
433 if (dma_mapping_error(dev, req_ctx->gen_ctx.iv_dma_addr)) {
434 dev_err(dev, "Mapping iv %u B at va=%pK for DMA failed\n",
435 ivsize, info);
436 return -ENOMEM;
437 }
438 dev_dbg(dev, "Mapped iv %u B at va=%pK to dma=%pad\n",
439 ivsize, info, &req_ctx->gen_ctx.iv_dma_addr);
440 } else {
441 req_ctx->gen_ctx.iv_dma_addr = 0;
442 }
443
444 /* Map the src SGL */
445 rc = cc_map_sg(dev, src, nbytes, DMA_BIDIRECTIONAL, &req_ctx->in_nents,
446 LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy, &mapped_nents);
447 if (rc) {
448 rc = -ENOMEM;
449 goto cipher_exit;
450 }
451 if (mapped_nents > 1)
452 req_ctx->dma_buf_type = CC_DMA_BUF_MLLI;
453
454 if (src == dst) {
455 /* Handle inplace operation */
456 if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) {
457 req_ctx->out_nents = 0;
458 cc_add_sg_entry(dev, &sg_data, req_ctx->in_nents, src,
459 nbytes, 0, true,
460 &req_ctx->in_mlli_nents);
461 }
462 } else {
463 /* Map the dst sg */
464 if (cc_map_sg(dev, dst, nbytes, DMA_BIDIRECTIONAL,
465 &req_ctx->out_nents, LLI_MAX_NUM_OF_DATA_ENTRIES,
466 &dummy, &mapped_nents)) {
467 rc = -ENOMEM;
468 goto cipher_exit;
469 }
470 if (mapped_nents > 1)
471 req_ctx->dma_buf_type = CC_DMA_BUF_MLLI;
472
473 if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) {
474 cc_add_sg_entry(dev, &sg_data, req_ctx->in_nents, src,
475 nbytes, 0, true,
476 &req_ctx->in_mlli_nents);
477 cc_add_sg_entry(dev, &sg_data, req_ctx->out_nents, dst,
478 nbytes, 0, true,
479 &req_ctx->out_mlli_nents);
480 }
481 }
482
483 if (req_ctx->dma_buf_type == CC_DMA_BUF_MLLI) {
484 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
485 rc = cc_generate_mlli(dev, &sg_data, mlli_params, flags);
486 if (rc)
487 goto cipher_exit;
488 }
489
490 dev_dbg(dev, "areq_ctx->dma_buf_type = %s\n",
491 cc_dma_buf_type(req_ctx->dma_buf_type));
492
493 return 0;
494
495cipher_exit:
496 cc_unmap_cipher_request(dev, req_ctx, ivsize, src, dst);
497 return rc;
498}
499
Gilad Ben-Yossef63893812018-01-22 09:27:02 +0000500int cc_map_hash_request_final(struct cc_drvdata *drvdata, void *ctx,
501 struct scatterlist *src, unsigned int nbytes,
502 bool do_update, gfp_t flags)
503{
504 struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
505 struct device *dev = drvdata_to_dev(drvdata);
506 u8 *curr_buff = cc_hash_buf(areq_ctx);
507 u32 *curr_buff_cnt = cc_hash_buf_cnt(areq_ctx);
508 struct mlli_params *mlli_params = &areq_ctx->mlli_params;
509 struct buffer_array sg_data;
510 struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
511 u32 dummy = 0;
512 u32 mapped_nents = 0;
513
514 dev_dbg(dev, "final params : curr_buff=%pK curr_buff_cnt=0x%X nbytes = 0x%X src=%pK curr_index=%u\n",
515 curr_buff, *curr_buff_cnt, nbytes, src, areq_ctx->buff_index);
516 /* Init the type of the dma buffer */
517 areq_ctx->data_dma_buf_type = CC_DMA_BUF_NULL;
518 mlli_params->curr_pool = NULL;
519 sg_data.num_of_buffers = 0;
520 areq_ctx->in_nents = 0;
521
522 if (nbytes == 0 && *curr_buff_cnt == 0) {
523 /* nothing to do */
524 return 0;
525 }
526
527 /*TODO: copy data in case that buffer is enough for operation */
528 /* map the previous buffer */
529 if (*curr_buff_cnt) {
530 if (cc_set_hash_buf(dev, areq_ctx, curr_buff, *curr_buff_cnt,
531 &sg_data)) {
532 return -ENOMEM;
533 }
534 }
535
536 if (src && nbytes > 0 && do_update) {
537 if (cc_map_sg(dev, src, nbytes, DMA_TO_DEVICE,
538 &areq_ctx->in_nents, LLI_MAX_NUM_OF_DATA_ENTRIES,
539 &dummy, &mapped_nents)) {
540 goto unmap_curr_buff;
541 }
542 if (src && mapped_nents == 1 &&
543 areq_ctx->data_dma_buf_type == CC_DMA_BUF_NULL) {
544 memcpy(areq_ctx->buff_sg, src,
545 sizeof(struct scatterlist));
546 areq_ctx->buff_sg->length = nbytes;
547 areq_ctx->curr_sg = areq_ctx->buff_sg;
548 areq_ctx->data_dma_buf_type = CC_DMA_BUF_DLLI;
549 } else {
550 areq_ctx->data_dma_buf_type = CC_DMA_BUF_MLLI;
551 }
552 }
553
554 /*build mlli */
555 if (areq_ctx->data_dma_buf_type == CC_DMA_BUF_MLLI) {
556 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
557 /* add the src data to the sg_data */
558 cc_add_sg_entry(dev, &sg_data, areq_ctx->in_nents, src, nbytes,
559 0, true, &areq_ctx->mlli_nents);
560 if (cc_generate_mlli(dev, &sg_data, mlli_params, flags))
561 goto fail_unmap_din;
562 }
563 /* change the buffer index for the unmap function */
564 areq_ctx->buff_index = (areq_ctx->buff_index ^ 1);
565 dev_dbg(dev, "areq_ctx->data_dma_buf_type = %s\n",
566 cc_dma_buf_type(areq_ctx->data_dma_buf_type));
567 return 0;
568
569fail_unmap_din:
570 dma_unmap_sg(dev, src, areq_ctx->in_nents, DMA_TO_DEVICE);
571
572unmap_curr_buff:
573 if (*curr_buff_cnt)
574 dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
575
576 return -ENOMEM;
577}
578
579int cc_map_hash_request_update(struct cc_drvdata *drvdata, void *ctx,
580 struct scatterlist *src, unsigned int nbytes,
581 unsigned int block_size, gfp_t flags)
582{
583 struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
584 struct device *dev = drvdata_to_dev(drvdata);
585 u8 *curr_buff = cc_hash_buf(areq_ctx);
586 u32 *curr_buff_cnt = cc_hash_buf_cnt(areq_ctx);
587 u8 *next_buff = cc_next_buf(areq_ctx);
588 u32 *next_buff_cnt = cc_next_buf_cnt(areq_ctx);
589 struct mlli_params *mlli_params = &areq_ctx->mlli_params;
590 unsigned int update_data_len;
591 u32 total_in_len = nbytes + *curr_buff_cnt;
592 struct buffer_array sg_data;
593 struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
594 unsigned int swap_index = 0;
595 u32 dummy = 0;
596 u32 mapped_nents = 0;
597
598 dev_dbg(dev, " update params : curr_buff=%pK curr_buff_cnt=0x%X nbytes=0x%X src=%pK curr_index=%u\n",
599 curr_buff, *curr_buff_cnt, nbytes, src, areq_ctx->buff_index);
600 /* Init the type of the dma buffer */
601 areq_ctx->data_dma_buf_type = CC_DMA_BUF_NULL;
602 mlli_params->curr_pool = NULL;
603 areq_ctx->curr_sg = NULL;
604 sg_data.num_of_buffers = 0;
605 areq_ctx->in_nents = 0;
606
607 if (total_in_len < block_size) {
608 dev_dbg(dev, " less than one block: curr_buff=%pK *curr_buff_cnt=0x%X copy_to=%pK\n",
609 curr_buff, *curr_buff_cnt, &curr_buff[*curr_buff_cnt]);
610 areq_ctx->in_nents =
611 cc_get_sgl_nents(dev, src, nbytes, &dummy, NULL);
612 sg_copy_to_buffer(src, areq_ctx->in_nents,
613 &curr_buff[*curr_buff_cnt], nbytes);
614 *curr_buff_cnt += nbytes;
615 return 1;
616 }
617
618 /* Calculate the residue size*/
619 *next_buff_cnt = total_in_len & (block_size - 1);
620 /* update data len */
621 update_data_len = total_in_len - *next_buff_cnt;
622
623 dev_dbg(dev, " temp length : *next_buff_cnt=0x%X update_data_len=0x%X\n",
624 *next_buff_cnt, update_data_len);
625
626 /* Copy the new residue to next buffer */
627 if (*next_buff_cnt) {
628 dev_dbg(dev, " handle residue: next buff %pK skip data %u residue %u\n",
629 next_buff, (update_data_len - *curr_buff_cnt),
630 *next_buff_cnt);
631 cc_copy_sg_portion(dev, next_buff, src,
632 (update_data_len - *curr_buff_cnt),
633 nbytes, CC_SG_TO_BUF);
634 /* change the buffer index for next operation */
635 swap_index = 1;
636 }
637
638 if (*curr_buff_cnt) {
639 if (cc_set_hash_buf(dev, areq_ctx, curr_buff, *curr_buff_cnt,
640 &sg_data)) {
641 return -ENOMEM;
642 }
643 /* change the buffer index for next operation */
644 swap_index = 1;
645 }
646
647 if (update_data_len > *curr_buff_cnt) {
648 if (cc_map_sg(dev, src, (update_data_len - *curr_buff_cnt),
649 DMA_TO_DEVICE, &areq_ctx->in_nents,
650 LLI_MAX_NUM_OF_DATA_ENTRIES, &dummy,
651 &mapped_nents)) {
652 goto unmap_curr_buff;
653 }
654 if (mapped_nents == 1 &&
655 areq_ctx->data_dma_buf_type == CC_DMA_BUF_NULL) {
656 /* only one entry in the SG and no previous data */
657 memcpy(areq_ctx->buff_sg, src,
658 sizeof(struct scatterlist));
659 areq_ctx->buff_sg->length = update_data_len;
660 areq_ctx->data_dma_buf_type = CC_DMA_BUF_DLLI;
661 areq_ctx->curr_sg = areq_ctx->buff_sg;
662 } else {
663 areq_ctx->data_dma_buf_type = CC_DMA_BUF_MLLI;
664 }
665 }
666
667 if (areq_ctx->data_dma_buf_type == CC_DMA_BUF_MLLI) {
668 mlli_params->curr_pool = buff_mgr->mlli_buffs_pool;
669 /* add the src data to the sg_data */
670 cc_add_sg_entry(dev, &sg_data, areq_ctx->in_nents, src,
671 (update_data_len - *curr_buff_cnt), 0, true,
672 &areq_ctx->mlli_nents);
673 if (cc_generate_mlli(dev, &sg_data, mlli_params, flags))
674 goto fail_unmap_din;
675 }
676 areq_ctx->buff_index = (areq_ctx->buff_index ^ swap_index);
677
678 return 0;
679
680fail_unmap_din:
681 dma_unmap_sg(dev, src, areq_ctx->in_nents, DMA_TO_DEVICE);
682
683unmap_curr_buff:
684 if (*curr_buff_cnt)
685 dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
686
687 return -ENOMEM;
688}
689
690void cc_unmap_hash_request(struct device *dev, void *ctx,
691 struct scatterlist *src, bool do_revert)
692{
693 struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
694 u32 *prev_len = cc_next_buf_cnt(areq_ctx);
695
696 /*In case a pool was set, a table was
697 *allocated and should be released
698 */
699 if (areq_ctx->mlli_params.curr_pool) {
700 dev_dbg(dev, "free MLLI buffer: dma=%pad virt=%pK\n",
701 &areq_ctx->mlli_params.mlli_dma_addr,
702 areq_ctx->mlli_params.mlli_virt_addr);
703 dma_pool_free(areq_ctx->mlli_params.curr_pool,
704 areq_ctx->mlli_params.mlli_virt_addr,
705 areq_ctx->mlli_params.mlli_dma_addr);
706 }
707
708 if (src && areq_ctx->in_nents) {
709 dev_dbg(dev, "Unmapped sg src: virt=%pK dma=%pad len=0x%X\n",
710 sg_virt(src), &sg_dma_address(src), sg_dma_len(src));
711 dma_unmap_sg(dev, src,
712 areq_ctx->in_nents, DMA_TO_DEVICE);
713 }
714
715 if (*prev_len) {
716 dev_dbg(dev, "Unmapped buffer: areq_ctx->buff_sg=%pK dma=%pad len 0x%X\n",
717 sg_virt(areq_ctx->buff_sg),
718 &sg_dma_address(areq_ctx->buff_sg),
719 sg_dma_len(areq_ctx->buff_sg));
720 dma_unmap_sg(dev, areq_ctx->buff_sg, 1, DMA_TO_DEVICE);
721 if (!do_revert) {
722 /* clean the previous data length for update
723 * operation
724 */
725 *prev_len = 0;
726 } else {
727 areq_ctx->buff_index ^= 1;
728 }
729 }
730}
731
Gilad Ben-Yossef4c3f9722018-01-22 09:27:00 +0000732int cc_buffer_mgr_init(struct cc_drvdata *drvdata)
733{
734 struct buff_mgr_handle *buff_mgr_handle;
735 struct device *dev = drvdata_to_dev(drvdata);
736
737 buff_mgr_handle = kmalloc(sizeof(*buff_mgr_handle), GFP_KERNEL);
738 if (!buff_mgr_handle)
739 return -ENOMEM;
740
741 drvdata->buff_mgr_handle = buff_mgr_handle;
742
743 buff_mgr_handle->mlli_buffs_pool =
744 dma_pool_create("dx_single_mlli_tables", dev,
745 MAX_NUM_OF_TOTAL_MLLI_ENTRIES *
746 LLI_ENTRY_BYTE_SIZE,
747 MLLI_TABLE_MIN_ALIGNMENT, 0);
748
749 if (!buff_mgr_handle->mlli_buffs_pool)
750 goto error;
751
752 return 0;
753
754error:
755 cc_buffer_mgr_fini(drvdata);
756 return -ENOMEM;
757}
758
759int cc_buffer_mgr_fini(struct cc_drvdata *drvdata)
760{
761 struct buff_mgr_handle *buff_mgr_handle = drvdata->buff_mgr_handle;
762
763 if (buff_mgr_handle) {
764 dma_pool_destroy(buff_mgr_handle->mlli_buffs_pool);
765 kfree(drvdata->buff_mgr_handle);
766 drvdata->buff_mgr_handle = NULL;
767 }
768 return 0;
769}