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gerrit-public.fairphone.software / kernel / msm-4.19 / ffa2ea3f5d32b21cba80e9274a0c5bcd766987ef / . / arch / sparc / include / asm / ttable.h
blob: 48f2807d326563da2bc95be4f870517685331aaf [file] [log] [blame]
Sam Ravnborga00736e2008-06-19 20:26:19 +0200[diff] [blame]1#ifndef _SPARC64_TTABLE_H
2#define _SPARC64_TTABLE_H
3
4#include <asm/utrap.h>
David S. Millerb4f43722008-11-23 21:55:29 -0800[diff] [blame]5#include <asm/pil.h>
Sam Ravnborga00736e2008-06-19 20:26:19 +0200[diff] [blame]6
7#ifdef __ASSEMBLY__
8#include <asm/thread_info.h>
9#endif
10
11#define BOOT_KERNEL b sparc64_boot; nop; nop; nop; nop; nop; nop; nop;
12
13/* We need a "cleaned" instruction... */
14#define CLEAN_WINDOW \
15 rdpr %cleanwin, %l0; add %l0, 1, %l0; \
16 wrpr %l0, 0x0, %cleanwin; \
17 clr %o0; clr %o1; clr %o2; clr %o3; \
18 clr %o4; clr %o5; clr %o6; clr %o7; \
19 clr %l0; clr %l1; clr %l2; clr %l3; \
20 clr %l4; clr %l5; clr %l6; clr %l7; \
21 retry; \
22 nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
23
24#define TRAP(routine) \
25 sethi %hi(109f), %g7; \
26 ba,pt %xcc, etrap; \
27109: or %g7, %lo(109b), %g7; \
28 call routine; \
29 add %sp, PTREGS_OFF, %o0; \
30 ba,pt %xcc, rtrap; \
31 nop; \
32 nop;
33
34#define TRAP_7INSNS(routine) \
35 sethi %hi(109f), %g7; \
36 ba,pt %xcc, etrap; \
37109: or %g7, %lo(109b), %g7; \
38 call routine; \
39 add %sp, PTREGS_OFF, %o0; \
40 ba,pt %xcc, rtrap; \
41 nop;
42
43#define TRAP_SAVEFPU(routine) \
44 sethi %hi(109f), %g7; \
45 ba,pt %xcc, do_fptrap; \
46109: or %g7, %lo(109b), %g7; \
47 call routine; \
48 add %sp, PTREGS_OFF, %o0; \
49 ba,pt %xcc, rtrap; \
50 nop; \
51 nop;
52
53#define TRAP_NOSAVE(routine) \
54 ba,pt %xcc, routine; \
55 nop; \
56 nop; nop; nop; nop; nop; nop;
57
58#define TRAP_NOSAVE_7INSNS(routine) \
59 ba,pt %xcc, routine; \
60 nop; \
61 nop; nop; nop; nop; nop;
62
63#define TRAPTL1(routine) \
64 sethi %hi(109f), %g7; \
65 ba,pt %xcc, etraptl1; \
66109: or %g7, %lo(109b), %g7; \
67 call routine; \
68 add %sp, PTREGS_OFF, %o0; \
69 ba,pt %xcc, rtrap; \
70 nop; \
71 nop;
72
73#define TRAP_ARG(routine, arg) \
74 sethi %hi(109f), %g7; \
75 ba,pt %xcc, etrap; \
76109: or %g7, %lo(109b), %g7; \
77 add %sp, PTREGS_OFF, %o0; \
78 call routine; \
79 mov arg, %o1; \
80 ba,pt %xcc, rtrap; \
81 nop;
82
83#define TRAPTL1_ARG(routine, arg) \
84 sethi %hi(109f), %g7; \
85 ba,pt %xcc, etraptl1; \
86109: or %g7, %lo(109b), %g7; \
87 add %sp, PTREGS_OFF, %o0; \
88 call routine; \
89 mov arg, %o1; \
90 ba,pt %xcc, rtrap; \
91 nop;
92
93#define SYSCALL_TRAP(routine, systbl) \
94 rdpr %pil, %g2; \
95 mov TSTATE_SYSCALL, %g3; \
96 sethi %hi(109f), %g7; \
97 ba,pt %xcc, etrap_syscall; \
98109: or %g7, %lo(109b), %g7; \
99 sethi %hi(systbl), %l7; \
100 ba,pt %xcc, routine; \
101 or %l7, %lo(systbl), %l7;
102
103#define TRAP_UTRAP(handler,lvl) \
104 mov handler, %g3; \
105 ba,pt %xcc, utrap_trap; \
106 mov lvl, %g4; \
107 nop; \
108 nop; \
109 nop; \
110 nop; \
111 nop;
112
113#ifdef CONFIG_COMPAT
114#define LINUX_32BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall32, sys_call_table32)
115#else
116#define LINUX_32BIT_SYSCALL_TRAP BTRAP(0x110)
117#endif
118#define LINUX_64BIT_SYSCALL_TRAP SYSCALL_TRAP(linux_sparc_syscall, sys_call_table64)
119#define GETCC_TRAP TRAP(getcc)
120#define SETCC_TRAP TRAP(setcc)
121#define BREAKPOINT_TRAP TRAP(breakpoint_trap)
122
123#ifdef CONFIG_TRACE_IRQFLAGS
124
125#define TRAP_IRQ(routine, level) \
126 rdpr %pil, %g2; \
David S. Millerb4f43722008-11-23 21:55:29 -0800[diff] [blame]127 wrpr %g0, PIL_NORMAL_MAX, %pil; \
Sam Ravnborga00736e2008-06-19 20:26:19 +0200[diff] [blame]128 sethi %hi(1f-4), %g7; \
129 ba,pt %xcc, etrap_irq; \
130 or %g7, %lo(1f-4), %g7; \
131 nop; \
132 nop; \
133 nop; \
134 .subsection 2; \
1351: call trace_hardirqs_off; \
136 nop; \
137 mov level, %o0; \
138 call routine; \
139 add %sp, PTREGS_OFF, %o1; \
140 ba,a,pt %xcc, rtrap_irq; \
141 .previous;
142
143#else
144
145#define TRAP_IRQ(routine, level) \
146 rdpr %pil, %g2; \
David S. Millerb4f43722008-11-23 21:55:29 -0800[diff] [blame]147 wrpr %g0, PIL_NORMAL_MAX, %pil; \
Sam Ravnborga00736e2008-06-19 20:26:19 +0200[diff] [blame]148 ba,pt %xcc, etrap_irq; \
149 rd %pc, %g7; \
150 mov level, %o0; \
151 call routine; \
152 add %sp, PTREGS_OFF, %o1; \
153 ba,a,pt %xcc, rtrap_irq;
154
155#endif
156
David S. Millerb4f43722008-11-23 21:55:29 -0800[diff] [blame]157#define TRAP_NMI_IRQ(routine, level) \
158 rdpr %pil, %g2; \
159 wrpr %g0, PIL_NMI, %pil; \
160 ba,pt %xcc, etrap_irq; \
161 rd %pc, %g7; \
162 mov level, %o0; \
163 call routine; \
164 add %sp, PTREGS_OFF, %o1; \
David S. Miller55657362008-11-25 22:24:59 -0800[diff] [blame]165 ba,a,pt %xcc, rtrap_nmi;
David S. Millerb4f43722008-11-23 21:55:29 -0800[diff] [blame]166
Sam Ravnborga00736e2008-06-19 20:26:19 +0200[diff] [blame]167#define TRAP_IVEC TRAP_NOSAVE(do_ivec)
168
169#define BTRAP(lvl) TRAP_ARG(bad_trap, lvl)
170
171#define BTRAPTL1(lvl) TRAPTL1_ARG(bad_trap_tl1, lvl)
172
173#define FLUSH_WINDOW_TRAP \
174 ba,pt %xcc, etrap; \
175 rd %pc, %g7; \
176 flushw; \
177 ldx [%sp + PTREGS_OFF + PT_V9_TNPC], %l1; \
178 add %l1, 4, %l2; \
179 stx %l1, [%sp + PTREGS_OFF + PT_V9_TPC]; \
180 ba,pt %xcc, rtrap; \
181 stx %l2, [%sp + PTREGS_OFF + PT_V9_TNPC];
182
183#ifdef CONFIG_KPROBES
184#define KPROBES_TRAP(lvl) TRAP_IRQ(kprobe_trap, lvl)
185#else
186#define KPROBES_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
187#endif
188
189#ifdef CONFIG_KGDB
190#define KGDB_TRAP(lvl) TRAP_IRQ(kgdb_trap, lvl)
191#else
192#define KGDB_TRAP(lvl) TRAP_ARG(bad_trap, lvl)
193#endif
194
195#define SUN4V_ITSB_MISS \
196 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
197 ldx [%g2 + HV_FAULT_I_ADDR_OFFSET], %g4; \
198 ldx [%g2 + HV_FAULT_I_CTX_OFFSET], %g5; \
199 srlx %g4, 22, %g6; \
200 ba,pt %xcc, sun4v_itsb_miss; \
201 nop; \
202 nop; \
203 nop;
204
205#define SUN4V_DTSB_MISS \
206 ldxa [%g0] ASI_SCRATCHPAD, %g2; \
207 ldx [%g2 + HV_FAULT_D_ADDR_OFFSET], %g4; \
208 ldx [%g2 + HV_FAULT_D_CTX_OFFSET], %g5; \
209 srlx %g4, 22, %g6; \
210 ba,pt %xcc, sun4v_dtsb_miss; \
211 nop; \
212 nop; \
213 nop;
214
215/* Before touching these macros, you owe it to yourself to go and
216 * see how arch/sparc64/kernel/winfixup.S works... -DaveM
217 *
218 * For the user cases we used to use the %asi register, but
219 * it turns out that the "wr xxx, %asi" costs ~5 cycles, so
220 * now we use immediate ASI loads and stores instead. Kudos
221 * to Greg Onufer for pointing out this performance anomaly.
222 *
223 * Further note that we cannot use the g2, g4, g5, and g7 alternate
224 * globals in the spill routines, check out the save instruction in
225 * arch/sparc64/kernel/etrap.S to see what I mean about g2, and
226 * g4/g5 are the globals which are preserved by etrap processing
227 * for the caller of it. The g7 register is the return pc for
228 * etrap. Finally, g6 is the current thread register so we cannot
229 * us it in the spill handlers either. Most of these rules do not
230 * apply to fill processing, only g6 is not usable.
231 */
232
233/* Normal kernel spill */
234#define SPILL_0_NORMAL \
235 stx %l0, [%sp + STACK_BIAS + 0x00]; \
236 stx %l1, [%sp + STACK_BIAS + 0x08]; \
237 stx %l2, [%sp + STACK_BIAS + 0x10]; \
238 stx %l3, [%sp + STACK_BIAS + 0x18]; \
239 stx %l4, [%sp + STACK_BIAS + 0x20]; \
240 stx %l5, [%sp + STACK_BIAS + 0x28]; \
241 stx %l6, [%sp + STACK_BIAS + 0x30]; \
242 stx %l7, [%sp + STACK_BIAS + 0x38]; \
243 stx %i0, [%sp + STACK_BIAS + 0x40]; \
244 stx %i1, [%sp + STACK_BIAS + 0x48]; \
245 stx %i2, [%sp + STACK_BIAS + 0x50]; \
246 stx %i3, [%sp + STACK_BIAS + 0x58]; \
247 stx %i4, [%sp + STACK_BIAS + 0x60]; \
248 stx %i5, [%sp + STACK_BIAS + 0x68]; \
249 stx %i6, [%sp + STACK_BIAS + 0x70]; \
250 stx %i7, [%sp + STACK_BIAS + 0x78]; \
251 saved; retry; nop; nop; nop; nop; nop; nop; \
252 nop; nop; nop; nop; nop; nop; nop; nop;
253
254#define SPILL_0_NORMAL_ETRAP \
255etrap_kernel_spill: \
256 stx %l0, [%sp + STACK_BIAS + 0x00]; \
257 stx %l1, [%sp + STACK_BIAS + 0x08]; \
258 stx %l2, [%sp + STACK_BIAS + 0x10]; \
259 stx %l3, [%sp + STACK_BIAS + 0x18]; \
260 stx %l4, [%sp + STACK_BIAS + 0x20]; \
261 stx %l5, [%sp + STACK_BIAS + 0x28]; \
262 stx %l6, [%sp + STACK_BIAS + 0x30]; \
263 stx %l7, [%sp + STACK_BIAS + 0x38]; \
264 stx %i0, [%sp + STACK_BIAS + 0x40]; \
265 stx %i1, [%sp + STACK_BIAS + 0x48]; \
266 stx %i2, [%sp + STACK_BIAS + 0x50]; \
267 stx %i3, [%sp + STACK_BIAS + 0x58]; \
268 stx %i4, [%sp + STACK_BIAS + 0x60]; \
269 stx %i5, [%sp + STACK_BIAS + 0x68]; \
270 stx %i6, [%sp + STACK_BIAS + 0x70]; \
271 stx %i7, [%sp + STACK_BIAS + 0x78]; \
272 saved; \
273 sub %g1, 2, %g1; \
274 ba,pt %xcc, etrap_save; \
275 wrpr %g1, %cwp; \
276 nop; nop; nop; nop; nop; nop; nop; nop; \
277 nop; nop; nop; nop;
278
279/* Normal 64bit spill */
280#define SPILL_1_GENERIC(ASI) \
281 add %sp, STACK_BIAS + 0x00, %g1; \
282 stxa %l0, [%g1 + %g0] ASI; \
283 mov 0x08, %g3; \
284 stxa %l1, [%g1 + %g3] ASI; \
285 add %g1, 0x10, %g1; \
286 stxa %l2, [%g1 + %g0] ASI; \
287 stxa %l3, [%g1 + %g3] ASI; \
288 add %g1, 0x10, %g1; \
289 stxa %l4, [%g1 + %g0] ASI; \
290 stxa %l5, [%g1 + %g3] ASI; \
291 add %g1, 0x10, %g1; \
292 stxa %l6, [%g1 + %g0] ASI; \
293 stxa %l7, [%g1 + %g3] ASI; \
294 add %g1, 0x10, %g1; \
295 stxa %i0, [%g1 + %g0] ASI; \
296 stxa %i1, [%g1 + %g3] ASI; \
297 add %g1, 0x10, %g1; \
298 stxa %i2, [%g1 + %g0] ASI; \
299 stxa %i3, [%g1 + %g3] ASI; \
300 add %g1, 0x10, %g1; \
301 stxa %i4, [%g1 + %g0] ASI; \
302 stxa %i5, [%g1 + %g3] ASI; \
303 add %g1, 0x10, %g1; \
304 stxa %i6, [%g1 + %g0] ASI; \
305 stxa %i7, [%g1 + %g3] ASI; \
306 saved; \
307 retry; nop; nop; \
308 b,a,pt %xcc, spill_fixup_dax; \
309 b,a,pt %xcc, spill_fixup_mna; \
310 b,a,pt %xcc, spill_fixup;
311
312#define SPILL_1_GENERIC_ETRAP \
313etrap_user_spill_64bit: \
314 stxa %l0, [%sp + STACK_BIAS + 0x00] %asi; \
315 stxa %l1, [%sp + STACK_BIAS + 0x08] %asi; \
316 stxa %l2, [%sp + STACK_BIAS + 0x10] %asi; \
317 stxa %l3, [%sp + STACK_BIAS + 0x18] %asi; \
318 stxa %l4, [%sp + STACK_BIAS + 0x20] %asi; \
319 stxa %l5, [%sp + STACK_BIAS + 0x28] %asi; \
320 stxa %l6, [%sp + STACK_BIAS + 0x30] %asi; \
321 stxa %l7, [%sp + STACK_BIAS + 0x38] %asi; \
322 stxa %i0, [%sp + STACK_BIAS + 0x40] %asi; \
323 stxa %i1, [%sp + STACK_BIAS + 0x48] %asi; \
324 stxa %i2, [%sp + STACK_BIAS + 0x50] %asi; \
325 stxa %i3, [%sp + STACK_BIAS + 0x58] %asi; \
326 stxa %i4, [%sp + STACK_BIAS + 0x60] %asi; \
327 stxa %i5, [%sp + STACK_BIAS + 0x68] %asi; \
328 stxa %i6, [%sp + STACK_BIAS + 0x70] %asi; \
329 stxa %i7, [%sp + STACK_BIAS + 0x78] %asi; \
330 saved; \
331 sub %g1, 2, %g1; \
332 ba,pt %xcc, etrap_save; \
333 wrpr %g1, %cwp; \
334 nop; nop; nop; nop; nop; \
335 nop; nop; nop; nop; \
336 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
337 ba,a,pt %xcc, etrap_spill_fixup_64bit; \
338 ba,a,pt %xcc, etrap_spill_fixup_64bit;
339
340#define SPILL_1_GENERIC_ETRAP_FIXUP \
341etrap_spill_fixup_64bit: \
342 ldub [%g6 + TI_WSAVED], %g1; \
343 sll %g1, 3, %g3; \
344 add %g6, %g3, %g3; \
345 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
346 sll %g1, 7, %g3; \
347 add %g6, %g3, %g3; \
348 stx %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
349 stx %l1, [%g3 + TI_REG_WINDOW + 0x08]; \
350 stx %l2, [%g3 + TI_REG_WINDOW + 0x10]; \
351 stx %l3, [%g3 + TI_REG_WINDOW + 0x18]; \
352 stx %l4, [%g3 + TI_REG_WINDOW + 0x20]; \
353 stx %l5, [%g3 + TI_REG_WINDOW + 0x28]; \
354 stx %l6, [%g3 + TI_REG_WINDOW + 0x30]; \
355 stx %l7, [%g3 + TI_REG_WINDOW + 0x38]; \
356 stx %i0, [%g3 + TI_REG_WINDOW + 0x40]; \
357 stx %i1, [%g3 + TI_REG_WINDOW + 0x48]; \
358 stx %i2, [%g3 + TI_REG_WINDOW + 0x50]; \
359 stx %i3, [%g3 + TI_REG_WINDOW + 0x58]; \
360 stx %i4, [%g3 + TI_REG_WINDOW + 0x60]; \
361 stx %i5, [%g3 + TI_REG_WINDOW + 0x68]; \
362 stx %i6, [%g3 + TI_REG_WINDOW + 0x70]; \
363 stx %i7, [%g3 + TI_REG_WINDOW + 0x78]; \
364 add %g1, 1, %g1; \
365 stb %g1, [%g6 + TI_WSAVED]; \
366 saved; \
367 rdpr %cwp, %g1; \
368 sub %g1, 2, %g1; \
369 ba,pt %xcc, etrap_save; \
370 wrpr %g1, %cwp; \
371 nop; nop; nop
372
373/* Normal 32bit spill */
374#define SPILL_2_GENERIC(ASI) \
375 srl %sp, 0, %sp; \
376 stwa %l0, [%sp + %g0] ASI; \
377 mov 0x04, %g3; \
378 stwa %l1, [%sp + %g3] ASI; \
379 add %sp, 0x08, %g1; \
380 stwa %l2, [%g1 + %g0] ASI; \
381 stwa %l3, [%g1 + %g3] ASI; \
382 add %g1, 0x08, %g1; \
383 stwa %l4, [%g1 + %g0] ASI; \
384 stwa %l5, [%g1 + %g3] ASI; \
385 add %g1, 0x08, %g1; \
386 stwa %l6, [%g1 + %g0] ASI; \
387 stwa %l7, [%g1 + %g3] ASI; \
388 add %g1, 0x08, %g1; \
389 stwa %i0, [%g1 + %g0] ASI; \
390 stwa %i1, [%g1 + %g3] ASI; \
391 add %g1, 0x08, %g1; \
392 stwa %i2, [%g1 + %g0] ASI; \
393 stwa %i3, [%g1 + %g3] ASI; \
394 add %g1, 0x08, %g1; \
395 stwa %i4, [%g1 + %g0] ASI; \
396 stwa %i5, [%g1 + %g3] ASI; \
397 add %g1, 0x08, %g1; \
398 stwa %i6, [%g1 + %g0] ASI; \
399 stwa %i7, [%g1 + %g3] ASI; \
400 saved; \
401 retry; nop; nop; \
402 b,a,pt %xcc, spill_fixup_dax; \
403 b,a,pt %xcc, spill_fixup_mna; \
404 b,a,pt %xcc, spill_fixup;
405
406#define SPILL_2_GENERIC_ETRAP \
407etrap_user_spill_32bit: \
408 srl %sp, 0, %sp; \
409 stwa %l0, [%sp + 0x00] %asi; \
410 stwa %l1, [%sp + 0x04] %asi; \
411 stwa %l2, [%sp + 0x08] %asi; \
412 stwa %l3, [%sp + 0x0c] %asi; \
413 stwa %l4, [%sp + 0x10] %asi; \
414 stwa %l5, [%sp + 0x14] %asi; \
415 stwa %l6, [%sp + 0x18] %asi; \
416 stwa %l7, [%sp + 0x1c] %asi; \
417 stwa %i0, [%sp + 0x20] %asi; \
418 stwa %i1, [%sp + 0x24] %asi; \
419 stwa %i2, [%sp + 0x28] %asi; \
420 stwa %i3, [%sp + 0x2c] %asi; \
421 stwa %i4, [%sp + 0x30] %asi; \
422 stwa %i5, [%sp + 0x34] %asi; \
423 stwa %i6, [%sp + 0x38] %asi; \
424 stwa %i7, [%sp + 0x3c] %asi; \
425 saved; \
426 sub %g1, 2, %g1; \
427 ba,pt %xcc, etrap_save; \
428 wrpr %g1, %cwp; \
429 nop; nop; nop; nop; \
430 nop; nop; nop; nop; \
431 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
432 ba,a,pt %xcc, etrap_spill_fixup_32bit; \
433 ba,a,pt %xcc, etrap_spill_fixup_32bit;
434
435#define SPILL_2_GENERIC_ETRAP_FIXUP \
436etrap_spill_fixup_32bit: \
437 ldub [%g6 + TI_WSAVED], %g1; \
438 sll %g1, 3, %g3; \
439 add %g6, %g3, %g3; \
440 stx %sp, [%g3 + TI_RWIN_SPTRS]; \
441 sll %g1, 7, %g3; \
442 add %g6, %g3, %g3; \
443 stw %l0, [%g3 + TI_REG_WINDOW + 0x00]; \
444 stw %l1, [%g3 + TI_REG_WINDOW + 0x04]; \
445 stw %l2, [%g3 + TI_REG_WINDOW + 0x08]; \
446 stw %l3, [%g3 + TI_REG_WINDOW + 0x0c]; \
447 stw %l4, [%g3 + TI_REG_WINDOW + 0x10]; \
448 stw %l5, [%g3 + TI_REG_WINDOW + 0x14]; \
449 stw %l6, [%g3 + TI_REG_WINDOW + 0x18]; \
450 stw %l7, [%g3 + TI_REG_WINDOW + 0x1c]; \
451 stw %i0, [%g3 + TI_REG_WINDOW + 0x20]; \
452 stw %i1, [%g3 + TI_REG_WINDOW + 0x24]; \
453 stw %i2, [%g3 + TI_REG_WINDOW + 0x28]; \
454 stw %i3, [%g3 + TI_REG_WINDOW + 0x2c]; \
455 stw %i4, [%g3 + TI_REG_WINDOW + 0x30]; \
456 stw %i5, [%g3 + TI_REG_WINDOW + 0x34]; \
457 stw %i6, [%g3 + TI_REG_WINDOW + 0x38]; \
458 stw %i7, [%g3 + TI_REG_WINDOW + 0x3c]; \
459 add %g1, 1, %g1; \
460 stb %g1, [%g6 + TI_WSAVED]; \
461 saved; \
462 rdpr %cwp, %g1; \
463 sub %g1, 2, %g1; \
464 ba,pt %xcc, etrap_save; \
465 wrpr %g1, %cwp; \
466 nop; nop; nop
467
468#define SPILL_1_NORMAL SPILL_1_GENERIC(ASI_AIUP)
469#define SPILL_2_NORMAL SPILL_2_GENERIC(ASI_AIUP)
470#define SPILL_3_NORMAL SPILL_0_NORMAL
471#define SPILL_4_NORMAL SPILL_0_NORMAL
472#define SPILL_5_NORMAL SPILL_0_NORMAL
473#define SPILL_6_NORMAL SPILL_0_NORMAL
474#define SPILL_7_NORMAL SPILL_0_NORMAL
475
476#define SPILL_0_OTHER SPILL_0_NORMAL
477#define SPILL_1_OTHER SPILL_1_GENERIC(ASI_AIUS)
478#define SPILL_2_OTHER SPILL_2_GENERIC(ASI_AIUS)
479#define SPILL_3_OTHER SPILL_3_NORMAL
480#define SPILL_4_OTHER SPILL_4_NORMAL
481#define SPILL_5_OTHER SPILL_5_NORMAL
482#define SPILL_6_OTHER SPILL_6_NORMAL
483#define SPILL_7_OTHER SPILL_7_NORMAL
484
485/* Normal kernel fill */
486#define FILL_0_NORMAL \
487 ldx [%sp + STACK_BIAS + 0x00], %l0; \
488 ldx [%sp + STACK_BIAS + 0x08], %l1; \
489 ldx [%sp + STACK_BIAS + 0x10], %l2; \
490 ldx [%sp + STACK_BIAS + 0x18], %l3; \
491 ldx [%sp + STACK_BIAS + 0x20], %l4; \
492 ldx [%sp + STACK_BIAS + 0x28], %l5; \
493 ldx [%sp + STACK_BIAS + 0x30], %l6; \
494 ldx [%sp + STACK_BIAS + 0x38], %l7; \
495 ldx [%sp + STACK_BIAS + 0x40], %i0; \
496 ldx [%sp + STACK_BIAS + 0x48], %i1; \
497 ldx [%sp + STACK_BIAS + 0x50], %i2; \
498 ldx [%sp + STACK_BIAS + 0x58], %i3; \
499 ldx [%sp + STACK_BIAS + 0x60], %i4; \
500 ldx [%sp + STACK_BIAS + 0x68], %i5; \
501 ldx [%sp + STACK_BIAS + 0x70], %i6; \
502 ldx [%sp + STACK_BIAS + 0x78], %i7; \
503 restored; retry; nop; nop; nop; nop; nop; nop; \
504 nop; nop; nop; nop; nop; nop; nop; nop;
505
506#define FILL_0_NORMAL_RTRAP \
507kern_rtt_fill: \
508 rdpr %cwp, %g1; \
509 sub %g1, 1, %g1; \
510 wrpr %g1, %cwp; \
511 ldx [%sp + STACK_BIAS + 0x00], %l0; \
512 ldx [%sp + STACK_BIAS + 0x08], %l1; \
513 ldx [%sp + STACK_BIAS + 0x10], %l2; \
514 ldx [%sp + STACK_BIAS + 0x18], %l3; \
515 ldx [%sp + STACK_BIAS + 0x20], %l4; \
516 ldx [%sp + STACK_BIAS + 0x28], %l5; \
517 ldx [%sp + STACK_BIAS + 0x30], %l6; \
518 ldx [%sp + STACK_BIAS + 0x38], %l7; \
519 ldx [%sp + STACK_BIAS + 0x40], %i0; \
520 ldx [%sp + STACK_BIAS + 0x48], %i1; \
521 ldx [%sp + STACK_BIAS + 0x50], %i2; \
522 ldx [%sp + STACK_BIAS + 0x58], %i3; \
523 ldx [%sp + STACK_BIAS + 0x60], %i4; \
524 ldx [%sp + STACK_BIAS + 0x68], %i5; \
525 ldx [%sp + STACK_BIAS + 0x70], %i6; \
526 ldx [%sp + STACK_BIAS + 0x78], %i7; \
527 restored; \
528 add %g1, 1, %g1; \
529 ba,pt %xcc, kern_rtt_restore; \
530 wrpr %g1, %cwp; \
531 nop; nop; nop; nop; nop; \
532 nop; nop; nop; nop;
533
534
535/* Normal 64bit fill */
536#define FILL_1_GENERIC(ASI) \
537 add %sp, STACK_BIAS + 0x00, %g1; \
538 ldxa [%g1 + %g0] ASI, %l0; \
539 mov 0x08, %g2; \
540 mov 0x10, %g3; \
541 ldxa [%g1 + %g2] ASI, %l1; \
542 mov 0x18, %g5; \
543 ldxa [%g1 + %g3] ASI, %l2; \
544 ldxa [%g1 + %g5] ASI, %l3; \
545 add %g1, 0x20, %g1; \
546 ldxa [%g1 + %g0] ASI, %l4; \
547 ldxa [%g1 + %g2] ASI, %l5; \
548 ldxa [%g1 + %g3] ASI, %l6; \
549 ldxa [%g1 + %g5] ASI, %l7; \
550 add %g1, 0x20, %g1; \
551 ldxa [%g1 + %g0] ASI, %i0; \
552 ldxa [%g1 + %g2] ASI, %i1; \
553 ldxa [%g1 + %g3] ASI, %i2; \
554 ldxa [%g1 + %g5] ASI, %i3; \
555 add %g1, 0x20, %g1; \
556 ldxa [%g1 + %g0] ASI, %i4; \
557 ldxa [%g1 + %g2] ASI, %i5; \
558 ldxa [%g1 + %g3] ASI, %i6; \
559 ldxa [%g1 + %g5] ASI, %i7; \
560 restored; \
561 retry; nop; nop; nop; nop; \
562 b,a,pt %xcc, fill_fixup_dax; \
563 b,a,pt %xcc, fill_fixup_mna; \
564 b,a,pt %xcc, fill_fixup;
565
566#define FILL_1_GENERIC_RTRAP \
567user_rtt_fill_64bit: \
568 ldxa [%sp + STACK_BIAS + 0x00] %asi, %l0; \
569 ldxa [%sp + STACK_BIAS + 0x08] %asi, %l1; \
570 ldxa [%sp + STACK_BIAS + 0x10] %asi, %l2; \
571 ldxa [%sp + STACK_BIAS + 0x18] %asi, %l3; \
572 ldxa [%sp + STACK_BIAS + 0x20] %asi, %l4; \
573 ldxa [%sp + STACK_BIAS + 0x28] %asi, %l5; \
574 ldxa [%sp + STACK_BIAS + 0x30] %asi, %l6; \
575 ldxa [%sp + STACK_BIAS + 0x38] %asi, %l7; \
576 ldxa [%sp + STACK_BIAS + 0x40] %asi, %i0; \
577 ldxa [%sp + STACK_BIAS + 0x48] %asi, %i1; \
578 ldxa [%sp + STACK_BIAS + 0x50] %asi, %i2; \
579 ldxa [%sp + STACK_BIAS + 0x58] %asi, %i3; \
580 ldxa [%sp + STACK_BIAS + 0x60] %asi, %i4; \
581 ldxa [%sp + STACK_BIAS + 0x68] %asi, %i5; \
582 ldxa [%sp + STACK_BIAS + 0x70] %asi, %i6; \
583 ldxa [%sp + STACK_BIAS + 0x78] %asi, %i7; \
584 ba,pt %xcc, user_rtt_pre_restore; \
585 restored; \
586 nop; nop; nop; nop; nop; nop; \
587 nop; nop; nop; nop; nop; \
588 ba,a,pt %xcc, user_rtt_fill_fixup; \
589 ba,a,pt %xcc, user_rtt_fill_fixup; \
590 ba,a,pt %xcc, user_rtt_fill_fixup;
591
592
593/* Normal 32bit fill */
594#define FILL_2_GENERIC(ASI) \
595 srl %sp, 0, %sp; \
596 lduwa [%sp + %g0] ASI, %l0; \
597 mov 0x04, %g2; \
598 mov 0x08, %g3; \
599 lduwa [%sp + %g2] ASI, %l1; \
600 mov 0x0c, %g5; \
601 lduwa [%sp + %g3] ASI, %l2; \
602 lduwa [%sp + %g5] ASI, %l3; \
603 add %sp, 0x10, %g1; \
604 lduwa [%g1 + %g0] ASI, %l4; \
605 lduwa [%g1 + %g2] ASI, %l5; \
606 lduwa [%g1 + %g3] ASI, %l6; \
607 lduwa [%g1 + %g5] ASI, %l7; \
608 add %g1, 0x10, %g1; \
609 lduwa [%g1 + %g0] ASI, %i0; \
610 lduwa [%g1 + %g2] ASI, %i1; \
611 lduwa [%g1 + %g3] ASI, %i2; \
612 lduwa [%g1 + %g5] ASI, %i3; \
613 add %g1, 0x10, %g1; \
614 lduwa [%g1 + %g0] ASI, %i4; \
615 lduwa [%g1 + %g2] ASI, %i5; \
616 lduwa [%g1 + %g3] ASI, %i6; \
617 lduwa [%g1 + %g5] ASI, %i7; \
618 restored; \
619 retry; nop; nop; nop; nop; \
620 b,a,pt %xcc, fill_fixup_dax; \
621 b,a,pt %xcc, fill_fixup_mna; \
622 b,a,pt %xcc, fill_fixup;
623
624#define FILL_2_GENERIC_RTRAP \
625user_rtt_fill_32bit: \
626 srl %sp, 0, %sp; \
627 lduwa [%sp + 0x00] %asi, %l0; \
628 lduwa [%sp + 0x04] %asi, %l1; \
629 lduwa [%sp + 0x08] %asi, %l2; \
630 lduwa [%sp + 0x0c] %asi, %l3; \
631 lduwa [%sp + 0x10] %asi, %l4; \
632 lduwa [%sp + 0x14] %asi, %l5; \
633 lduwa [%sp + 0x18] %asi, %l6; \
634 lduwa [%sp + 0x1c] %asi, %l7; \
635 lduwa [%sp + 0x20] %asi, %i0; \
636 lduwa [%sp + 0x24] %asi, %i1; \
637 lduwa [%sp + 0x28] %asi, %i2; \
638 lduwa [%sp + 0x2c] %asi, %i3; \
639 lduwa [%sp + 0x30] %asi, %i4; \
640 lduwa [%sp + 0x34] %asi, %i5; \
641 lduwa [%sp + 0x38] %asi, %i6; \
642 lduwa [%sp + 0x3c] %asi, %i7; \
643 ba,pt %xcc, user_rtt_pre_restore; \
644 restored; \
645 nop; nop; nop; nop; nop; \
646 nop; nop; nop; nop; nop; \
647 ba,a,pt %xcc, user_rtt_fill_fixup; \
648 ba,a,pt %xcc, user_rtt_fill_fixup; \
649 ba,a,pt %xcc, user_rtt_fill_fixup;
650
651
652#define FILL_1_NORMAL FILL_1_GENERIC(ASI_AIUP)
653#define FILL_2_NORMAL FILL_2_GENERIC(ASI_AIUP)
654#define FILL_3_NORMAL FILL_0_NORMAL
655#define FILL_4_NORMAL FILL_0_NORMAL
656#define FILL_5_NORMAL FILL_0_NORMAL
657#define FILL_6_NORMAL FILL_0_NORMAL
658#define FILL_7_NORMAL FILL_0_NORMAL
659
660#define FILL_0_OTHER FILL_0_NORMAL
661#define FILL_1_OTHER FILL_1_GENERIC(ASI_AIUS)
662#define FILL_2_OTHER FILL_2_GENERIC(ASI_AIUS)
663#define FILL_3_OTHER FILL_3_NORMAL
664#define FILL_4_OTHER FILL_4_NORMAL
665#define FILL_5_OTHER FILL_5_NORMAL
666#define FILL_6_OTHER FILL_6_NORMAL
667#define FILL_7_OTHER FILL_7_NORMAL
668
669#endif /* !(_SPARC64_TTABLE_H) */