- ccbebba perf/x86/intel/pt: Bypass PT vs. LBR exclusivity if the core supports it by Alexander Shishkin · 9 years ago
- f21d5ad perf/x86/intel: Add LBR filter support for Silvermont and Airmont CPUs by Kan Liang · 9 years ago
- 8b92c3a perf/x86/intel: Add Goldmont CPU support by Kan Liang · 9 years ago
- 4c3b73c Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip by Linus Torvalds · 9 years ago
- 32b62f4 perf/x86/amd: Cleanup Fam10h NB event constraints by Peter Zijlstra · 9 years ago
- a49ac9f perf/x86: Move events_sysfs_show() outside CPU_SUP_INTEL by Huang Rui · 9 years ago
- 00f5268 Merge branch 'x86/cleanups' into x86/urgent by Ingo Molnar · 9 years ago
- e17dc65 perf/x86/intel: Fix PEBS data source interpretation on Nehalem/Westmere by Andi Kleen · 9 years ago
- b3e6246 perf/x86/pebs: Add proper PEBS constraints for Broadwell by Stephane Eranian · 9 years ago
- e72daf3 perf/x86/intel: Use PAGE_SIZE for PEBS buffer size on Core2 by Jiri Olsa · 9 years ago
- 27f6d22 perf/x86: Move perf_event.h to its new home by Borislav Petkov · 9 years ago[Renamed from arch/x86/kernel/cpu/perf_event.h]
- 1e7b939 perf/x86/intel: Add perf core PMU support for Intel Knights Landing by Harish Chegondi · 9 years ago
- 7246976 perf/x86: Use INST_RETIRED.PREC_DIST for cycles: ppp by Andi Kleen · 9 years ago
- f1ad448 perf/x86: Remove old MSR perf tracing code by Andi Kleen · 9 years ago
- 42a0789 Merge branch 'perf/urgent' into perf/core, to pick up fixes by Ingo Molnar · 9 years ago
- 169b932 perf/x86/intel: Fix INTEL_FLAGS_UEVENT_CONSTRAINT_DATALA_NA macro by Jiri Olsa · 9 years ago
- b7883a1 perf/x86: Handle multiple umask bits for BDW CYCLE_ACTIVITY.* by Andi Kleen · 9 years ago
- 90eec10 treewide: Remove old email address by Peter Zijlstra · 9 years ago
- b28ae95 perf/x86: Fix LBR call stack save/restore by Andi Kleen · 9 years ago
- 02386c3 Merge branch 'perf/urgent' into perf/core, to pick up fixes before applying new changes by Ingo Molnar · 9 years ago
- d0dc849 perf/x86/intel/pebs: Add PEBS frontend profiling for Skylake by Andi Kleen · 9 years ago
- 8f3e568 perf/core: Drop PERF_EVENT_TXN by Sukadev Bhattiprolu · 9 years ago
- fbbe070 perf/core: Add a 'flags' parameter to the PMU transactional interfaces by Sukadev Bhattiprolu · 9 years ago
- 47732d8 perf/x86: Make merge_attr() global to use from perf_event_intel by Andi Kleen · 9 years ago
- 9a92e16 perf/x86/intel: Add Intel Skylake PMU support by Andi Kleen · 10 years ago
- 50eab8f perf/x86/intel/lbr: Add support for LBRv5 by Andi Kleen · 10 years ago
- a7b58d2 perf/x86/intel/lbr: Allow time stamp for free running PEBSv3 by Andi Kleen · 10 years ago
- c749b3e perf/x86/intel/lbr: Kill off intel_pmu_needs_lbr_smpl for good by Alexander Shishkin · 9 years ago
- 6bc4c3a Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip by Linus Torvalds · 9 years ago
- 6b099d9 perf/x86/intel/bts: Fix DS area sharing with x86_pmu events by Alexander Shishkin · 9 years ago
- 9c964ef perf/x86/intel: Drain the PEBS buffer during context switches by Yan, Zheng · 10 years ago
- 3569c0d perf/x86/intel: Implement batched PEBS interrupt handling (large PEBS interrupt threshold) by Yan, Zheng · 10 years ago
- 851559e perf/x86/intel: Use the PEBS auto reload mechanism when possible by Yan, Zheng · 10 years ago
- 43ef205 perf/x86/intel: Remove intel_excl_states::init_state by Peter Zijlstra · 10 years ago
- 0c41e75 perf/x86/intel: Clean up intel_commit_scheduling() placement by Peter Zijlstra · 10 years ago
- cc1790c perf/x86: Improve HT workaround GP counter constraint by Peter Zijlstra · 10 years ago
- b371b59 perf/x86: Fix event/group validation by Peter Zijlstra · 10 years ago
- c857eb5 perf/x86: Fix hw_perf_event::flags collision by Peter Zijlstra · 10 years ago
- 1a78d93 perf/x86/intel: Streamline LBR MSR handling in PMI by Andi Kleen · 10 years ago
- b37609c perf/x86/intel: Make the HT bug workaround conditional on HT enabled by Stephane Eranian · 10 years ago
- c02cdbf perf/x86/intel: Limit to half counters when the HT workaround is enabled, to avoid exclusive mode starvation by Stephane Eranian · 10 years ago
- b63b4b4 perf/x86/intel: Enforce HT bug workaround with PEBS for SNB/IVB/HSW by Maria Dimakopoulou · 10 years ago
- e979121 perf/x86/intel: Implement cross-HT corruption bug workaround by Maria Dimakopoulou · 10 years ago
- 6f6539c perf/x86/intel: Add cross-HT counter exclusion infrastructure by Maria Dimakopoulou · 10 years ago
- 79cba82 perf/x86: Add 'index' param to get_event_constraint() callback by Stephane Eranian · 10 years ago
- c5362c0 perf/x86: Add 3 new scheduling callbacks by Maria Dimakopoulou · 10 years ago
- 9041346 perf/x86: Vectorize cpuc->kfree_on_online by Stephane Eranian · 10 years ago
- 9a5e3fb perf/x86: Rename x86_pmu::er_flags to 'flags' by Stephane Eranian · 10 years ago
- 8062382 perf/x86/intel/bts: Add BTS PMU driver by Alexander Shishkin · 10 years ago
- 52ca9ce perf/x86/intel/pt: Add Intel PT PMU driver by Alexander Shishkin · 10 years ago
- 4807034 perf/x86: Mark Intel PT and LBR/BTS as mutually exclusive by Alexander Shishkin · 10 years ago
- 294fe0f perf/x86/intel: Add INST_RETIRED.ALL workarounds by Andi Kleen · 10 years ago
- 2c44b19 perf/x86/intel: Expose LBR callstack to user space tooling by Peter Zijlstra · 10 years ago
- e18bf52 perf/x86/intel: Allocate space for storing LBR stack by Yan, Zheng · 10 years ago
- e9d7f7c perf/x86/intel: Add basic Haswell LBR call stack support by Yan, Zheng · 10 years ago
- 2a0ad3b perf/x86/intel: Use context switch callback to flush LBR stack by Yan, Zheng · 10 years ago
- ba53250 perf: Introduce pmu context switch callback by Yan, Zheng · 10 years ago
- 27ac905 perf/x86/intel: Reduce lbr_sel_map[] size by Yan, Zheng · 10 years ago
- 7911d3f perf/x86: Only allow rdpmc if a perf_event is mapped by Andy Lutomirski · 10 years ago
- 7550ddf perf/x86: Add INTEL_FLAGS_UEVENT_CONSTRAINT by Andi Kleen · 10 years ago
- 1776b10 perf/x86/intel: Revert incomplete and undocumented Broadwell client support by Ingo Molnar · 10 years ago
- c46e665 perf/x86: Add INST_RETIRED.ALL workarounds by Andi Kleen · 10 years ago
- 86a0446 perf/x86: Revamp PEBS event selection by Andi Kleen · 10 years ago
- 338b522 perf/x86/intel: Protect LBR and extra_regs against KVM lying by Kan Liang · 10 years ago
- c347a2f perf/x86: Add a few more comments by Peter Zijlstra · 11 years ago
- e97df76 perf/x86/intel/p6: Add userspace RDPMC quirk for PPro by Peter Zijlstra · 11 years ago
- cf30d52 perf/x86: Fix constraint table end marker bug by Maria Dimakopoulou · 11 years ago
- b7af41a perf/x86: Suppress duplicated abort LBR records by Andi Kleen · 11 years ago
- 2b9e344 perf/x86/intel: Clean up checkpoint-interrupt bits by Peter Zijlstra · 11 years ago
- 1fa6418 perf/x86: Add Silvermont (22nm Atom) support by Yan, Zheng · 11 years ago
- 2f7f73a perf/x86: Fix shared register mutual exclusion enforcement by Stephane Eranian · 11 years ago
- 069e0c3 perf/x86/intel: Support full width counting by Andi Kleen · 11 years ago
- f9134f3 perf/x86/intel: Add mem-loads/stores support for Haswell by Andi Kleen · 11 years ago
- 72db559 perf/x86/intel: Move NMI clearing to end of PMI handler by Andi Kleen · 11 years ago
- 3044318 perf/x86/intel: Add Haswell PEBS support by Andi Kleen · 11 years ago
- 3a632cb perf/x86/intel: Add simple Haswell PMU support by Andi Kleen · 11 years ago
- 43b45780 perf/x86: Reduce stack usage of x86_schedule_events() by Andrew Hunter · 12 years ago
- 9ad64c0 perf/x86: Add support for PEBS Precise Store by Stephane Eranian · 12 years ago
- f20093e perf/x86: Add memory profiling via PEBS Load Latency by Stephane Eranian · 12 years ago
- 9fac2cf perf/x86: Add flags to event constraints by Stephane Eranian · 12 years ago
- 3a54aaa perf/x86: Improve sysfs event mapping with event string by Stephane Eranian · 12 years ago
- 1a6461b perf/x86: Support CPU specific sysfs events by Andi Kleen · 12 years ago
- 0fbdad0 perf/x86: Allow for architecture specific RDPMC indexes by Jacob Shin · 12 years ago
- 4c1fd17 perf/x86: Move MSR address offset calculation to architecture specific files by Jacob Shin · 12 years ago
- 20550a4 perf/x86: Add hardware events translations for Intel P6 cpus by Jiri Olsa · 12 years ago
- 0bf79d4 perf/x86: Add hardware events translations for AMD cpus by Jiri Olsa · 12 years ago
- 43c032f perf/x86: Add hardware events translations for Intel cpus by Jiri Olsa · 12 years ago
- a474739 perf/x86: Make hardware event translations available in sysfs by Jiri Olsa · 12 years ago
- e717bf4 perf/x86: Add support for Intel Xeon-Phi Knights Corner PMU by Vince Weaver · 12 years ago
- 20a36e3 perf/x86: Fix Intel Ivy Bridge support by Stephane Eranian · 12 years ago
- d07bdfd perf/x86: Fix USER/KERNEL tagging of samples properly by Peter Zijlstra · 12 years ago
- 597ed95 perf/x86: Make bitfield unsigned by Peter Zijlstra · 12 years ago
- 3e0091e perf/x86: Save a few bytes in 'struct x86_pmu' by Peter Zijlstra · 12 years ago
- c93dc84 perf/x86: Add a microcode revision check for SNB-PEBS by Peter Zijlstra · 12 years ago
- 4b4969b perf: Export perf_assign_events() by Yan, Zheng · 12 years ago
- 70ab700 perf/x86: Don't assume there can be only 4 PEBS events by Andi Kleen · 12 years ago
- 1c2ac3f perf/x86: Fix wrmsrl() debug wrapper by Peter Zijlstra · 13 years ago
- 0780c92 perf/x86: Implement cycles:p for SNB/IVB by Peter Zijlstra · 12 years ago
- 5a425294 perf/x86: Fix Intel shared extra MSR allocation by Peter Zijlstra · 12 years ago
- 641cc93 perf: Adding sysfs group format attribute for pmu device by Jiri Olsa · 13 years ago