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gerrit-public.fairphone.software / kernel / msm-4.19 / 12f3382bc0262e981a2e58aca900cbbdbbe66825 / drivers / gpu / drm / i915 / i915_reg.h
  1. 12f3382 drm/i915: implement WaDisablePSDDualDispatchEnable on IVB & VLV by Jesse Barnes · 12 years ago
  2. 2d80957 drm/i915: implement WaDisableVLVClockGating_VBIIssue on VLV by Jesse Barnes · 12 years ago
  3. 8ab4397 drm/i915: implement WaDisableDopClockGatingisable on VLV and IVB by Jesse Barnes · 12 years ago
  4. d0cf5ea drm/i915: implement WaDisableL3CacheAging on VLV by Jesse Barnes · 12 years ago
  5. 0494564 drm/i915: fix Haswell FDI link training code by Paulo Zanoni · 12 years ago
  6. ce40141 drm/i915: implement WADP0ClockGatingDisable by Daniel Vetter · 12 years ago
  7. 23670b32 drm/i915: CPT+ pch transcoder workaround by Daniel Vetter · 12 years ago
  8. 32ae46bf drm/i915: Add SURFLIVE register definitions by Ville Syrjälä · 12 years ago
  9. 57779d0 drm/i915: Fix display pixel format handling by Ville Syrjälä · 12 years ago
  10. 4358a37 drm/i915: implement WaDisableRenderCachePipelinedFlush by Daniel Vetter · 12 years ago
  11. c54173a drm/i915: Fix sprite offset on HSW by Damien Lespiau · 12 years ago
  12. bc1c91e drm/i915: Fix primary plane offset on HSW by Damien Lespiau · 12 years ago
  13. 01a415f drm/i915: check fdi B/C lane sharing constraint by Daniel Vetter · 12 years ago
  14. fe2b8f9 drm/i915: convert pipe timing definitions to transcoder by Paulo Zanoni · 12 years ago
  15. afe2fcf drm/i915: convert CPU M/N timings to transcoder by Paulo Zanoni · 12 years ago
  16. c980979 drm/i915: convert PIPE_MSA_MISC to transcoder by Paulo Zanoni · 12 years ago
  17. 702e7a5 drm/i915: convert PIPECONF to use transcoder instead of pipe by Paulo Zanoni · 12 years ago
  18. ad80a81 drm/i915: convert DDI_FUNC_CTL to transcoder by Paulo Zanoni · 12 years ago
  19. bb523fc drm/i915: convert PIPE_CLK_SEL to transcoder by Paulo Zanoni · 12 years ago
  20. a5c961d drm/i915: add TRANSCODER_EDP by Paulo Zanoni · 12 years ago
  21. 82ed61f drm/i915: make edp panel power sequence setup more robust by Daniel Vetter · 12 years ago
  22. c2fb791 Merge tag 'v3.7-rc2' into drm-intel-next-queued by Daniel Vetter · 12 years ago
  23. 231e54f drm/i915: Consolidate ILK_DSPCLK_GATE and PCH_DSPCLK_GATE by Damien Lespiau · 12 years ago
  24. d6c0d72 drm/i915: add basic Haswell DP link train bits by Paulo Zanoni · 12 years ago
  25. dae8479 drm/i915: add intel_ddi_set_pipe_settings by Paulo Zanoni · 12 years ago
  26. c5836c2 drm/i915: Document the multi-threaded FORCEWAKE bits by Chris Wilson · 12 years ago
  27. d7d4eed drm/i915: Allow DRM_ROOT_ONLY|DRM_MASTER to submit privileged batchbuffers by Chris Wilson · 12 years ago
  28. 31643d5 drm/i915: Workaround to bump rc6 voltage to 450 by Ben Widawsky · 12 years ago
  29. 26b6e44 drm/i915: Set guardband clipping workaround bit in the right register. by Kenneth Graunke · 12 years ago
  30. 39bc66c drm/i915: Fix the SCC/SSC typo in the SPLL bits definition by Damien Lespiau · 12 years ago
  31. 6441ab5 drm/i915: completely rewrite the Haswell PLL handling code by Paulo Zanoni · 12 years ago
  32. ee2b0b3 drm/i915: add haswell_set_pipeconf by Paulo Zanoni · 12 years ago
  33. 8d9ddbc drm/i915: enable and disable DDI_FUNC_CTL at the right time by Paulo Zanoni · 12 years ago
  34. 79f689a drm/i915: rewrite the LCPLL code by Paulo Zanoni · 12 years ago
  35. 87f8020 drm/i915: implement WaDisableEarlyCull for VLV and IVB by Jesse Barnes · 12 years ago
  36. 61939d9 drm/i915: implement WaForceL3Serialization on VLV and IVB by Jesse Barnes · 12 years ago
  37. f8f2ac9 drm/i915: Fix GT_MODE default value by Ben Widawsky · 12 years ago
  38. 17dc925 drm/i915: Fixup HDMI output on Valleyview by Vijay Purushothaman · 12 years ago
  39. 2a8f64c drm/i915: Enable DisplayPort in Valleyview by Vijay Purushothaman · 12 years ago
  40. b56747a drm/i915: Add Valleyview lane control definitions by Vijay Purushothaman · 12 years ago
  41. adf00b2 drm/i915: make sure we write all the DIP data bytes by Paulo Zanoni · 12 years ago
  42. a1ceb67 Merge the modeset-rework, basic conversion into drm-intel-next by Daniel Vetter · 12 years ago
  43. 19d8fe1 drm/i915/dp: implement get_hw_state by Daniel Vetter · 12 years ago
  44. 65983bd Merge branch 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel into drm-next by Dave Airlie · 12 years ago
  45. 93bb70e Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into drm-next by Dave Airlie · 12 years ago
  46. d53bd48 drm/i915: Add new INSTDONE registers by Ben Widawsky · 12 years ago
  47. bd9854f drm/i915: Extract reading INSTDONE by Ben Widawsky · 12 years ago
  48. b4c145c drm/i915: Find unclaimed MMIO writes. by Ben Widawsky · 12 years ago
  49. 71e172e drm/i915: Add ERR_INT to gen7 error state by Ben Widawsky · 12 years ago
  50. 9b138a8 drm/i915: ironlake_write_eld code cleanup by Wang Xingchao · 12 years ago
  51. 9a78b6c drm/i915: HSW audio registers definition by Wang Xingchao · 12 years ago
  52. a843af1 drm/i915: fix hsw uncached pte by Daniel Vetter · 12 years ago
  53. 745ca3b drm/i915: add parentheses around PIXCLK_GATE definitions by Paulo Zanoni · 12 years ago
  54. 5e49cea drm/i915: reindent Haswell register definitions by Paulo Zanoni · 12 years ago
  55. dfcef25 drm/i915: correctly set the DDI_FUNC_CTL bpc field by Paulo Zanoni · 12 years ago
  56. f63eb7c4 drm/i915: set the DDI sync polarity bits by Paulo Zanoni · 12 years ago
  57. 3f7c447 drm/i915: fix pipe DDI mode select by Paulo Zanoni · 12 years ago
  58. 2e4291e drm/i915: Add contexts for HSW by Ben Widawsky · 12 years ago
  59. 540a895 drm/i915: add inte_crt->adpa_reg by Daniel Vetter · 12 years ago
  60. a7e806d drm/i915: create VLV_DSIPLAY_BASE #define by Daniel Vetter · 12 years ago
  61. c0c7bab drm/i915: add register read IOCTL by Ben Widawsky · 12 years ago
  62. ebc0fd8 drm/i915: group ADPA #defines together by Daniel Vetter · 12 years ago
  63. 4b4147c drm/i915: fix up PCH backlight #define mixup by Daniel Vetter · 12 years ago
  64. 12f5581 drm/i915: Add comments to explain the BSD tail write workaround by Chris Wilson · 12 years ago
  65. 6a4ea12 drm/i915/context: Add missing IVB context sizes by Ben Widawsky · 12 years ago
  66. 4f91dd6 drm/i915/context/: s/CTX/CXT by Ben Widawsky · 12 years ago
  67. 4acf518 drm/i915: program FDI_RX TP and FDI delays by Eugeni Dodonov · 12 years ago
  68. c2c7513 drm/i915: adjust framebuffer base address on gen4+ by Daniel Vetter · 12 years ago
  69. e506a0c drm/i915: introduce crtc->dspaddr_offset by Daniel Vetter · 12 years ago
  70. 4c3c115 drm/i915: fix PIPE_DDI_PORT_MASK by Paulo Zanoni · 12 years ago
  71. 1544d9d drm/i915: enable RC6 workaround on Haswell by Eugeni Dodonov · 12 years ago
  72. 5a7dc92 drm/i915: add RPS configuration for Haswell by Eugeni Dodonov · 12 years ago
  73. e7911c4 drm/i915: support Haswell force waking by Eugeni Dodonov · 12 years ago
  74. c4de7b0 drm/i915: Implement w/a for sporadic read failures on waking from rc6 by Chris Wilson · 12 years ago
  75. e486fad drm/i915: fix PIPE_WM_LINETIME definition by Paulo Zanoni · 12 years ago
  76. 7b0cfee Merge tag 'v3.5-rc4' into drm-intel-next-queued by Daniel Vetter · 12 years ago
  77. 7983117 drm/i915: enable display messages to GT on ValleyView by Jesse Barnes · 12 years ago
  78. 4a87d65 drm/i915: add HDMI and DP port enumeration on ValleyView by Jesse Barnes · 12 years ago
  79. 9836437 drm/i915: Enable DP panel power sequencing for ValleyView by Shobhit Kumar · 12 years ago
  80. a0c4da24 drm/i915: ValleyView mode setting limits and PLL functions by Jesse Barnes · 12 years ago
  81. e3f33d4 drm/i915: add L3 bank clock gating disable on VLV by Jesse Barnes · 12 years ago
  82. 6edaa7f drm/i915: add TDL unit clock gating disable for VLV by Jesse Barnes · 12 years ago
  83. 0f846f8 drm/i915: disable RCBP and VDS unit clock gating on SNB and VLV by Jesse Barnes · 12 years ago
  84. cc0f639 drm/i915: PIPE_CONTROL_TLB_INVALIDATE by Ben Widawsky · 12 years ago
  85. e37ec39 drm/i915: Ivybridge MI_ARB_ON_OFF context w/a by Ben Widawsky · 12 years ago
  86. fe1cc68 drm/i915: CXT_SIZE register offsets added by Ben Widawsky · 12 years ago
  87. 7cf4160 drm/i915: clear up backlight #define confusion on gen4+ by Daniel Vetter · 12 years ago
  88. 534b5a5 drm/i915: pnv has a backlight polarity control bit, too by Daniel Vetter · 12 years ago
  89. 23e81d6 drm/i915: pch_irq_handler -> {ibx, cpt}_irq_handler by Adam Jackson · 12 years ago
  90. cb05d8d drm/i915: fix up ivb plane 3 pageflips by Daniel Vetter · 13 years ago
  91. b9524a1 drm/i915: remap l3 on hw init by Ben Widawsky · 13 years ago
  92. e368919 drm/i915: Dynamic Parity Detection handling by Ben Widawsky · 13 years ago
  93. 0dd87d2 drm/i915: explicitly disable the DIPs we're not using by Paulo Zanoni · 13 years ago
  94. 084b612 drm/i915: SDVO hotplug have different interrupt status bits for i915/i965/g4x by Chris Wilson · 13 years ago
  95. 10f76a3 drm/i915: Inspect the right status bits for DP/HDMI hotplug on gen4 by Chris Wilson · 13 years ago
  96. 2da8af5 drm/i915: implement hsw_write_infoframe by Paulo Zanoni · 13 years ago
  97. 8c5f5f7 drm/i915: add new Haswell DIP controls registers by Eugeni Dodonov · 13 years ago
  98. 4e89ee1 drm/i915: set the DIP port on ibx_write_infoframe by Paulo Zanoni · 13 years ago
  99. 60c5ea2 drm/i915: mask the video DIP frequency when changing it by Paulo Zanoni · 13 years ago
  100. 3e6e639 drm/i915: mask the video DIP port select by Paulo Zanoni · 13 years ago