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gerrit-public.fairphone.software
/
kernel
/
msm-4.19
/
2059ac3b1304cb6a82f9d90762dea9f556831627
/
drivers
/
gpu
/
drm
/
i915
/
i915_reg.h
2059ac3
drm/i915: fix backlight after resume on 855gm
by Jani Nikula
· 9 years ago
fde61e4
drm/i915: Throw out WIP CHV power well definitions
by Ville Syrjälä
· 10 years ago
bc28454
drm/i915: Use the default 600ns LDO programming sequence delay
by Ville Syrjälä
· 10 years ago
6d50b06
drm/i915: Enable GTT caching on gen8
by Ville Syrjälä
· 10 years ago
adc289d
drm/i915: Clean up the CPT DP .get_hw_state() port readout
by Ville Syrjälä
· 10 years ago
5d96d8a
drm/i915/skl: Deinit/init the display at suspend/resume
by Damien Lespiau
· 10 years ago
2a0ee94
drm/i915/bxt: fix WaForceContextSaveRestoreNonCoherent on steppings B0+
by Imre Deak
· 10 years ago
b6dc71f
drm/i915/bxt: Port PLL programming BUN
by Vandana Kannan
· 10 years ago
2cd601c
drm/i915: Adding dbuf support for skl nv12 format.
by Chandra Konduru
· 10 years ago
7072246
drm/i915: Work around DISPLAY_PHY_CONTROL register corruption on CHV
by Ville Syrjälä
· 10 years ago
2e523e9
drm/i915: Implement chv display PHY lane stagger setup
by Ville Syrjälä
· 10 years ago
f1d3d34
drm/i915/skl: Fix WaDisableChickenBitTSGBarrierAckForFFSliceCS
by Damien Lespiau
· 10 years ago
983b4b9
drm/i915/bxt: Add WaDisableSbeCacheDispatchPortSharing
by Nick Hoath
· 10 years ago
0fb890c
drm/i915/bxt: BLC implementation
by Vandana Kannan
· 10 years ago
57520bc
drm/i915: Merge the GEN9 memory latency PCU opcode with its friends
by Damien Lespiau
· 10 years ago
9043ae0
drm/i915: Re-order the PCU opcodes
by Damien Lespiau
· 10 years ago
71cd842
drm/i915/skl: Fix the CTRL typo in the DPLL_CRTL1 defines
by Damien Lespiau
· 10 years ago
3ef6234
drm/i915: Setup static bias for GPU
by Deepak S
· 10 years ago
6b457d3
drm/i915/skl: Implement enable/disable for Display C5 state.
by A.Sunil Kamath
· 10 years ago
e1dee19
Merge tag 'drm-intel-next-2015-04-23-fixed' of git://anongit.freedesktop.org/drm-intel into drm-next
by Dave Airlie
· 10 years ago
a04f90a
drm/i915/chv: Implement WaDisableShadowRegForCpd
by Deepak S
· 10 years ago
9535c47
drm/i915: cope with large i2c transfers
by Dmitry Torokhov
· 10 years ago
96fb9f9
drm/i915/bxt: VSwing programming sequence
by Vandana Kannan
· 10 years ago
dfb8240
drm/i915/bxt: Define bxt DDI PLLs and implement enable/disable sequence
by Satheeshakrishna M
· 10 years ago
664326f
drm/i915/bxt: Implement enable/disable for Display C9 state
by A.Sunil Kamath
· 10 years ago
eee2156
drm/i915/bxt: add description about the BXT PHYs
by Imre Deak
· 10 years ago
5c6706e
drm/i915/bxt: add display initialize/uninitialize sequence (PHY)
by Vandana Kannan
· 10 years ago
f8437dd1
drm/i915/bxt: add display initialize/uninitialize sequence (CDCLK)
by Vandana Kannan
· 10 years ago
cff5190
drm/i915: PSR: Remove wrong LINK_DISABLE.
by Rodrigo Vivi
· 10 years ago
9e63743
drm/i915/bxt: Enable GMBUS IRQ
by Shashank Sharma
· 10 years ago
e0a20ad
drm/i915/bxt: DDI Hotplug interrupt setup
by Shashank Sharma
· 10 years ago
4c27283
drm/i915: add bxt gmbus support
by Jani Nikula
· 10 years ago
c5fe557
Merge branch 'topic/bxt-stage1' into drm-intel-next-queued
by Daniel Vetter
· 10 years ago
e3a2905
drm/i915/bxt: add workaround to avoid PTE corruption
by Robert Beckett
· 10 years ago
38a39a7
drm/i915/bxt: add WaDisableMaskBasedCammingInRCC workaround
by Ben Widawsky
· 10 years ago
868434c
drm/i915/bxt: add GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ workaround
by Ben Widawsky
· 10 years ago
1c9a2d4
drm/i915: Register definitions for skylake scalers
by Chandra Konduru
· 10 years ago
3b7a511
drm/i915/skl: Support for 90/270 rotation
by Sonika Jindal
· 10 years ago
a4104c5
drm/i915: Naming constants to be written to GEN9_PG_ENABLE
by Sagar Kamble
· 10 years ago
8fb5519
drm/i915: Agressive downclocking on Baytrail
by Chris Wilson
· 10 years ago
f9fc42f
drm/i915/skl: Implement WaDisableVFUnitClockGating
by Damien Lespiau
· 10 years ago
1c046bc
drm/i915/bxt: Support BXT in SSEU device status dump
by Jeff McGee
· 10 years ago
dead16e
drm/i915/bxt: Determine BXT slice/subslice/EU info
by Jeff McGee
· 10 years ago
b21249c
drm/i915/bxt: Add the plane4 related interrupt definitions
by Damien Lespiau
· 10 years ago
51ce4db
drm/i915/bdw: WaProgramL3SqcReg1Default
by Rodrigo Vivi
· 10 years ago
474d1ec
drm/i915/skl: Enabling PSR2 SU with frame sync
by Sonika Jindal
· 10 years ago
5ea6e5e
drm/i915: index gmbus tables using the pin pair number
by Jani Nikula
· 10 years ago
988c701
drm/i915: rename GMBUS_PORT_* macros as GMBUS_PIN_*
by Jani Nikula
· 10 years ago
6c826f3
drm/i915: Add fault address to error state for gen8 and gen9
by Mika Kuoppala
· 10 years ago
6f4b12f8
drm/i915: Use down ei for manual Baytrail RPS calculations
by Chris Wilson
· 10 years ago
43cf3bf
drm/i915: Improved w/a for rps on Baytrail
by Chris Wilson
· 10 years ago
de43ae9
drm/i915/skl: Added new macros
by Akash Goel
· 10 years ago
f499896
drm/i915: Use FW_WM() macro for older gmch platforms too
by Ville Syrjälä
· 10 years ago
1566597
drm/i915: Add polish to VLV WM shift+mask operations
by Ville Syrjälä
· 10 years ago
fc1ac8d
drm/i915: Disable DDR DVFS on CHV
by Ville Syrjälä
· 10 years ago
cfb4141
drm/i915: Enable the maxfifo PM5 mode when appropriate on CHV
by Ville Syrjälä
· 10 years ago
1e69cd7
drm/i915: Program PFI credits for VLV
by Vidya Srinivas
· 10 years ago
ae80152
drm/i915: Rewrite VLV/CHV watermark code
by Ville Syrjälä
· 10 years ago
9cbe40c
drm/i915: Update prop, int co-eff and gain threshold for CHV
by Vijay Purushothaman
· 10 years ago
de3a0fd
drm/i915: Initialize CHV digital lock detect threshold
by Vijay Purushothaman
· 10 years ago
a945ce7e
drm/i915: Disable M2 frac division for integer case
by Vijay Purushothaman
· 10 years ago
5575f03
drm/i915/chv: Add CHV HW status to SSEU status
by Jeff McGee
· 10 years ago
c93043a
drm/i915/chv: Determine CHV slice/subslice/EU info
by Jeff McGee
· 10 years ago
c6beb13
drm/i915: Make sure PND deadline mode is enabled on VLV/CHV
by Ville Syrjälä
· 10 years ago
b500472
drm/i915: Read out display FIFO size on VLV/CHV
by Ville Syrjälä
· 10 years ago
341c526
drm/i915: Hide VLV DDL precision handling
by Ville Syrjälä
· 10 years ago
1203051
drm/i915: Kill DRAIN_LATENCY_PRECISION_* defines
by Ville Syrjälä
· 10 years ago
edf6056
drm/i915: Reduce CHV DDL multiplier to 16/8
by Ville Syrjälä
· 10 years ago
fd0753c
drm/i915: Fix trivial typos in comments and warning message
by Yannick Guerrini
· 10 years ago
6fa7aec
drm/i915: Support for RR switching on VLV
by Vandana Kannan
· 10 years ago
b766879
drm/i915/skl: Tune IZ hashing when subslices are unbalanced
by Damien Lespiau
· 10 years ago
0cea650
drm/i915: Request full SSEU enablement on Gen9
by Jeff McGee
· 10 years ago
7f992ab
drm/i915/skl: Add SKL HW status to SSEU status
by Jeff McGee
· 10 years ago
3873218
drm/i915/skl: Determine SKL slice/subslice/EU info
by Jeff McGee
· 10 years ago
d0bbbc4
drm/i915/skl: Implement WaDisablePowerCompilerClockGating
by Damien Lespiau
· 10 years ago
d3eee4b
drm/i915: Add new PHY reg definitions for lock threshold
by Vijay Purushothaman
· 10 years ago
77719d2
drm/i915/skl: Implement WaEnableLbsSlaRetryTimerDecrement
by Damien Lespiau
· 10 years ago
183c6da
drm/i915/skl: Implement WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken
by Damien Lespiau
· 10 years ago
65ca751
drm/i915/skl: Implement WaBarrierPerformanceFixDisable
by Damien Lespiau
· 10 years ago
e2db707
drm/i915/skl: Implement WaCcsTlbPrefetchDisable:skl
by Damien Lespiau
· 10 years ago
2caa3b2
drm/i915/skl: Implement WaDisableChickenBitTSGBarrierAckForFFSliceCS
by Damien Lespiau
· 10 years ago
81e231a
drm/i915/skl: Implement WaDisableHDCInvalidation
by Damien Lespiau
· 10 years ago
8bc0ccf
drm/i915/skl: Implement WaDisableLSQCROPERFforOCL
by Damien Lespiau
· 10 years ago
9370cd9
drm/i915/skl: Implement WaDisablePartialResolveInVc
by Damien Lespiau
· 10 years ago
9253c2e
drm/i915/skl: Implement WaSetGAPSunitClckGateDisable
by Damien Lespiau
· 10 years ago
2db59d5
drm/i915: Detect eDRAM with the enabled bit only
by Damien Lespiau
· 10 years ago
35cb6f3
drm/i915/bdw: Implement WaForceContextSaveRestoreNonCoherent
by Damien Lespiau
· 10 years ago
cac23df
drm/i915/gen9: Implement WaEnableYV12BugFixInHalfSliceChicken7
by Nick Hoath
· 10 years ago
8424171
drm/i915/gen9: h/w w/a: syncing dependencies between camera and graphics
by Nick Hoath
· 10 years ago
94dd513
drm/i915/skl: Implementation of SKL display power well support
by Satheeshakrishna M
· 10 years ago
e3d9984
drm/i915/skl: Enabling PSR on Skylake
by Sonika Jindal
· 10 years ago
38c2352
drm/i915/skl: Gen9 coarse power gating
by Zhe Wang
· 10 years ago
095acd5
drm/i915: New offset for reading frequencies on CHV.
by Deepak S
· 10 years ago
693d11c
drm/i915/chv: Populate total EU count on Cherryview
by Deepak S
· 10 years ago
d60de81
drm/i915: Improve HiZ throughput on Cherryview.
by Kenneth Graunke
· 10 years ago
0a87a2d
Merge tag 'topic/i915-hda-componentized-2015-01-12' into drm-intel-next-queued
by Daniel Vetter
· 10 years ago
9441159
drm/i915: Make sample_c messages go faster on Haswell.
by Kenneth Graunke
· 10 years ago
2c55018
drm/i915: Disable PSMI sleep messages on all rings around context switches
by Chris Wilson
· 10 years ago
148b83d
drm/i915: Invalidate media caches on gen7
by Chris Wilson
· 10 years ago
c61200c
drm/i915: Add GPGPU_THREADS_DISPATCHED to the register whitelist
by Jordan Justen
· 10 years ago
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