Log - 27ac792ca0b0a1e7e65f20342260650516c95864 - kernel/msm-4.19

54fd644 [MIPS] Fix use of smp_processor_id() in preemptible code. by Pavel Kiryukhin · 17 years ago
10cc352 [MIPS] Allow hardwiring of the CPU type to a single type for optimization. by Ralf Baechle · 17 years ago
641e97f [MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code. by Ralf Baechle · 17 years ago
a369202 [MIPS] Enable support for the userlocal hardware register by Ralf Baechle · 17 years ago
53dc802 [MIPS] FPU ownership management & preemption fixes by Atsushi Nemoto · 18 years ago
fc5d2d2 [MIPS] Use the proper technical term for naming some of the cache macros. by Ralf Baechle · 18 years ago
2e128de [MIPS] Default cpu_has_mipsmt to a runtime check by Chris Dearman · 18 years ago
f41ae0b [MIPS] Fix configuration of R2 CPU features and multithreading. by Ralf Baechle · 19 years ago
62c4f0a Don't include linux/config.h from anywhere else in include/ by David Woodhouse · 19 years ago
f088fc8 [MIPS] FPU affinity for MT ASE. by Ralf Baechle · 19 years ago
de62893 [MIPS] local_r4k_flush_cache_page fix by Atsushi Nemoto · 19 years ago
0401572 MIPS: Reorganize ISA constants strictly as bitmasks. by Ralf Baechle · 19 years ago
b4672d3 MIPS: Introduce machinery for testing for MIPSxxR1/2. by Ralf Baechle · 19 years ago
02cf211 Cleanup the mess in cpu_cache_init. by Ralf Baechle · 19 years ago
8f40611 Detect the MIPS R2 vectored interrupt, external interrupt controller by Ralf Baechle · 19 years ago
02416dc Redo RM9000 workaround which along with other DSP ASE changes was by Ralf Baechle · 20 years ago
e50c0a8 Support the MIPS32 / MIPS64 DSP ASE. by Ralf Baechle · 20 years ago
4194318 Cleanup decoding of MIPSxx config registers. by Ralf Baechle · 20 years ago
875d43e [PATCH] mips: clean up 32/64-bit configuration by Ralf Baechle · 19 years ago
1da177e Linux-2.6.12-rc2 by Linus Torvalds · 20 years ago