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gerrit-public.fairphone.software / kernel / msm-4.19 / 33e141ed1cf74cd8ef26e5f175e43e378157a649 / drivers / gpu / drm / i915 / i915_reg.h
  1. 33e141e drm/i915:bxt: Enable Pooled EU support by arun.siluvery@linux.intel.com · 9 years ago
  2. e93da0a drm/i915/bxt: Sanitiy check the PHY lane power down status by Imre Deak · 9 years ago
  3. 9c8d0b8 drm/i915/bxt: Move DDI PHY enabling/disabling to the power well code by Imre Deak · 9 years ago
  4. a8ab5ed drm/i915/gen9: implement WaConextSwitchWithConcurrentTLBInvalidate by Tim Gore · 9 years ago
  5. d1b4eef drm/i915/gen9: Add WaFbcHighMemBwCorruptionAvoidance by Mika Kuoppala · 9 years ago
  6. 031cd8c drm/i195/fbc: Add WaFbcNukeOnHostModify by Mika Kuoppala · 9 years ago
  7. 303d4ea drm/i915/gen9: Add WaFbcWakeMemOn by Mika Kuoppala · 9 years ago
  8. 590e8ff drm/i915/gen9: Add WaEnableChickenDCPR by Mika Kuoppala · 9 years ago
  9. 44fff99 drm/i915/skl: Add WAC6entrylatency by Mika Kuoppala · 9 years ago
  10. ad2bdb4 drm/i915: Add WaInsertDummyPushConstP for bxt and kbl by Mika Kuoppala · 9 years ago
  11. c0b730d drm/i915/kbl: Add WaDisableDynamicCreditSharing by Mika Kuoppala · 9 years ago
  12. 8aeb7f6 drm/i915/kbl: Add WaDisableGamClockGating by Mika Kuoppala · 9 years ago
  13. b033bb6 drm/i915/gen9: Enable must set chicken bits in config0 reg by Mika Kuoppala · 9 years ago
  14. 17e0adf drm/i915/edp: Add WaKVMNotificationOnConfigChange:bdw by Mika Kuoppala · 9 years ago
  15. eee8efb drm/i915/skl: Add WaDisableGafsUnitClkGating by Mika Kuoppala · 9 years ago
  16. 6bb62855 drm/i915/gen9: Add WaVFEStateAfterPipeControlwithMediaStateClear by arun.siluvery@linux.intel.com · 9 years ago
  17. f90e8c3 drm/i915/dsi: fix bxt split screen and color issue by Jani Nikula · 9 years ago
  18. 1800ad2 drm/i915: Update GEN6_PMINTRMSK setup with GuC enabled by Sagar Arun Kamble · 9 years ago
  19. dc00b6a drm/i915/psr: Implement PSR2 w/a for gen9 by Daniel Vetter · 9 years ago
  20. 7fe6275 drm/i915: Program BXT_CDCLK_CD2X_PIPE by Ville Syrjälä · 9 years ago
  21. 450174f drm/i915/chv: Tune L3 SQC credits based on actual latencies by Imre Deak · 9 years ago
  22. 36579cb drm/i915: Clean up L3 SQC register field definitions by Imre Deak · 9 years ago
  23. 7f1052a drm/i915: Update CDCLK_FREQ register on BDW after changing cdclk frequency by Ville Syrjälä · 9 years ago
  24. 19ab4ed drm/i915: Update RAWCLK_FREQ register on VLV/CHV by Ville Syrjälä · 9 years ago
  25. 050fc46 drm/i915:bxt: implement WaProgramL3SqcReg1DefaultForPerf by Tim Gore · 9 years ago
  26. 52530cb drm/i915: Macros to convert PM time interval values to microseconds by Akash Goel · 9 years ago
  27. 8a292d0 drm/i915: Make RPS EI/thresholds multiple of 25 on SNB-BDW by Ville Syrjälä · 9 years ago
  28. bfd8ad4 drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupport by Tim Gore · 9 years ago
  29. e10fa55 drm/i915: Clean up PCI config register handling by Joonas Lahtinen · 9 years ago
  30. d1e082f drm/i915/bxt: Fix GRC code register field definitions by Imre Deak · 9 years ago
  31. 297b32e drm/i915: Ignore GTFIFODBG FIFO free entry fields on CHV by Ville Syrjälä · 9 years ago
  32. c02e85a drm/i915: Calculate edram size by Mika Kuoppala · 9 years ago
  33. 3accaf7 drm/i915: Store and use edram capabilities by Mika Kuoppala · 9 years ago
  34. b1e429f drm/i915: implement WaClearTdlStateAckDirtyBits by Tim Gore · 9 years ago
  35. d252bf6 drm/i915: Set invert bit for hpd based on VBT by Shubhangi Shrivastava · 9 years ago
  36. c30fec6 drm/i915: Use GPLL ref clock to calculate GPU freqs on VLV/CHV by Ville Syrjälä · 9 years ago
  37. 6b332fa drm/i915/guc: reset GuC and retry on firmware load failure by Arun Siluvery · 9 years ago
  38. 7071af9 drm/i915/chv: add more IOSF port definitions by Jani Nikula · 9 years ago
  39. c231775 drm/i915: Implement WaPixelRepeatModeFixForC0:chv by Ville Syrjälä · 9 years ago
  40. b61e799 drm/i915: BXT DDI PHY sequence BUN by Vandana Kannan · 9 years ago
  41. db18b6a drm/i915/bxt: Fix DSI HW state readout by Imre Deak · 9 years ago
  42. c6c794a drm/i915/bxt: Initialize MIPI DSI for BXT by Shashank Sharma · 9 years ago
  43. 29dc373 drm/i915: Implement color management on chv by Lionel Landwerlin · 9 years ago
  44. 82cf435 drm/i915: Implement color management on bdw/skl/bxt/kbl by Lionel Landwerlin · 9 years ago
  45. 1b85066 drm/i915: Add Haswell CS GPR registers to whitelist by Jordan Justen · 9 years ago
  46. 950b2aa drm/i915/gen9: add WaClearFlowControlGpgpuContextSave by Tim Gore · 9 years ago
  47. ee4b6fa drm/i915: Modify reset func to handle per engine resets by Mika Kuoppala · 9 years ago
  48. 6b93e9c drm/i915/bxt: fix dsi hw state pipe readout by Jani Nikula · 9 years ago
  49. 42c151e drm/i915/dsi: lose the loose 666 format name in favor of packed by Jani Nikula · 9 years ago
  50. 35d38d1 drm/i915: Read out hrawclk from CCK on vlv/chv by Ville Syrjälä · 9 years ago
  51. 782d25c drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards by Deepak M · 9 years ago
  52. 8802e5b drm/i915: Read out VGA dotclock properly on LPT by Ville Syrjälä · 9 years ago
  53. 5b07688 drm/i915/gen9: Extend dmc debug mask to include cores by Mika Kuoppala · 9 years ago
  54. 0780cd3 drm/i915: Fix hpd live status bits for g4x by Ville Syrjälä · 10 years ago
  55. 8c448ca drm/i915: Handle PipeC fused off on IVB/HSW/BDW by Gabriel Feceoru · 10 years ago
  56. da3b891 drm/i915/skl: Fix typo in DPLL_CFGCR1 definition by Lyude · 10 years ago
  57. 274008e drm/i915/bxt: Check BIOS RC6 setup before enabling RC6 by Sagar Arun Kamble · 10 years ago
  58. dfb19ed drm/i915: Extend gpio read/write to other cores by Deepak M · 10 years ago
  59. 10182e7 drm/i915/vlv: drop unused vlv_gps_core_read/write functions by Jani Nikula · 10 years ago
  60. 4688d45 drm/i915: put the IOSF port defines in numerical order by Jani Nikula · 10 years ago
  61. d5165eb drm/i915: implement WaIncreaseDefaultTLBEntries by Tim Gore · 10 years ago
  62. bf4f2fb drm/i915/skl/kbl: Add support for pipe fusing by Patrik Jakobsson · 10 years ago
  63. a78536e drm/i915/skl: Enable Per context Preemption granularity control by Arun Siluvery · 10 years ago
  64. 2c8580e drm/i915/bxt: Add GEN9_CS_DEBUG_MODE1 to HW whitelist by Arun Siluvery · 10 years ago
  65. 3669ab6 drm/i915/gen9: Add HDC_CHICKEN1 to HW whitelist by Arun Siluvery · 10 years ago
  66. e0f3fa0 drm/i915/gen9: Add GEN8_CS_CHICKEN1 to HW whitelist by Arun Siluvery · 10 years ago
  67. 33136b0 drm/i915/gen9: Add framework to whitelist specific GPU registers by Arun Siluvery · 10 years ago
  68. 2da80b5 Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued by Daniel Vetter · 10 years ago
  69. 8ac3e1b drm/i915: Add non claimed mmio checking for vlv/chv by Mika Kuoppala · 10 years ago
  70. ade1ba7 Merge tag 'drm-intel-next-2015-12-18' of git://anongit.freedesktop.org/drm-intel into drm-next by Dave Airlie · 10 years ago
  71. f03d8ed drm/doc: Convert to markdown by Danilo Cesar Lemes de Paula · 10 years ago
  72. 56c4897 drm/i915: dual link pipe selection for bxt by Deepak M · 10 years ago
  73. f7be2c2 drm/i915: Disable CLKOUT_DP bending on LPT/WPT as needed by Ville Syrjälä · 10 years ago
  74. 61ad992 drm/i915: Correct the Ref clock value for BXT by Deepak M · 10 years ago
  75. 65e472e drm/i915: Don't register the CRT connector when it's fused off on LPT-H by Ville Syrjälä · 10 years ago
  76. d965e7a drm/i915/bxt: backlight clock gating workaround by Imre Deak · 10 years ago
  77. f0f59a0 drm/i915: Type safe register read/write by Ville Syrjälä · 10 years ago
  78. 9bca5d0 drm/i915: Add missing ')' to SKL_PS_ECC_STAT define by Ville Syrjälä · 10 years ago
  79. 35dc3f9 drm/i915: Give names to more ring registers by Ville Syrjälä · 10 years ago
  80. e597ef4 drm/i915: Make the cmd parser 64bit regs explicit by Ville Syrjälä · 10 years ago
  81. 8697600 drm/i915: Make the high dword offset more explicit in i915_reg_read_ioctl by Ville Syrjälä · 10 years ago
  82. e6c4c76 drm/i915: Parametrize MOCS registers by Ville Syrjälä · 10 years ago
  83. 6fa1c5f drm/i915: Parametrize L3 error registers by Ville Syrjälä · 10 years ago
  84. 086f8e8 drm/i915: Prefix raw register defines with underscore by Ville Syrjälä · 10 years ago
  85. 9f836f9 drm/i915/gen9: Turn DC handling into a power well by Patrik Jakobsson · 10 years ago
  86. cd02ac5 drm/i915: Explain usage of power well IDs vs bit groups by Patrik Jakobsson · 10 years ago
  87. 13ae3a0 drm/i915/gen9: simplify DC toggling code by Imre Deak · 10 years ago
  88. 56fcfd6 drm/i915: fix the power well ID for always on wells by Imre Deak · 10 years ago
  89. 443a389 drm/i915: Add dev_priv->psr_mmio_base by Ville Syrjälä · 10 years ago
  90. da00bdc drm/i915: Remove the magic AUX_CTL is at DP + foo tricks by Ville Syrjälä · 10 years ago
  91. 750a951 drm/i915: Parametrize AUX registers by Ville Syrjälä · 10 years ago
  92. b377e0d drm/i915: s/DP_PLL_FREQ_160MHZ/DP_PLL_FREQ_162MHZ/ by Ville Syrjälä · 10 years ago
  93. 6fb403d drm/i915: Add csr programming registers to dmc debugfs entry by Mika Kuoppala · 10 years ago
  94. 16e11b9 drm/i915/bxt: Expose DC5 entry count by Mika Kuoppala · 10 years ago
  95. 8337206 drm/i915/skl: Expose DC5/DC6 entry counts by Damien Lespiau · 10 years ago
  96. f1b391a drm/i915/skl: While sanitizing cdclock check the SWF18 as well by Shobhit Kumar · 10 years ago
  97. 01403de drm/i915: Use paramtrized WRPLL_CTL() by Ville Syrjälä · 10 years ago
  98. 85fa792 drm/i915: Parametrize and fix SWF registers by Ville Syrjälä · 10 years ago
  99. fd8f507 drm/i915: s/PIPE_FRMCOUNT_GM45/PIPE_FRMCOUNT_G4X/ etc. by Ville Syrjälä · 10 years ago
  100. 395b291 drm/i915: Fix a few bad hex numbers in register defines by Ville Syrjälä · 10 years ago