1. 1c472d8 clk: tegra: T114: add DFLL DVCO reset control by Paul Walmsley · 12 years ago
  2. 25c9ded clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL by Paul Walmsley · 12 years ago
  3. 7b781c7 clk: tegra: Add fields for override bits by Peter De Schrijver · 12 years ago
  4. aa6fefd clk: tegra: allow PLL m,n,p init from SoC files by Peter De Schrijver · 12 years ago
  5. 061cec9 clk: tegra: Use common of_clk_init function by Prashant Gaikwad · 12 years ago
  6. 27aa99d clk: tegra: devicetree match for nvidia,tegra114-car by Peter De Schrijver · 12 years ago
  7. fdcccbd clk: tegra: Workaround for Tegra114 MSENC problem by Peter De Schrijver · 12 years ago
  8. a26a029 clk: tegra: Add flags to tegra_clk_periph() by Peter De Schrijver · 12 years ago
  9. c1d1939 clk: tegra: Add new fields and PLL types for Tegra114 by Peter De Schrijver · 12 years ago
  10. 3e72771 clk: tegra: move from a lock bit idx to a lock mask by Peter De Schrijver · 12 years ago
  11. 0b6525a clk: tegra: Add PLL post divider table by Peter De Schrijver · 12 years ago
  12. 7ba2881 clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE by Peter De Schrijver · 12 years ago
  13. dd93587 clk: tegra: Add TEGRA_PLL_BYPASS flag by Peter De Schrijver · 12 years ago
  14. dba4072 clk: tegra: Refactor PLL programming code by Peter De Schrijver · 12 years ago
  15. 441f199 clk: tegra: defer application of init table by Stephen Warren · 12 years ago
  16. ce4f331 clk: add table lookup to mux by Peter De Schrijver · 12 years ago
  17. b08e8c0 clk: tegra: add clock support for Tegra30 by Prashant Gaikwad · 12 years ago
  18. 37c26a9 clk: tegra: add clock support for Tegra20 by Prashant Gaikwad · 12 years ago
  19. 8f8f484 clk: tegra: add Tegra specific clocks by Prashant Gaikwad · 12 years ago