1. 3accaf7 drm/i915: Store and use edram capabilities by Mika Kuoppala · 9 years ago
  2. b1e429f drm/i915: implement WaClearTdlStateAckDirtyBits by Tim Gore · 9 years ago
  3. d252bf6 drm/i915: Set invert bit for hpd based on VBT by Shubhangi Shrivastava · 9 years ago
  4. c30fec6 drm/i915: Use GPLL ref clock to calculate GPU freqs on VLV/CHV by Ville Syrjälä · 9 years ago
  5. 6b332fa drm/i915/guc: reset GuC and retry on firmware load failure by Arun Siluvery · 9 years ago
  6. 7071af9 drm/i915/chv: add more IOSF port definitions by Jani Nikula · 9 years ago
  7. c231775 drm/i915: Implement WaPixelRepeatModeFixForC0:chv by Ville Syrjälä · 9 years ago
  8. b61e799 drm/i915: BXT DDI PHY sequence BUN by Vandana Kannan · 9 years ago
  9. db18b6a drm/i915/bxt: Fix DSI HW state readout by Imre Deak · 9 years ago
  10. c6c794a drm/i915/bxt: Initialize MIPI DSI for BXT by Shashank Sharma · 9 years ago
  11. 29dc373 drm/i915: Implement color management on chv by Lionel Landwerlin · 9 years ago
  12. 82cf435 drm/i915: Implement color management on bdw/skl/bxt/kbl by Lionel Landwerlin · 9 years ago
  13. 1b85066 drm/i915: Add Haswell CS GPR registers to whitelist by Jordan Justen · 9 years ago
  14. 950b2aa drm/i915/gen9: add WaClearFlowControlGpgpuContextSave by Tim Gore · 9 years ago
  15. ee4b6fa drm/i915: Modify reset func to handle per engine resets by Mika Kuoppala · 9 years ago
  16. 6b93e9c drm/i915/bxt: fix dsi hw state pipe readout by Jani Nikula · 9 years ago
  17. 42c151e drm/i915/dsi: lose the loose 666 format name in favor of packed by Jani Nikula · 9 years ago
  18. 35d38d1 drm/i915: Read out hrawclk from CCK on vlv/chv by Ville Syrjälä · 9 years ago
  19. 782d25c drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards by Deepak M · 9 years ago
  20. 8802e5b drm/i915: Read out VGA dotclock properly on LPT by Ville Syrjälä · 9 years ago
  21. 5b07688 drm/i915/gen9: Extend dmc debug mask to include cores by Mika Kuoppala · 9 years ago
  22. 0780cd3 drm/i915: Fix hpd live status bits for g4x by Ville Syrjälä · 9 years ago
  23. 8c448ca drm/i915: Handle PipeC fused off on IVB/HSW/BDW by Gabriel Feceoru · 9 years ago
  24. da3b891 drm/i915/skl: Fix typo in DPLL_CFGCR1 definition by Lyude · 9 years ago
  25. 274008e drm/i915/bxt: Check BIOS RC6 setup before enabling RC6 by Sagar Arun Kamble · 9 years ago
  26. dfb19ed drm/i915: Extend gpio read/write to other cores by Deepak M · 9 years ago
  27. 10182e7 drm/i915/vlv: drop unused vlv_gps_core_read/write functions by Jani Nikula · 9 years ago
  28. 4688d45 drm/i915: put the IOSF port defines in numerical order by Jani Nikula · 9 years ago
  29. d5165eb drm/i915: implement WaIncreaseDefaultTLBEntries by Tim Gore · 9 years ago
  30. bf4f2fb drm/i915/skl/kbl: Add support for pipe fusing by Patrik Jakobsson · 9 years ago
  31. a78536e drm/i915/skl: Enable Per context Preemption granularity control by Arun Siluvery · 9 years ago
  32. 2c8580e drm/i915/bxt: Add GEN9_CS_DEBUG_MODE1 to HW whitelist by Arun Siluvery · 9 years ago
  33. 3669ab6 drm/i915/gen9: Add HDC_CHICKEN1 to HW whitelist by Arun Siluvery · 9 years ago
  34. e0f3fa0 drm/i915/gen9: Add GEN8_CS_CHICKEN1 to HW whitelist by Arun Siluvery · 9 years ago
  35. 33136b0 drm/i915/gen9: Add framework to whitelist specific GPU registers by Arun Siluvery · 9 years ago
  36. 2da80b5 Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued by Daniel Vetter · 9 years ago
  37. 8ac3e1b drm/i915: Add non claimed mmio checking for vlv/chv by Mika Kuoppala · 9 years ago
  38. ade1ba7 Merge tag 'drm-intel-next-2015-12-18' of git://anongit.freedesktop.org/drm-intel into drm-next by Dave Airlie · 9 years ago
  39. f03d8ed drm/doc: Convert to markdown by Danilo Cesar Lemes de Paula · 9 years ago
  40. 56c4897 drm/i915: dual link pipe selection for bxt by Deepak M · 9 years ago
  41. f7be2c2 drm/i915: Disable CLKOUT_DP bending on LPT/WPT as needed by Ville Syrjälä · 9 years ago
  42. 61ad992 drm/i915: Correct the Ref clock value for BXT by Deepak M · 9 years ago
  43. 65e472e drm/i915: Don't register the CRT connector when it's fused off on LPT-H by Ville Syrjälä · 9 years ago
  44. d965e7a drm/i915/bxt: backlight clock gating workaround by Imre Deak · 9 years ago
  45. f0f59a0 drm/i915: Type safe register read/write by Ville Syrjälä · 9 years ago
  46. 9bca5d0 drm/i915: Add missing ')' to SKL_PS_ECC_STAT define by Ville Syrjälä · 9 years ago
  47. 35dc3f9 drm/i915: Give names to more ring registers by Ville Syrjälä · 9 years ago
  48. e597ef4 drm/i915: Make the cmd parser 64bit regs explicit by Ville Syrjälä · 9 years ago
  49. 8697600 drm/i915: Make the high dword offset more explicit in i915_reg_read_ioctl by Ville Syrjälä · 9 years ago
  50. e6c4c76 drm/i915: Parametrize MOCS registers by Ville Syrjälä · 9 years ago
  51. 6fa1c5f drm/i915: Parametrize L3 error registers by Ville Syrjälä · 9 years ago
  52. 086f8e8 drm/i915: Prefix raw register defines with underscore by Ville Syrjälä · 9 years ago
  53. 9f836f9 drm/i915/gen9: Turn DC handling into a power well by Patrik Jakobsson · 9 years ago
  54. cd02ac5 drm/i915: Explain usage of power well IDs vs bit groups by Patrik Jakobsson · 9 years ago
  55. 13ae3a0 drm/i915/gen9: simplify DC toggling code by Imre Deak · 9 years ago
  56. 56fcfd6 drm/i915: fix the power well ID for always on wells by Imre Deak · 9 years ago
  57. 443a389 drm/i915: Add dev_priv->psr_mmio_base by Ville Syrjälä · 9 years ago
  58. da00bdc drm/i915: Remove the magic AUX_CTL is at DP + foo tricks by Ville Syrjälä · 9 years ago
  59. 750a951 drm/i915: Parametrize AUX registers by Ville Syrjälä · 9 years ago
  60. b377e0d drm/i915: s/DP_PLL_FREQ_160MHZ/DP_PLL_FREQ_162MHZ/ by Ville Syrjälä · 9 years ago
  61. 6fb403d drm/i915: Add csr programming registers to dmc debugfs entry by Mika Kuoppala · 9 years ago
  62. 16e11b9 drm/i915/bxt: Expose DC5 entry count by Mika Kuoppala · 9 years ago
  63. 8337206 drm/i915/skl: Expose DC5/DC6 entry counts by Damien Lespiau · 9 years ago
  64. f1b391a drm/i915/skl: While sanitizing cdclock check the SWF18 as well by Shobhit Kumar · 9 years ago
  65. 01403de drm/i915: Use paramtrized WRPLL_CTL() by Ville Syrjälä · 9 years ago
  66. 85fa792 drm/i915: Parametrize and fix SWF registers by Ville Syrjälä · 9 years ago
  67. fd8f507 drm/i915: s/PIPE_FRMCOUNT_GM45/PIPE_FRMCOUNT_G4X/ etc. by Ville Syrjälä · 9 years ago
  68. 395b291 drm/i915: Fix a few bad hex numbers in register defines by Ville Syrjälä · 9 years ago
  69. 68d9753 drm/i915: Protect register macro arguments by Ville Syrjälä · 9 years ago
  70. 699fc40 drm/i915: Include gpio_mmio_base in GMBUS reg defines by Ville Syrjälä · 9 years ago
  71. 436c6d4 drm/i915: Parametrize HSW video DIP data registers by Ville Syrjälä · 9 years ago
  72. 03999f0 drm/i915: Eliminate weird parameter inversion from BXT PPS registers by Ville Syrjälä · 9 years ago
  73. 26148bd drm/i915/bxt: Set time interval unit to 0.833us by Akash Goel · 9 years ago
  74. 7b9748c drm/i915: Add GEN7_GPGPU_DISPATCHDIMX/Y/Z to the register whitelist by Jordan Justen · 9 years ago
  75. 022e4e5 drm/i915/bxt: Modify BXT BLC according to VBT changes by Sunil Kamath · 9 years ago
  76. 11b8e4f drm/i915/bxt: Program Tx Rx and Dphy clocks by Shashank Sharma · 9 years ago
  77. 37ab081 drm/i915/bxt: DSI enable for BXT by Shashank Sharma · 9 years ago
  78. 13d70b8 drm/i915: rename INSTDONE1 to GEN4_INSTDONE1 by Imre Deak · 9 years ago
  79. bd93a50 drm/i915: rename INSTDONE to GEN2_INSTDONE by Imre Deak · 9 years ago
  80. f1d5434 drm/i915: remove duplicate names for the render ring INSTDONE register by Imre Deak · 9 years ago
  81. 923c1241 drm/i915: s/GET_CFG_CR1_REG/DPLL_CFGCR1/ etc. by Ville Syrjälä · 9 years ago
  82. 91bedd3 drm/i915/bdw: Check for slice, subslice and EU count for BDW by Łukasz Daniluk · 9 years ago
  83. bfa7df0 drm/i915: Read czclk from CCK on vlv/chv by Ville Syrjälä · 9 years ago
  84. 87d5d25 drm/i915: Renaming CCK related reg definitions by Vandana Kannan · 9 years ago
  85. e66eb81 drm/i915: Add VLV_HDMIB etc. which already include VLV_DISPLAY_BASE by Ville Syrjälä · 9 years ago
  86. f65a9c5 drm/i915: Parametrize PALETTE and LGC_PALETTE by Ville Syrjälä · 9 years ago
  87. c039b7f drm/i915: Include MCHBAR_MIRROR_BASE in ILK_GDSR by Ville Syrjälä · 9 years ago
  88. 7e435ad drm/i915: Add LO/HI PRIVATE_PAT registers by Ville Syrjälä · 9 years ago
  89. eecf613 drm/i915: Parametrize fence registers by Ville Syrjälä · 9 years ago
  90. 9c58a04 drm/i915/bxt: Set oscaledcompmethod to enable scale value by Sonika Jindal · 9 years ago
  91. 9712e68 drm/i915: Parametrize DDI_BUF_TRANS registers by Ville Syrjälä · 9 years ago
  92. 184d7c0 drm/i915: Parametrize TV luma/chroma filter registers by Ville Syrjälä · 9 years ago
  93. 616847e drm/i915: Parametrize ILK turbo registers by Ville Syrjälä · 9 years ago
  94. 4d110c7 drm/i915: Parametrize FBC_TAG registers by Ville Syrjälä · 9 years ago
  95. 22dfe79 drm/i915: Parametrize GEN7_GT_SCRATCH and GEN7_LRA_LIMITS by Ville Syrjälä · 9 years ago
  96. 7d316ae drm/i915: Implement stolen reserved detection for ctg/elk by Ville Syrjälä · 9 years ago
  97. d2e08c0 drm/i915/bxt: DSI prepare changes for BXT by Shashank Sharma · 9 years ago
  98. cfe01a5 drm/i915/bxt: Enable BXT DSI PLL by Shashank Sharma · 9 years ago
  99. 6b6d562 drm/i915/gen9: WA ST Unit Power Optimization Disable by Robert Beckett · 9 years ago
  100. 5b88aba drm/i915/bxt: Add WaSetClckGatingDisableMedia by Arun Siluvery · 9 years ago