Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.19 / 841cd7737557785c0f215b0984c06aaaaa882302
  1. 841cd77 drm/i915: Only refcount ppgtt if it actually is one by Daniel Vetter · 10 years ago
  2. 4d88470 drm/i915: Track file_priv, not ctx in the ppgtt structure by Daniel Vetter · 10 years ago
  3. ee960be drm/i915: Some cleanups for the ppgtt lifetime handling by Daniel Vetter · 10 years ago
  4. b9d06dd drm/i915: vma/ppgtt lifetime rules by Michel Thierry · 10 years ago
  5. 14bf993 drm/i915/bdw: Always use MMIO flips with Execlists by Oscar Mateo · 10 years ago
  6. ba8b7cc drm/i915/bdw: Workload submission mechanism for Execlists by Oscar Mateo · 10 years ago
  7. 1564858 drm/i915/bdw: GEN-specific logical ring emit batchbuffer start by Oscar Mateo · 10 years ago
  8. 73d477f drm/i915/bdw: Interrupts with logical rings by Oscar Mateo · 10 years ago
  9. 9832b9d drm/i915/bdw: Ring idle and stop with logical rings by Oscar Mateo · 10 years ago
  10. 4712274 drm/i915/bdw: GEN-specific logical ring emit flush by Oscar Mateo · 10 years ago
  11. 4da46e1 drm/i915/bdw: GEN-specific logical ring emit request by Oscar Mateo · 10 years ago
  12. 82e104c drm/i915/bdw: New logical ring submission mechanism by Oscar Mateo · 10 years ago
  13. 26fbb77 drm/i915: Make hpd debug messages less cryptic by Ville Syrjälä · 10 years ago
  14. e94e37a drm/i915/bdw: GEN-specific logical ring set/get seqno by Oscar Mateo · 10 years ago
  15. 9b1136d drm/i915/bdw: GEN-specific logical ring init by Oscar Mateo · 10 years ago
  16. 48d8238 drm/i915/bdw: Generic logical ring init and cleanup by Oscar Mateo · 10 years ago
  17. 454afeb drm/i915/bdw: Skeleton for the new logical rings submission path by Oscar Mateo · 10 years ago
  18. a83014d drm/i915: Abstract the legacy workload submission mechanism away by Oscar Mateo · 10 years ago
  19. ec3e996 drm/i915/bdw: Deferred creation of user-created LRCs by Oscar Mateo · 10 years ago
  20. 8670d6f drm/i915/bdw: Populate LR contexts (somewhat) by Oscar Mateo · 10 years ago
  21. 0c7dd53 drm/i915/bdw: Add a context and an engine pointers to the ringbuffer by Daniel Vetter · 10 years ago
  22. 84c2377 drm/i915/bdw: Allocate ringbuffers for Logical Ring Contexts by Oscar Mateo · 10 years ago
  23. 8c857917 drm/i915/bdw: A bit more advanced LR context alloc/free by Oscar Mateo · 10 years ago
  24. c9e003a drm/i915/bdw: Introduce one context backing object per engine by Oscar Mateo · 10 years ago
  25. ede7d42 drm/i915/bdw: Initialization for Logical Ring Contexts by Oscar Mateo · 10 years ago
  26. bd84b1e drm/i915: WARN if module opt sanitization goes out of order by Daniel Vetter · 10 years ago
  27. 127f100 drm/i915/bdw: Macro for LRCs and module option for Execlists by Oscar Mateo · 10 years ago
  28. b20385f drm/i915/bdw: New source and header file for LRs, LRCs and Execlists by Oscar Mateo · 10 years ago
  29. 906843c drm/i915: Simplify relocate_entry_gtt() and make 64-bit safe by Chris Wilson · 10 years ago
  30. 060e82c drm/i915: Remove redundant list_empty(eb->vmas) tests in execbuffer by Chris Wilson · 10 years ago
  31. ad19f10 drm/i915: Pre-validate the NEED_GTTS flag for execbuffer by Chris Wilson · 10 years ago
  32. da51a1e drm/i915: Fix secure dispatch with full ppgtt by Daniel Vetter · 10 years ago
  33. dbbe912 drm/i915: Agnostic INTEL_INFO by Chris Wilson · 10 years ago
  34. 9bec9b1 drm/i915: Double check ring is idle before declaring the GPU wedged by Chris Wilson · 10 years ago
  35. 1bee201 drm/i915: Remove set but unused 'gt_perf_status' by Damien Lespiau · 10 years ago
  36. f6daaec drm/i915: Make intel_disable_shared_dpll() static by Damien Lespiau · 10 years ago
  37. 87f1f46 drm/i915: Copy PCI device id into the device info block by Chris Wilson · 10 years ago
  38. 82b6b6d drm/i915: Remove fenced_gpu_access and pending_fenced_gpu_access by Chris Wilson · 10 years ago
  39. e6a8446 drm/i915: Force CPU relocations if not GTT mapped by Chris Wilson · 10 years ago
  40. dc8cd1e drm/i915: Only perform set-to-gtt domain for objects bound to the global gtt by Chris Wilson · 10 years ago
  41. d6699dd drm/i915: Fix wrong number of HDMI translation entries by Damien Lespiau · 10 years ago
  42. 3bb11b5 drm/i915: Continuation of future readiness series by Sonika Jindal · 10 years ago
  43. 22c5996 drm/i915: fix i915_interrupt_info on BDW by Paulo Zanoni · 10 years ago
  44. fdd508a drm/i915: Call .update_primary_plane in intel_{enable, disable}_primary_hw_plane() by Ville Syrjälä · 10 years ago
  45. f45651b drm/i915: Eliminate rmw from .update_primary_plane() by Ville Syrjälä · 10 years ago
  46. 4fa7904 drm/i915: Fix erroneous conversion to u8 by Damien Lespiau · 10 years ago
  47. 2c0827c drm/i915: Update DRIVER_DATE to 20140808 by Daniel Vetter · 10 years ago
  48. 403bdd1 drm/i915: No busy-loop wait_for in the ring init code by Daniel Vetter · 10 years ago
  49. 01e184c drm/i915: Add sprite watermark programming for VLV and CHV by Gajanan Bhat · 10 years ago
  50. a398e9c drm/i915: Round-up clock and limit drain latency by Gajanan Bhat · 10 years ago
  51. 0948c26 drm/i915: Generalize drain latency computation by Gajanan Bhat · 10 years ago
  52. e2fcdaa drm/i915: Free pending page flip events at .preclose() by Ville Syrjälä · 10 years ago
  53. 692ef70 drm/i915: clean up PPGTT checking logic by Jesse Barnes · 10 years ago
  54. efd814b drm/i915: Polish the chv cmnlane resrt macros by Ville Syrjälä · 11 years ago
  55. 3dd7b974 drm/i915: Hack to tie both common lanes together on chv by Ville Syrjälä · 11 years ago
  56. 3c2777f drm/i915: Add cherryview_update_wm() by Ville Syrjälä · 11 years ago
  57. 41aad81 drm/i915: Update DDL only for current CRTC by Gajanan Bhat · 10 years ago
  58. 1abc4dc drm/i915: Parametrize VLV_DDL registers by Ville Syrjälä · 11 years ago
  59. 0a56067 drm/i915: Fill out the FWx watermark register defines by Ville Syrjälä · 11 years ago
  60. 9783de2 drm: Resetting rotation property by Sonika Jindal · 10 years ago
  61. 7ed6eee drm/i915: Add rotation property for sprites by Ville Syrjälä · 10 years ago
  62. 2a297cc drm: Add rotation_property to mode_config by Sonika Jindal · 10 years ago
  63. e57465f drm/i915: Make intel_plane_restore() return an error by Ville Syrjälä · 10 years ago
  64. 76eebda drm/i915: Add 180 degree sprite rotation support by Ville Syrjälä · 10 years ago
  65. b2784e1 drm/i915: Introduce a for_each_intel_encoder() macro by Damien Lespiau · 10 years ago
  66. 4079b8d drm/i915: Demote the DRRS messages to debug messages by Damien Lespiau · 10 years ago
  67. 7fad359 drm/i915: remove duplicate register defines by Paulo Zanoni · 10 years ago
  68. ac921bd drm/i915: Remove now useless comments about the translation values by Damien Lespiau · 10 years ago
  69. 156ae28 drm/i915/bdw: Remove the HDMI/DVI entry from the DP/eDP/FDI tables by Damien Lespiau · 10 years ago
  70. a26aa8b drm/i915/bdw: Provide the BDW specific HDMI buffer translation table by Damien Lespiau · 10 years ago
  71. ce4dd49 drm/i915: Gather the HDMI level shifter logic into one place by Damien Lespiau · 10 years ago
  72. da46f93 drm/i915: Introduce FBC False Color for debug purposes. by Rodrigo Vivi · 10 years ago
  73. 7f3de83 drm/i915: Align intel_dsi*.c files a bit by Daniel Vetter · 10 years ago
  74. 7f0c860 drm/i915: Add support for Video Burst Mode for MIPI DSI by Shobhit Kumar · 10 years ago
  75. 1fb4450 drm/i915: Clarify CHV swing margin/deemph bits by Ville Syrjälä · 11 years ago
  76. 625695f drm/i915: Call intel_{dp, hdmi}_prepare for chv by Ville Syrjälä · 11 years ago
  77. 1ae0d13 drm/i915: Split chv_update_pll() apart by Ville Syrjälä · 11 years ago
  78. d17ec4c drm/i915: Leave DPLL ref clocks on by Ville Syrjälä · 11 years ago
  79. d49a340 drm/i915: Disable cdclk changes for chv until Punit is ready by Ville Syrjälä · 11 years ago
  80. 383c5a6 drm/i915: Add cdclk change support for chv by Ville Syrjälä · 11 years ago
  81. 06ffc77 d rm/i915: freeze display before the interrupts and GT by Paulo Zanoni · 10 years ago
  82. 3d51278a drm/i915: Make ddi_clock_gate() HSW/BDW specific by Daniel Vetter · 10 years ago
  83. ad13d60 drm/i915: Split the CDCLK retrieval per-platform by Damien Lespiau · 10 years ago
  84. d664c0c drm/i915: Make intel_ddi_calculate_wrpll() HSW/BDW specific by Damien Lespiau · 10 years ago
  85. 0220ab6 drm/i915: Split the BDW/HSW specific shared pll selection by Damien Lespiau · 10 years ago
  86. bf9584b drm/i915: Fix stale comment for intel_ddi_pll_select() by Damien Lespiau · 10 years ago
  87. ea155f3 drm/i915: Restrict hsw_dp_set_ddi_pll_sel() to HSW/BDW by Damien Lespiau · 10 years ago
  88. 143b307 drm/i915: Extract the HSW/BDW shared dpll init code by Damien Lespiau · 10 years ago
  89. 7d2c817 drm/i915: Extract the HSW DDI selection code into its own function by Damien Lespiau · 10 years ago
  90. 74dd692 drm/i915: Add a space to the shared DPLL debug message by Damien Lespiau · 10 years ago
  91. dcfc355 drm/i915: Specify when the PLL hw state fields are valid by Damien Lespiau · 10 years ago
  92. aad3d14 drm/i915: Add DP training pattern 3 for CHV by Ville Syrjälä · 11 years ago
  93. a504345 drm/i915: Split a few long debug prints by Ville Syrjälä · 11 years ago
  94. 026b96e drm/i915: Fix read back of plane stride register by Rafael Barbalho · 10 years ago
  95. 2ce147f drm/i915: Add chv port D TX wells by Ville Syrjälä · 11 years ago
  96. 8258356 drm/i915: Add chv port B and C TX wells by Ville Syrjälä · 11 years ago
  97. 26972b0 drm/i915: Add per-pipe power wells for chv by Ville Syrjälä · 11 years ago
  98. f07057d drm/i915: Add disp2d power well for chv by Ville Syrjälä · 11 years ago
  99. a74d782 drm/i915: Kill intel_reset_dpio() by Ville Syrjälä · 11 years ago
  100. 5d6f7ea drm/i915: Add chv cmnlane power wells by Ville Syrjälä · 11 years ago