Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.19 / 9268834b60c0b08101c7a8522b6901cf4cd57a14 / drivers / clk / pistachio
  1. d31ff5f clk: pistachio: correct critical clock list by Damien.Horsley · 9 years ago
  2. 7937c6c clk: pistachio: Fix PLL rate calculation in integer mode by Zdenko Pulitika · 9 years ago
  3. e53f21c clk: pistachio: Fix override of clk-pll settings from boot loader by Zdenko Pulitika · 9 years ago
  4. 093affb clk: pistachio: Fix 32bit integer overflows by Zdenko Pulitika · 9 years ago
  5. 836ee0f clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) by Stephen Boyd · 9 years ago
  6. cb58e14 clk: pistachio: Include clk.h by Stephen Boyd · 9 years ago
  7. 17bfa3f clk: pistachio: Add sanity checks on PLL configuration by Kevin Cernekee · 10 years ago
  8. e0b7a79 clk: pistachio: Lock the PLL when enabled upon rate change by Ezequiel Garcia · 10 years ago
  9. 4f4adfb clk: pistachio: Add a pll_lock() helper for clarity by Ezequiel Garcia · 10 years ago
  10. a47eb35 CLK: Pistachio: Register external clock gates by Andrew Bresticker · 10 years ago
  11. 8cb94af CLK: Pistachio: Register system interface gate clocks by Andrew Bresticker · 10 years ago
  12. 44960ab CLK: Pistachio: Register peripheral clocks by Andrew Bresticker · 10 years ago
  13. b35d7c3 CLK: Pistachio: Register core clocks by Andrew Bresticker · 10 years ago
  14. 43049b0 CLK: Pistachio: Add PLL driver by Andrew Bresticker · 10 years ago
  15. 8e4b772 CLK: Add basic infrastructure for Pistachio clocks by Andrew Bresticker · 10 years ago