1. 1a85b50 clk: xgene: Add PMD clock by Hoan Tran · 8 years ago
  2. d31d56e clk: xgene: Remove CLK_IS_ROOT by Stephen Boyd · 9 years ago
  3. 0f4c7a1 clk: xgene: Add missing parenthesis when clearing divider value by Loc Ho · 9 years ago
  4. f9285b5 clk: xgene: Remove return from void function by Stephen Boyd · 9 years ago
  5. 47727be clk: xgene: Add SoC and PMD PLL clocks with v2 hardware by Loc Ho · 9 years ago
  6. 1382ea6 clk: xgene: Fix divider with non-zero shift value by Loc Ho · 9 years ago
  7. b1a0eeb clk: xgene: Remove unused setup.h include by Stephen Boyd · 9 years ago
  8. 836ee0f clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) by Stephen Boyd · 9 years ago
  9. 78e50c6 clk: xgene: Delete duplicated name field by Matthias Brugger · 10 years ago
  10. 6ae5fd3 clk: xgene: Silence sparse warnings by Stephen Boyd · 10 years ago
  11. 308964c clk: Add APM X-Gene SoC clock driver by Loc Ho · 12 years ago