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gerrit-public.fairphone.software / kernel / msm-4.19 / b6b1f2d9cf796c3555734949b5e7a74fa2ceeb6c / drivers / clk / tegra
  1. 1116d5a clk: tegra: Don't reset PLL-CX if it is already enabled by Jon Hunter · 8 years ago
  2. 88da44c clk: tegra: Add missing Tegra210 clocks by Peter De Schrijver · 8 years ago
  3. a63b618 clk: tegra: Propagate clk_out_x rate to parent by Alex Frid · 8 years ago
  4. 3913350 clk: tegra: Fix build warnings on Tegra20/Tegra30 by Thierry Reding · 8 years ago
  5. bea1baa clk: tegra: Mark TEGRA210_CLK_DBGAPB as always on by Peter De Schrijver · 8 years ago
  6. 59af78d clk: tegra: Add SATA seq input control by Peter De Schrijver · 8 years ago
  7. 68d724c clk: tegra: Add Tegra210 special resets by Peter De Schrijver · 8 years ago
  8. e745f99 clk: tegra: Rework pll_u by Peter De Schrijver · 8 years ago
  9. 4236e75 clk: tegra: Implement reset control reset by Mikko Perttunen · 8 years ago
  10. 9619dba clk: tegra: Fix disable unused for clocks sharing enable bit by Peter De Schrijver · 8 years ago
  11. 3843832 clk: tegra: Handle UTMIPLL IDDQ by Peter De Schrijver · 8 years ago
  12. 24c3ebe clk: tegra: Add aclk by Peter De Schrijver · 8 years ago
  13. e827ba18 clk: tegra: Add super clock mux/divider by Peter De Schrijver · 8 years ago
  14. 6cfc8bc clk: tegra: Define Tegra210 DMIC clocks by Peter De Schrijver · 8 years ago
  15. 9e8c93e clk: tegra: Fix constness for peripheral clocks by Peter De Schrijver · 8 years ago
  16. 319af79 clk: tegra: Define Tegra210 DMIC sync clocks by Peter De Schrijver · 8 years ago
  17. bfa3483 clk: tegra: Add CEC clock by Peter De Schrijver · 8 years ago
  18. e589376 clk: tegra: Fix type for m field by Peter De Schrijver · 8 years ago
  19. ef6ed2b clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate calculation by Peter De Schrijver · 8 years ago
  20. 8dce89a clk: tegra: Don't warn for PLL defaults unnecessarily by Peter De Schrijver · 8 years ago
  21. 8809eea clk: tegra: Remove non-existing pll_m_out1 clock by Peter De Schrijver · 8 years ago
  22. e7a4967 clk: tegra: Correct afi clock parent by Peter De Schrijver · 8 years ago
  23. 34ac2c2 clk: tegra: Fix ISP clock modelling by Peter De Schrijver · 8 years ago
  24. 9326947 clk: tegra: Fix pll_a1 iddq register, add pll_a1 by Peter De Schrijver · 8 years ago
  25. 5d8a00e Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 8 years ago
  26. ca6f279 clk: tegra: Add BPMP clock driver by Thierry Reding · 8 years ago
  27. 8a31d9d9 PM / OPP: Update OPP users to put reference by Viresh Kumar · 8 years ago
  28. 6f877e7 clk: tegra: dfll: Use builtin_platform_driver to simplify the code by Wei Yongjun · 8 years ago
  29. 33996b0 clk: tegra: make clk-tegra124-dfll-fcpu explicitly non-modular by Paul Gortmaker · 8 years ago
  30. 42134fa clk: tegra: dfll: improve function-level documentation by Julia Lawall · 8 years ago
  31. af7c388 clk: tegra: remove TEGRA_PLL_USE_LOCK for PLLD/PLLD2 by Vince Hsu · 8 years ago
  32. 15d68e8 clk: tegra: Initialize UTMI PLL when enabling PLLU by Andrew Bresticker · 9 years ago
  33. 74d3ba0 clk: tegra: Micro-optimize Tegra210 clock setup by Thierry Reding · 8 years ago
  34. 2e34c2a clk: tegra: Make sor_safe the parent of dpaux and dpaux1 by Thierry Reding · 8 years ago
  35. 2858038 clk: tegra: Mark timer clock as critical by Thierry Reding · 8 years ago
  36. e452b81 clk: tegra: Enable sor1 and sor1_src on Tegra210 by Thierry Reding · 9 years ago
  37. c1273af clk: tegra: Squash sor1 safe/brick/src into a single mux by Thierry Reding · 9 years ago
  38. e2f7165 clk: tegra: Disable spread spectrum on pll_d2 by Thierry Reding · 9 years ago
  39. eddb65e clk: tegra: Fixup post dividers on Tegra210 by Thierry Reding · 9 years ago
  40. 287980e remove lots of IS_ERR_VALUE abuses by Arnd Bergmann · 9 years ago
  41. 0eff458 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 9 years ago
  42. 4a5219e Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc by Linus Torvalds · 9 years ago
  43. 4ace926 Merge tag 'tegra-for-4.7-phy' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers by Arnd Bergmann · 9 years ago
  44. 5bc7532 Merge tag 'tegra-for-4.7-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next by Stephen Boyd · 9 years ago
  45. 2690e91 clk: tegra: dfll: Reformat CVB frequency table by Thierry Reding · 9 years ago
  46. f7c42d9 clk: tegra: dfll: Properly clean up on failure and removal by Thierry Reding · 9 years ago
  47. e8f6a68 clk: tegra: dfll: Make code more comprehensible by Thierry Reding · 9 years ago
  48. 27ed2f7 clk: tegra: dfll: Reference CVB table instead of copying data by Thierry Reding · 9 years ago
  49. 8eaaae9 clk: tegra: dfll: Update kerneldoc by Thierry Reding · 9 years ago
  50. 7970973 clk: tegra: Fix PLL_U post divider and initial rate on Tegra30 by Lucas Stach · 9 years ago
  51. a02cc84 clk: tegra: Initialize PLL_C to sane rate on Tegra30 by Lucas Stach · 9 years ago
  52. 926655f clk: tegra: Fix pllre Tegra210 and add pll_re_out1 by Rhyland Klein · 9 years ago
  53. a91bb60 clk: tegra: Add sor_safe clock by Thierry Reding · 10 years ago
  54. eede711 clk: tegra: dpaux and dpaux1 are fixed factor clocks by Thierry Reding · 10 years ago
  55. 98c4b36 clk: tegra: Add dpaux1 clock by Thierry Reding · 10 years ago
  56. 3d0f4e5 clk: tegra: Use correct parent for dpaux clock by Thierry Reding · 10 years ago
  57. 1ec7032 clk: tegra: Add fixed factor peripheral clock type by Thierry Reding · 10 years ago
  58. 07314fc clk: tegra: Special-case mipi-cal parent on Tegra114 by Thierry Reding · 10 years ago
  59. a9caa84 clk: tegra: Remove trailing blank line by Thierry Reding · 10 years ago
  60. 7e14f22 clk: tegra: Constify peripheral clock registers by Thierry Reding · 10 years ago
  61. 3358d2d clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs by Andrew Bresticker · 9 years ago
  62. c01e015 treewide: Fix typos in printk by Masanari Iida · 9 years ago
  63. 7ba256d clk: tegra: Make reset_control_ops const by Philipp Zabel · 9 years ago
  64. f6da46a clk: tegra: Remove CLK_IS_ROOT by Stephen Boyd · 9 years ago
  65. 5a1d5ef clk: tegra: super: Fix sparse warnings for functions not declared as static by Jon Hunter · 9 years ago
  66. fd360e2 clk: tegra: Fix sparse warnings for functions not declared as static by Jon Hunter · 9 years ago
  67. d9e6579 clk: tegra: Fix sparse warning for pll_m by Jon Hunter · 9 years ago
  68. 2d5b6cf clk: tegra: Use definition for pll_u override bit by Jon Hunter · 9 years ago
  69. 0649c32 clk: tegra: Fix warning caused by pll_u failing to lock by Jon Hunter · 9 years ago
  70. 4f8d444 clk: tegra: Fix clock sources for Tegra210 EMC by Jon Hunter · 9 years ago
  71. 2956994 clk: tegra: Add the APB2APE audio clock on Tegra210 by Jon Hunter · 9 years ago
  72. 047d6d8 clk: tegra: Add missing of_node_put() by Amitoj Kaur Chawla · 9 years ago
  73. 442f53f clk: tegra: Fix PLLE SS coefficients by Mark Kuo · 9 years ago
  74. fd2963b clk: tegra: Fix typos around clearing PLLE bits during enable by Rhyland Klein · 9 years ago
  75. f59b016 clk: tegra: Do not disable PLLE when under hardware control by Mark Kuo · 9 years ago
  76. 3dad5c5 clk: tegra: Fix pllx dyn step calculation by Rhyland Klein · 9 years ago
  77. 3eb6156 clk: tegra: pll: Fix potential sleeping-while-atomic by Andrew Bresticker · 9 years ago
  78. 736971b clk: tegra: Fix the misnaming of nvenc from msenc by Rhyland Klein · 9 years ago
  79. 474f2ba clk: tegra: Fix naming of MISC registers by Rhyland Klein · 9 years ago
  80. 1405011 clk: tegra: Remove improper flags for lock_enable by Rhyland Klein · 9 years ago
  81. 21e4903 clk: tegra: Fix divider on VI_I2C by Rhyland Klein · 9 years ago
  82. e3de671 Merge tag 'asm-generic-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic by Linus Torvalds · 9 years ago
  83. 2d7f61f clk: tegra: Read correct IDDQ register in PLL_SS registration by Bill Huang · 9 years ago
  84. a4ca2b2 clk: tegra: Fix WARN_ON in PLL_RE registration by Bill Huang · 9 years ago
  85. afff455 clk: tegra: pll: Fix issues with rates for VCO PLLs by Andrew Bresticker · 9 years ago
  86. 6b301a0 clk: tegra: Add support for Tegra210 clocks by Rhyland Klein · 9 years ago
  87. 139fd30 clk: tegra: Add Super Gen5 Logic by Bill Huang · 9 years ago
  88. 0ef9db6 clk: tegra: pll: Add logic for SS by Bill Huang · 9 years ago
  89. 17e9273 clk: tegra: pll: Add dyn_ramp callback by Rhyland Klein · 9 years ago
  90. b985114 clk: tegra: pll: Add Set_default logic by Bill Huang · 9 years ago
  91. b5512b4 clk: tegra: pll: Adjust vco_min if SDM present by Bill Huang · 9 years ago
  92. 6929715 clk: tegra: pll: Add support for PLLMB for Tegra210 by Rhyland Klein · 9 years ago
  93. dd322f0 clk: tegra: pll: Add specialized logic for Tegra210 by Rhyland Klein · 9 years ago
  94. 267b62a clk: tegra: pll: Update PLLM handling by Danny Huang · 9 years ago
  95. 86c679a clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate by Rhyland Klein · 9 years ago
  96. fde207e clk: tegra: pll: Add code to handle if resets are supported by PLL by Bill Huang · 9 years ago
  97. 407254d clk: tegra: pll: Add logic for out-of-table rates for T210 by Rhyland Klein · 9 years ago
  98. d907f4b clk: tegra: pll: Add logic for handling SDM data by Rhyland Klein · 9 years ago
  99. 3706b43 clk: tegra: pll: Don't unconditionally set LOCK flags by Rhyland Klein · 9 years ago
  100. 56fd27b clk: tegra: pll: Change misc_reg count from 3 to 6 by Bill Huang · 9 years ago