1. 22ef01a clk: tegra: Use readl_relaxed_poll_timeout_atomic() in tegra210_clock_init() by Nicolin Chen · 7 years ago
  2. 1752c9e clk: tegra: dfll: Fix drvdata overwriting issue by Nicolin Chen · 7 years ago
  3. 54eff22 clk: tegra: Fix cclk_lp divisor register by Michał Mirosław · 7 years ago
  4. d80a32f clk: tegra: Bump SCLK clock rate to 216 MHz by Dmitry Osipenko · 7 years ago
  5. 5a6b184 clk: tegra: Use common definition of APBDMA clock gate by Dmitry Osipenko · 7 years ago
  6. 3ff46fd clk: tegra: Correct parent of the APBDMA clock by Dmitry Osipenko · 7 years ago
  7. 899f809 clk: tegra: Add AHB DMA clock entry by Dmitry Osipenko · 7 years ago
  8. 109eba2 clk: tegra: Mark APB clock as critical by Jon Hunter · 7 years ago
  9. d83b26e clk: tegra: Make tegra_clk_pll_params __ro_after_init by Bhumika Goyal · 7 years ago
  10. bc2e4d2 clk: tegra: Fix sor1_out clock implementation by Thierry Reding · 7 years ago
  11. 1d7e2c8 clk: tegra: Use tegra_clk_register_periph_data() by Thierry Reding · 7 years ago
  12. 8be9519 clk: tegra: Add peripheral clock registration helper by Thierry Reding · 7 years ago
  13. 231ca2e clk: tegra: Check BPMP response return code by Timo Alho · 7 years ago
  14. 7157c69 clk: tegra: Fix Tegra210 PLLU initialization by Alex Frid · 7 years ago
  15. 71422db clk: tegra: Correct Tegra210 UTMIPLL poweron delay by Alex Frid · 7 years ago
  16. 2f924ac clk: tegra: Fix T210 PLLRE registration by Alex Frid · 7 years ago
  17. f7bdb8b clk: tegra: Update T210 PLLSS (D2/DP) registration by Alex Frid · 7 years ago
  18. ac99afe clk: tegra: Re-factor T210 PLLX registration by Alex Frid · 7 years ago
  19. 1934ffd clk: tegra: don't warn for pll_d2 defaults unnecessarily by Peter De Schrijver · 7 years ago
  20. 3dd065e clk: tegra: change post IDDQ release delay to 5us by Peter De Schrijver · 7 years ago
  21. 82c875c clk: tegra: Add TEGRA_PERIPH_ON_APB flag to I2C by Alex Frid · 7 years ago
  22. a851ea2 clk: tegra: Fix T210 effective NDIV calculation by Alex Frid · 7 years ago
  23. bc7b34a clk: tegra: Init cfg structure in _get_pll_mnp by Peter De Schrijver · 7 years ago
  24. e34e69c clk: tegra210: remove non-existing VFIR clock by Peter De Schrijver · 7 years ago
  25. 030999f clk: tegra: disable SSC for PLL_D2 by Peter De Schrijver · 7 years ago
  26. 04434cf clk: tegra: Enable PLL_SS for Tegra210 by Peter De Schrijver · 7 years ago
  27. 1a7da87 clk: tegra: fix SS control on PLL enable/disable by Peter De Schrijver · 7 years ago
  28. 1667393 clk: Convert to using %pOF instead of full_name by Rob Herring · 7 years ago
  29. 1116d5a clk: tegra: Don't reset PLL-CX if it is already enabled by Jon Hunter · 8 years ago
  30. 88da44c clk: tegra: Add missing Tegra210 clocks by Peter De Schrijver · 8 years ago
  31. a63b618 clk: tegra: Propagate clk_out_x rate to parent by Alex Frid · 8 years ago
  32. 3913350 clk: tegra: Fix build warnings on Tegra20/Tegra30 by Thierry Reding · 8 years ago
  33. bea1baa clk: tegra: Mark TEGRA210_CLK_DBGAPB as always on by Peter De Schrijver · 8 years ago
  34. 59af78d clk: tegra: Add SATA seq input control by Peter De Schrijver · 8 years ago
  35. 68d724c clk: tegra: Add Tegra210 special resets by Peter De Schrijver · 8 years ago
  36. e745f99 clk: tegra: Rework pll_u by Peter De Schrijver · 8 years ago
  37. 4236e75 clk: tegra: Implement reset control reset by Mikko Perttunen · 8 years ago
  38. 9619dba clk: tegra: Fix disable unused for clocks sharing enable bit by Peter De Schrijver · 8 years ago
  39. 3843832 clk: tegra: Handle UTMIPLL IDDQ by Peter De Schrijver · 8 years ago
  40. 24c3ebe clk: tegra: Add aclk by Peter De Schrijver · 8 years ago
  41. e827ba18 clk: tegra: Add super clock mux/divider by Peter De Schrijver · 8 years ago
  42. 6cfc8bc clk: tegra: Define Tegra210 DMIC clocks by Peter De Schrijver · 8 years ago
  43. 9e8c93e clk: tegra: Fix constness for peripheral clocks by Peter De Schrijver · 8 years ago
  44. 319af79 clk: tegra: Define Tegra210 DMIC sync clocks by Peter De Schrijver · 8 years ago
  45. bfa3483 clk: tegra: Add CEC clock by Peter De Schrijver · 8 years ago
  46. e589376 clk: tegra: Fix type for m field by Peter De Schrijver · 8 years ago
  47. ef6ed2b clk: tegra: Correct tegra210_pll_fixed_mdiv_cfg rate calculation by Peter De Schrijver · 8 years ago
  48. 8dce89a clk: tegra: Don't warn for PLL defaults unnecessarily by Peter De Schrijver · 8 years ago
  49. 8809eea clk: tegra: Remove non-existing pll_m_out1 clock by Peter De Schrijver · 8 years ago
  50. e7a4967 clk: tegra: Correct afi clock parent by Peter De Schrijver · 8 years ago
  51. 34ac2c2 clk: tegra: Fix ISP clock modelling by Peter De Schrijver · 8 years ago
  52. 9326947 clk: tegra: Fix pll_a1 iddq register, add pll_a1 by Peter De Schrijver · 8 years ago
  53. 5d8a00e Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 8 years ago
  54. ca6f279 clk: tegra: Add BPMP clock driver by Thierry Reding · 8 years ago
  55. 8a31d9d9 PM / OPP: Update OPP users to put reference by Viresh Kumar · 8 years ago
  56. 6f877e7 clk: tegra: dfll: Use builtin_platform_driver to simplify the code by Wei Yongjun · 8 years ago
  57. 33996b0 clk: tegra: make clk-tegra124-dfll-fcpu explicitly non-modular by Paul Gortmaker · 9 years ago
  58. 42134fa clk: tegra: dfll: improve function-level documentation by Julia Lawall · 8 years ago
  59. af7c388 clk: tegra: remove TEGRA_PLL_USE_LOCK for PLLD/PLLD2 by Vince Hsu · 8 years ago
  60. 15d68e8 clk: tegra: Initialize UTMI PLL when enabling PLLU by Andrew Bresticker · 9 years ago
  61. 74d3ba0 clk: tegra: Micro-optimize Tegra210 clock setup by Thierry Reding · 9 years ago
  62. 2e34c2a clk: tegra: Make sor_safe the parent of dpaux and dpaux1 by Thierry Reding · 9 years ago
  63. 2858038 clk: tegra: Mark timer clock as critical by Thierry Reding · 9 years ago
  64. e452b81 clk: tegra: Enable sor1 and sor1_src on Tegra210 by Thierry Reding · 9 years ago
  65. c1273af clk: tegra: Squash sor1 safe/brick/src into a single mux by Thierry Reding · 9 years ago
  66. e2f7165 clk: tegra: Disable spread spectrum on pll_d2 by Thierry Reding · 9 years ago
  67. eddb65e clk: tegra: Fixup post dividers on Tegra210 by Thierry Reding · 9 years ago
  68. 287980e remove lots of IS_ERR_VALUE abuses by Arnd Bergmann · 9 years ago
  69. 0eff458 Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 9 years ago
  70. 4a5219e Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc by Linus Torvalds · 9 years ago
  71. 4ace926 Merge tag 'tegra-for-4.7-phy' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers by Arnd Bergmann · 9 years ago
  72. 5bc7532 Merge tag 'tegra-for-4.7-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next by Stephen Boyd · 9 years ago
  73. 2690e91 clk: tegra: dfll: Reformat CVB frequency table by Thierry Reding · 9 years ago
  74. f7c42d9 clk: tegra: dfll: Properly clean up on failure and removal by Thierry Reding · 9 years ago
  75. e8f6a68 clk: tegra: dfll: Make code more comprehensible by Thierry Reding · 9 years ago
  76. 27ed2f7 clk: tegra: dfll: Reference CVB table instead of copying data by Thierry Reding · 9 years ago
  77. 8eaaae9 clk: tegra: dfll: Update kerneldoc by Thierry Reding · 9 years ago
  78. 7970973 clk: tegra: Fix PLL_U post divider and initial rate on Tegra30 by Lucas Stach · 9 years ago
  79. a02cc84 clk: tegra: Initialize PLL_C to sane rate on Tegra30 by Lucas Stach · 9 years ago
  80. 926655f clk: tegra: Fix pllre Tegra210 and add pll_re_out1 by Rhyland Klein · 9 years ago
  81. a91bb60 clk: tegra: Add sor_safe clock by Thierry Reding · 10 years ago
  82. eede711 clk: tegra: dpaux and dpaux1 are fixed factor clocks by Thierry Reding · 10 years ago
  83. 98c4b36 clk: tegra: Add dpaux1 clock by Thierry Reding · 10 years ago
  84. 3d0f4e5 clk: tegra: Use correct parent for dpaux clock by Thierry Reding · 10 years ago
  85. 1ec7032 clk: tegra: Add fixed factor peripheral clock type by Thierry Reding · 10 years ago
  86. 07314fc clk: tegra: Special-case mipi-cal parent on Tegra114 by Thierry Reding · 10 years ago
  87. a9caa84 clk: tegra: Remove trailing blank line by Thierry Reding · 10 years ago
  88. 7e14f22 clk: tegra: Constify peripheral clock registers by Thierry Reding · 10 years ago
  89. 3358d2d clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs by Andrew Bresticker · 10 years ago
  90. c01e015 treewide: Fix typos in printk by Masanari Iida · 9 years ago
  91. 7ba256d clk: tegra: Make reset_control_ops const by Philipp Zabel · 9 years ago
  92. f6da46a clk: tegra: Remove CLK_IS_ROOT by Stephen Boyd · 9 years ago
  93. 5a1d5ef clk: tegra: super: Fix sparse warnings for functions not declared as static by Jon Hunter · 9 years ago
  94. fd360e2 clk: tegra: Fix sparse warnings for functions not declared as static by Jon Hunter · 9 years ago
  95. d9e6579 clk: tegra: Fix sparse warning for pll_m by Jon Hunter · 9 years ago
  96. 2d5b6cf clk: tegra: Use definition for pll_u override bit by Jon Hunter · 9 years ago
  97. 0649c32 clk: tegra: Fix warning caused by pll_u failing to lock by Jon Hunter · 9 years ago
  98. 4f8d444 clk: tegra: Fix clock sources for Tegra210 EMC by Jon Hunter · 9 years ago
  99. 2956994 clk: tegra: Add the APB2APE audio clock on Tegra210 by Jon Hunter · 9 years ago
  100. 047d6d8 clk: tegra: Add missing of_node_put() by Amitoj Kaur Chawla · 9 years ago