1. 5c33f8b MIPS: Add definitions of SegCtl registers and use them by Matt Redfearn · 9 years ago
  2. e81a8c7d MIPS: Malta: Setup RAM regions via DT by Paul Burton · 9 years ago
  3. fbd5524 irqchip: mips-gic: Probe for number of external interrupts by Andrew Bresticker · 10 years ago
  4. ca4d24f MIPS: Malta: EVA: Rename 'eva_entry' to 'platform_eva_init' by Markos Chandras · 10 years ago
  5. c975048 MIPS: GIC: Move GIC_NUM_INTRS into platform irq.h by Jeffrey Deans · 10 years ago
  6. b6911bb MIPS: Malta: add suspend state entry code by Paul Burton · 11 years ago
  7. b633648 MIPS: MT: Remove SMTC support by Ralf Baechle · 11 years ago
  8. d0ba354 MIPS: malta: Add support for SMP EVA by Markos Chandras · 11 years ago
  9. c9fede2 MIPS: malta: spaces.h: Add spaces.h file for Malta (EVA) by Markos Chandras · 11 years ago
  10. f8b7faf MIPS: malta: Configure Segment Control registers for EVA boot by Markos Chandras · 11 years ago
  11. 7034228 MIPS: Whitespace cleanup. by Ralf Baechle · 12 years ago
  12. bdf2050 MIPS: PMC-Sierra Yosemite: Remove support. by Ralf Baechle · 12 years ago
  13. 5fba096 MIPS: Enable cpu_has_clo_clz for MIPS Technologies' platforms by Shinya Kuribayashi · 14 years ago
  14. b8d6f78 MIPS: Malta: Remove pointless use use of CONFIG_CPU_HAS_LLSC by Ralf Baechle · 15 years ago
  15. 384740d MIPS: Move headfiles to new location below arch/mips/include by Ralf Baechle · 16 years ago