[SCSI] mvsas: fix phy sas address
The phy sas address is showing wrongly (wrong endianness). Fix up the
endian transforms to make this correct.
Signed-off-by: Ke Wei <kewei@marvell.com>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
diff --git a/drivers/scsi/mvsas.c b/drivers/scsi/mvsas.c
old mode 100644
new mode 100755
index d4a6ac3..5ec0665
--- a/drivers/scsi/mvsas.c
+++ b/drivers/scsi/mvsas.c
@@ -40,7 +40,7 @@
#include <asm/io.h>
#define DRV_NAME "mvsas"
-#define DRV_VERSION "0.5"
+#define DRV_VERSION "0.5.1"
#define _MV_DUMP 0
#define MVS_DISABLE_NVRAM
#define MVS_DISABLE_MSI
@@ -1005,7 +1005,7 @@
return rc;
#else
/* FIXME , For SAS target mode */
- memcpy(buf, "\x00\x00\xab\x11\x30\x04\x05\x50", 8);
+ memcpy(buf, "\x50\x05\x04\x30\x11\xab\x00\x00", 8);
return 0;
#endif
}
@@ -1330,7 +1330,7 @@
mvs_hba_cq_dump(mvi);
- if (unlikely(rx_desc & RXQ_DONE))
+ if (likely(rx_desc & RXQ_DONE))
mvs_slot_complete(mvi, rx_desc);
if (rx_desc & RXQ_ATTN) {
attn = true;
@@ -2720,9 +2720,8 @@
msleep(100);
/* init and reset phys */
for (i = 0; i < mvi->chip->n_phy; i++) {
- /* FIXME: is this the correct dword order? */
- u32 lo = *((u32 *)&mvi->sas_addr[0]);
- u32 hi = *((u32 *)&mvi->sas_addr[4]);
+ u32 lo = be32_to_cpu(*(u32 *)&mvi->sas_addr[4]);
+ u32 hi = be32_to_cpu(*(u32 *)&mvi->sas_addr[0]);
mvs_detect_porttype(mvi, i);