| commit | ecd870bef47a09d5d4cc9f36972c4e78e5b28526 | [log] [tgz] |
|---|---|---|
| author | Alan Kwong <akwong@codeaurora.org> | Fri Jun 16 15:31:28 2017 -0400 |
| committer | Alan Kwong <akwong@codeaurora.org> | Mon Jun 19 18:57:09 2017 -0400 |
| tree | fab875946084a526145c45ca960fb724c1fb2192 | |
| parent | 123357f5cf19cd017f563982d4589e038b8d7d06 [diff] |
drm/msm: increase minimum bandwidth to match clock plan Current minimum bandwidth of 2MBps translates to 19.2MHz AXI clock, which is below the minimum in clock plan. Increase minimum bandwidth to 1.6GBps so AXI clock will stay at the minimum of 60MHz as in the clock plan. CRs-Fixed: 2037879 Change-Id: Ic84db29a54970644ee2c74da35636e2da1e348e3 Signed-off-by: Alan Kwong <akwong@codeaurora.org>