| commit | 059289b260826deb43601644a7ad39c2608e6861 | [log] [tgz] |
|---|---|---|
| author | Pawel Moll <pawel.moll@arm.com> | Thu Dec 15 10:57:28 2011 +0000 |
| committer | Pawel Moll <pawel.moll@arm.com> | Fri Feb 24 09:18:21 2012 +0000 |
| tree | 4fc79d16d7a5b0fc52b8969e909d8dd5e8aaba4c | |
| parent | cca070a916fb8ba78bb1494a35ae01f20eff5a57 [diff] |
ARM: vexpress: Add Device Tree for V2P-CA15 core tile (TC1 variant) This patch adds Device Tree file for the CoreTile Express A15x2 (V2P-CA15) with Test Chip 1. As the chip's GIC has 160 interrupt inputs and equivalent SMM (FPGA) has GIC synthesised with 256 interrupts, NR_IRQS is increased. Signed-off-by: Pawel Moll <pawel.moll@arm.com>