ARM: dts: msm: Populate QUPV3 serial Engine device nodes for SDM670
QUPv3 is a GENI based core with multiple Serial Engines(SE). Each SE
instance can be configured to be either an I2C/SPI/UART master for a
given platform.
Setup a device tree file to declare all possible SE device nodes which
the platform specific device tree files can enable.
Also enable the console port on se10 for RUMI target.
Change-Id: Iaff551a94d9d82d33a0c7cad186df3ab8f42f8c0
Signed-off-by: Mukesh Kumar Savaliya <msavaliy@codeaurora.org>
diff --git a/arch/arm64/boot/dts/qcom/sdm670-rumi.dtsi b/arch/arm64/boot/dts/qcom/sdm670-rumi.dtsi
index 6ea92ee..b881252 100644
--- a/arch/arm64/boot/dts/qcom/sdm670-rumi.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm670-rumi.dtsi
@@ -9,3 +9,39 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
+
+/{
+ aliases {
+ serial0 = &qupv3_se10_2uart;
+ serial1 = &qupv3_se9_2uart;
+ spi0 = &qupv3_se8_spi;
+ i2c0 = &qupv3_se10_i2c;
+ i2c1 = &qupv3_se3_i2c;
+ hsuart0 = &qupv3_se6_4uart;
+ };
+
+};
+
+&qupv3_se9_2uart {
+ status = "disabled";
+};
+
+&qupv3_se8_spi {
+ status = "disabled";
+};
+
+&qupv3_se10_2uart {
+ status = "ok";
+};
+
+&qupv3_se3_i2c {
+ status = "disabled";
+};
+
+&qupv3_se10_i2c {
+ status = "disabled";
+};
+
+&qupv3_se6_4uart {
+ status = "disabled";
+};