| commit | 06d2f9dfa663367e8cc1690d7e5ce4113e5dbcc1 | [log] [tgz] |
|---|---|---|
| author | Chanwoo Choi <cw00.choi@samsung.com> | Mon Feb 02 23:24:01 2015 +0900 |
| committer | Sylwester Nawrocki <s.nawrocki@samsung.com> | Wed Feb 04 18:58:11 2015 +0100 |
| tree | c691b7076f3a94d18ddc7279e8a0416c2f9e4a90 | |
| parent | a29308dad5dc4695a344ed9042cae8a1b8e35267 [diff] |
clk: samsung: exynos5433: Add clocks for CMU_MIF domain This patch adds the mux/divider/gate clocks of CMU_MIF domain which includes the clocks for DMC(DRAM memory controller) and CCI(Cache Coherent Interconnect). The CMU_MIF domain provides the source clocks for CMU_DISP/CMU_BUS2. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>