diff --git a/Documentation/arm/Samsung/Overview.txt b/Documentation/arm/Samsung/Overview.txt
index 658abb2..66edb1e 100644
--- a/Documentation/arm/Samsung/Overview.txt
+++ b/Documentation/arm/Samsung/Overview.txt
@@ -13,7 +13,6 @@
 
   - S3C24XX: See Documentation/arm/Samsung-S3C24XX/Overview.txt for full list
   - S3C64XX: S3C6400 and S3C6410
-  - S5P6440
   - S5PC100
   - S5PC110 / S5PV210
 
@@ -34,7 +33,6 @@
   A number of configurations are supplied, as there is no current way of
   unifying all the SoCs into one kernel.
 
-  s5p6440_defconfig - S5P6440 specific default configuration
   s5pc100_defconfig - S5PC100 specific default configuration
   s5pc110_defconfig - S5PC110 specific default configuration
   s5pv210_defconfig - S5PV210 specific default configuration
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 245058b..48be04b 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -758,24 +758,6 @@
 	help
 	  Samsung S3C64XX series based systems
 
-config ARCH_S5P64X0
-	bool "Samsung S5P6440 S5P6450"
-	select ATAGS
-	select CLKDEV_LOOKUP
-	select CLKSRC_SAMSUNG_PWM
-	select CPU_V6
-	select GENERIC_CLOCKEVENTS
-	select GPIO_SAMSUNG
-	select HAVE_S3C2410_I2C if I2C
-	select HAVE_S3C2410_WATCHDOG if WATCHDOG
-	select HAVE_S3C_RTC if RTC_CLASS
-	select NEED_MACH_GPIO_H
-	select SAMSUNG_ATAGS
-	select SAMSUNG_WDT_RESET
-	help
-	  Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
-	  SMDK6450.
-
 config ARCH_S5PC100
 	bool "Samsung S5PC100"
 	select ARCH_REQUIRE_GPIOLIB
@@ -1004,8 +986,6 @@
 
 source "arch/arm/mach-s3c64xx/Kconfig"
 
-source "arch/arm/mach-s5p64x0/Kconfig"
-
 source "arch/arm/mach-s5pc100/Kconfig"
 
 source "arch/arm/mach-s5pv210/Kconfig"
@@ -1569,7 +1549,7 @@
 
 config HZ_FIXED
 	int
-	default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
+	default 200 if ARCH_EBSA110 || ARCH_S3C24XX || \
 		ARCH_S5PV210 || ARCH_EXYNOS4
 	default AT91_TIMER_HZ if ARCH_AT91
 	default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE_LEGACY
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 6721fab..826b262 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -187,7 +187,6 @@
 machine-$(CONFIG_ARCH_RPC)		+= rpc
 machine-$(CONFIG_ARCH_S3C24XX)		+= s3c24xx
 machine-$(CONFIG_ARCH_S3C64XX)		+= s3c64xx
-machine-$(CONFIG_ARCH_S5P64X0)		+= s5p64x0
 machine-$(CONFIG_ARCH_S5PC100)		+= s5pc100
 machine-$(CONFIG_ARCH_S5PV210)		+= s5pv210
 machine-$(CONFIG_ARCH_SA1100)		+= sa1100
diff --git a/arch/arm/configs/s5p64x0_defconfig b/arch/arm/configs/s5p64x0_defconfig
deleted file mode 100644
index ad6b61b..0000000
--- a/arch/arm/configs/s5p64x0_defconfig
+++ /dev/null
@@ -1,68 +0,0 @@
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSFS_DEPRECATED_V2=y
-CONFIG_BLK_DEV_INITRD=y
-CONFIG_KALLSYMS_ALL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S5P64X0=y
-CONFIG_S3C_BOOT_ERROR_RESET=y
-CONFIG_S3C_LOWLEVEL_UART_PORT=1
-CONFIG_MACH_SMDK6440=y
-CONFIG_MACH_SMDK6450=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_CPU_32v6K=y
-CONFIG_AEABI=y
-CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
-CONFIG_FPE_NWFPE=y
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_PREVENT_FIRMWARE_BUILD is not set
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=8192
-# CONFIG_MISC_DEVICES is not set
-CONFIG_SCSI=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_INPUT_EVDEV=y
-CONFIG_INPUT_TOUCHSCREEN=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_NR_UARTS=3
-CONFIG_SERIAL_SAMSUNG=y
-CONFIG_SERIAL_SAMSUNG_CONSOLE=y
-CONFIG_HW_RANDOM=y
-# CONFIG_HWMON is not set
-CONFIG_DISPLAY_SUPPORT=y
-# CONFIG_VGA_CONSOLE is not set
-# CONFIG_HID_SUPPORT is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_INOTIFY=y
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CRAMFS=y
-CONFIG_ROMFS_FS=y
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DEBUG_RT_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_SPINLOCK_SLEEP=y
-CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_DEBUG_USER=y
-CONFIG_DEBUG_ERRORS=y
-CONFIG_DEBUG_LL=y
-CONFIG_DEBUG_S3C_UART=1
-CONFIG_CRYPTO=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
-CONFIG_CRC_CCITT=y
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
deleted file mode 100644
index 26003e2..0000000
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ /dev/null
@@ -1,102 +0,0 @@
-# arch/arm/mach-s5p64x0/Kconfig
-#
-# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
-#		http://www.samsung.com/
-#
-# Licensed under GPLv2
-
-if ARCH_S5P64X0
-
-config CPU_S5P6440
-	bool
-	select ARM_AMBA
-	select PL330_DMA if DMADEVICES
-	select S5P_SLEEP if PM
-	select SAMSUNG_WAKEMASK if PM
-	help
-	  Enable S5P6440 CPU support
-
-config CPU_S5P6450
-	bool
-	select ARM_AMBA
-	select PL330_DMA if DMADEVICES
-	select S5P_SLEEP if PM
-	select SAMSUNG_WAKEMASK if PM
-	help
-	  Enable S5P6450 CPU support
-
-config S5P64X0_SETUP_FB_24BPP
-	bool
-	help
-	  Common setup code for S5P64X0 based boards with a LCD display
-	  through RGB interface.
-
-config S5P64X0_SETUP_I2C1
-	bool
-	help
-	  Common setup code for i2c bus 1.
-
-config S5P64X0_SETUP_SPI
-	bool
-	help
-	  Common setup code for SPI GPIO configurations
-
-config S5P64X0_SETUP_SDHCI_GPIO
-	bool
-	help
-	  Common setup code for SDHCI gpio.
-
-# machine support
-
-config MACH_SMDK6440
-	bool "SMDK6440"
-	select CPU_S5P6440
-	select S3C_DEV_FB
-	select S3C_DEV_HSMMC
-	select S3C_DEV_HSMMC1
-	select S3C_DEV_HSMMC2
-	select S3C_DEV_I2C1
-	select S3C_DEV_RTC
-	select S3C_DEV_WDT
-	select S5P64X0_SETUP_FB_24BPP
-	select S5P64X0_SETUP_I2C1
-	select S5P64X0_SETUP_SDHCI_GPIO
-	select SAMSUNG_DEV_ADC
-	select SAMSUNG_DEV_BACKLIGHT
-	select SAMSUNG_DEV_PWM
-	select SAMSUNG_DEV_TS
-	help
-	  Machine support for the Samsung SMDK6440
-
-config MACH_SMDK6450
-	bool "SMDK6450"
-	select CPU_S5P6450
-	select S3C_DEV_FB
-	select S3C_DEV_HSMMC
-	select S3C_DEV_HSMMC1
-	select S3C_DEV_HSMMC2
-	select S3C_DEV_I2C1
-	select S3C_DEV_RTC
-	select S3C_DEV_WDT
-	select S5P64X0_SETUP_FB_24BPP
-	select S5P64X0_SETUP_I2C1
-	select S5P64X0_SETUP_SDHCI_GPIO
-	select SAMSUNG_DEV_ADC
-	select SAMSUNG_DEV_BACKLIGHT
-	select SAMSUNG_DEV_PWM
-	select SAMSUNG_DEV_TS
-	help
-	  Machine support for the Samsung SMDK6450
-
-menu "Use 8-bit SDHCI bus width"
-
-config S5P64X0_SD_CH1_8BIT
-	bool "SDHCI Channel 1 (Slot 1)"
-	depends on MACH_SMDK6450 || MACH_SMDK6440
-	help
-	  Support SDHCI Channel 1 8-bit bus.
-	  If selected, Channel 2 is disabled.
-
-endmenu
-
-endif
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
deleted file mode 100644
index 12bb951..0000000
--- a/arch/arm/mach-s5p64x0/Makefile
+++ /dev/null
@@ -1,36 +0,0 @@
-# arch/arm/mach-s5p64x0/Makefile
-#
-# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
-# 		http://www.samsung.com
-#
-# Licensed under GPLv2
-
-obj-y				:=
-obj-m				:=
-obj-n				:=
-obj-				:=
-
-# Core
-
-obj-y				+= common.o clock.o
-obj-$(CONFIG_CPU_S5P6440)	+= clock-s5p6440.o
-obj-$(CONFIG_CPU_S5P6450)	+= clock-s5p6450.o
-
-obj-$(CONFIG_PM)		+= pm.o irq-pm.o
-
-obj-y				+= dma.o
-
-# machine support
-
-obj-$(CONFIG_MACH_SMDK6440)	+= mach-smdk6440.o
-obj-$(CONFIG_MACH_SMDK6450)	+= mach-smdk6450.o
-
-# device support
-
-obj-y				+= dev-audio.o
-
-obj-y					+= setup-i2c0.o
-obj-$(CONFIG_S5P64X0_SETUP_I2C1)	+= setup-i2c1.o
-obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP)	+= setup-fb-24bpp.o
-obj-$(CONFIG_S5P64X0_SETUP_SPI)		+= setup-spi.o
-obj-$(CONFIG_S5P64X0_SETUP_SDHCI_GPIO)	+= setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5p64x0/Makefile.boot b/arch/arm/mach-s5p64x0/Makefile.boot
deleted file mode 100644
index 79ece40..0000000
--- a/arch/arm/mach-s5p64x0/Makefile.boot
+++ /dev/null
@@ -1,2 +0,0 @@
-   zreladdr-y	+= 0x20008000
-params_phys-y	:= 0x20000100
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
deleted file mode 100644
index ae34a1d..0000000
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ /dev/null
@@ -1,632 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/clock-s5p6440.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P6440 - Clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/device.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <mach/regs-clock.h>
-
-#include <plat/cpu-freq.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-#include <plat/pll.h>
-#include <plat/s5p-clock.h>
-#include <plat/clock-clksrc.h>
-
-#include "clock.h"
-#include "common.h"
-
-static u32 epll_div[][5] = {
-	{ 36000000,	0,	48, 1, 4 },
-	{ 48000000,	0,	32, 1, 3 },
-	{ 60000000,	0,	40, 1, 3 },
-	{ 72000000,	0,	48, 1, 3 },
-	{ 84000000,	0,	28, 1, 2 },
-	{ 96000000,	0,	32, 1, 2 },
-	{ 32768000,	45264,	43, 1, 4 },
-	{ 45158000,	6903,	30, 1, 3 },
-	{ 49152000,	50332,	32, 1, 3 },
-	{ 67738000,	10398,	45, 1, 3 },
-	{ 73728000,	9961,	49, 1, 3 }
-};
-
-static int s5p6440_epll_set_rate(struct clk *clk, unsigned long rate)
-{
-	unsigned int epll_con, epll_con_k;
-	unsigned int i;
-
-	if (clk->rate == rate)	/* Return if nothing changed */
-		return 0;
-
-	epll_con = __raw_readl(S5P64X0_EPLL_CON);
-	epll_con_k = __raw_readl(S5P64X0_EPLL_CON_K);
-
-	epll_con_k &= ~(PLL90XX_KDIV_MASK);
-	epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK);
-
-	for (i = 0; i < ARRAY_SIZE(epll_div); i++) {
-		 if (epll_div[i][0] == rate) {
-			epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT);
-			epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) |
-				    (epll_div[i][3] << PLL90XX_PDIV_SHIFT) |
-				    (epll_div[i][4] << PLL90XX_SDIV_SHIFT);
-			break;
-		}
-	}
-
-	if (i == ARRAY_SIZE(epll_div)) {
-		printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__);
-		return -EINVAL;
-	}
-
-	__raw_writel(epll_con, S5P64X0_EPLL_CON);
-	__raw_writel(epll_con_k, S5P64X0_EPLL_CON_K);
-
-	printk(KERN_WARNING "EPLL Rate changes from %lu to %lu\n",
-			clk->rate, rate);
-
-	clk->rate = rate;
-
-	return 0;
-}
-
-static struct clk_ops s5p6440_epll_ops = {
-	.get_rate = s5p_epll_get_rate,
-	.set_rate = s5p6440_epll_set_rate,
-};
-
-static struct clksrc_clk clk_hclk = {
-	.clk	= {
-		.name		= "clk_hclk",
-		.parent		= &clk_armclk.clk,
-	},
-	.reg_div	= { .reg = S5P64X0_CLK_DIV0, .shift = 8, .size = 4 },
-};
-
-static struct clksrc_clk clk_pclk = {
-	.clk	= {
-		.name		= "clk_pclk",
-		.parent		= &clk_hclk.clk,
-	},
-	.reg_div	= { .reg = S5P64X0_CLK_DIV0, .shift = 12, .size = 4 },
-};
-static struct clksrc_clk clk_hclk_low = {
-	.clk	= {
-		.name		= "clk_hclk_low",
-	},
-	.sources	= &clkset_hclk_low,
-	.reg_src	= { .reg = S5P64X0_SYS_OTHERS, .shift = 6, .size = 1 },
-	.reg_div	= { .reg = S5P64X0_CLK_DIV3, .shift = 8, .size = 4 },
-};
-
-static struct clksrc_clk clk_pclk_low = {
-	.clk	= {
-		.name		= "clk_pclk_low",
-		.parent		= &clk_hclk_low.clk,
-	},
-	.reg_div	= { .reg = S5P64X0_CLK_DIV3, .shift = 12, .size = 4 },
-};
-
-/*
- * The following clocks will be disabled during clock initialization. It is
- * recommended to keep the following clocks disabled until the driver requests
- * for enabling the clock.
- */
-static struct clk init_clocks_off[] = {
-	{
-		.name		= "nand",
-		.parent		= &clk_hclk.clk,
-		.enable		= s5p64x0_mem_ctrl,
-		.ctrlbit	= (1 << 2),
-	}, {
-		.name		= "post",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 5)
-	}, {
-		.name		= "2d",
-		.parent		= &clk_hclk.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 8),
-	}, {
-		.name		= "dma",
-		.devname	= "dma-pl330",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 12),
-	}, {
-		.name		= "hsmmc",
-		.devname	= "s3c-sdhci.0",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 17),
-	}, {
-		.name		= "hsmmc",
-		.devname	= "s3c-sdhci.1",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 18),
-	}, {
-		.name		= "hsmmc",
-		.devname	= "s3c-sdhci.2",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 19),
-	}, {
-		.name		= "otg",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 20)
-	}, {
-		.name		= "irom",
-		.parent		= &clk_hclk.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 25),
-	}, {
-		.name		= "lcd",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk1_ctrl,
-		.ctrlbit	= (1 << 1),
-	}, {
-		.name		= "hclk_fimgvg",
-		.parent		= &clk_hclk.clk,
-		.enable		= s5p64x0_hclk1_ctrl,
-		.ctrlbit	= (1 << 2),
-	}, {
-		.name		= "tsi",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk1_ctrl,
-		.ctrlbit	= (1 << 0),
-	}, {
-		.name		= "watchdog",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 5),
-	}, {
-		.name		= "rtc",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 6),
-	}, {
-		.name		= "timers",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 7),
-	}, {
-		.name		= "pcm",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 8),
-	}, {
-		.name		= "adc",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 12),
-	}, {
-		.name		= "i2c",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 17),
-	}, {
-		.name		= "spi",
-		.devname	= "s5p64x0-spi.0",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 21),
-	}, {
-		.name		= "spi",
-		.devname	= "s5p64x0-spi.1",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 22),
-	}, {
-		.name		= "gps",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 25),
-	}, {
-		.name		= "dsim",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 28),
-	}, {
-		.name		= "etm",
-		.parent		= &clk_pclk.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 29),
-	}, {
-		.name		= "dmc0",
-		.parent		= &clk_pclk.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 30),
-	}, {
-		.name		= "pclk_fimgvg",
-		.parent		= &clk_pclk.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 31),
-	}, {
-		.name		= "mmc_48m",
-		.devname	= "s3c-sdhci.0",
-		.parent		= &clk_48m,
-		.enable		= s5p64x0_sclk_ctrl,
-		.ctrlbit	= (1 << 27),
-	}, {
-		.name		= "mmc_48m",
-		.devname	= "s3c-sdhci.1",
-		.parent		= &clk_48m,
-		.enable		= s5p64x0_sclk_ctrl,
-		.ctrlbit	= (1 << 28),
-	}, {
-		.name		= "mmc_48m",
-		.devname	= "s3c-sdhci.2",
-		.parent		= &clk_48m,
-		.enable		= s5p64x0_sclk_ctrl,
-		.ctrlbit	= (1 << 29),
-	},
-};
-
-/*
- * The following clocks will be enabled during clock initialization.
- */
-static struct clk init_clocks[] = {
-	{
-		.name		= "intc",
-		.parent		= &clk_hclk.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 1),
-	}, {
-		.name		= "mem",
-		.parent		= &clk_hclk.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 21),
-	}, {
-		.name		= "uart",
-		.devname	= "s3c6400-uart.0",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 1),
-	}, {
-		.name		= "uart",
-		.devname	= "s3c6400-uart.1",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 2),
-	}, {
-		.name		= "uart",
-		.devname	= "s3c6400-uart.2",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 3),
-	}, {
-		.name		= "uart",
-		.devname	= "s3c6400-uart.3",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 4),
-	}, {
-		.name		= "gpio",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 18),
-	},
-};
-
-static struct clk clk_iis_cd_v40 = {
-	.name		= "iis_cdclk_v40",
-};
-
-static struct clk clk_pcm_cd = {
-	.name		= "pcm_cdclk",
-};
-
-static struct clk *clkset_group1_list[] = {
-	&clk_mout_epll.clk,
-	&clk_dout_mpll.clk,
-	&clk_fin_epll,
-};
-
-static struct clksrc_sources clkset_group1 = {
-	.sources	= clkset_group1_list,
-	.nr_sources	= ARRAY_SIZE(clkset_group1_list),
-};
-
-static struct clk *clkset_uart_list[] = {
-	&clk_mout_epll.clk,
-	&clk_dout_mpll.clk,
-};
-
-static struct clksrc_sources clkset_uart = {
-	.sources	= clkset_uart_list,
-	.nr_sources	= ARRAY_SIZE(clkset_uart_list),
-};
-
-static struct clk *clkset_audio_list[] = {
-	&clk_mout_epll.clk,
-	&clk_dout_mpll.clk,
-	&clk_fin_epll,
-	&clk_iis_cd_v40,
-	&clk_pcm_cd,
-};
-
-static struct clksrc_sources clkset_audio = {
-	.sources	= clkset_audio_list,
-	.nr_sources	= ARRAY_SIZE(clkset_audio_list),
-};
-
-static struct clksrc_clk clksrcs[] = {
-	{
-		.clk	= {
-			.name		= "sclk_post",
-			.ctrlbit	= (1 << 10),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_group1,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 26, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 12, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_dispcon",
-			.ctrlbit	= (1 << 1),
-			.enable		= s5p64x0_sclk1_ctrl,
-		},
-		.sources = &clkset_group1,
-		.reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 4, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 0, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_fimgvg",
-			.ctrlbit	= (1 << 2),
-			.enable		= s5p64x0_sclk1_ctrl,
-		},
-		.sources = &clkset_group1,
-		.reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 },
-	},
-};
-
-static struct clksrc_clk clk_sclk_mmc0 = {
-	.clk	= {
-		.name		= "sclk_mmc",
-		.devname	= "s3c-sdhci.0",
-		.ctrlbit	= (1 << 24),
-		.enable		= s5p64x0_sclk_ctrl,
-	},
-	.sources = &clkset_group1,
-	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
-	.reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
-};
-
-static struct clksrc_clk clk_sclk_mmc1 = {
-	.clk	= {
-		.name		= "sclk_mmc",
-		.devname	= "s3c-sdhci.1",
-		.ctrlbit	= (1 << 25),
-		.enable		= s5p64x0_sclk_ctrl,
-	},
-	.sources = &clkset_group1,
-	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
-	.reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
-};
-
-static struct clksrc_clk clk_sclk_mmc2 = {
-	.clk	= {
-		.name		= "sclk_mmc",
-		.devname	= "s3c-sdhci.2",
-		.ctrlbit	= (1 << 26),
-		.enable		= s5p64x0_sclk_ctrl,
-	},
-	.sources = &clkset_group1,
-	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
-	.reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
-};
-
-static struct clksrc_clk clk_sclk_uclk = {
-	.clk	= {
-		.name		= "uclk1",
-		.ctrlbit	= (1 << 5),
-		.enable		= s5p64x0_sclk_ctrl,
-	},
-	.sources = &clkset_uart,
-	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
-	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
-};
-
-static struct clk clk_i2s0 = {
-	.name		= "iis",
-	.devname	= "samsung-i2s.0",
-	.parent		= &clk_pclk_low.clk,
-	.enable		= s5p64x0_pclk_ctrl,
-	.ctrlbit	= (1 << 26),
-};
-
-static struct clksrc_clk clk_audio_bus2 = {
-	.clk	= {
-		.name		= "sclk_audio2",
-		.devname	= "samsung-i2s.0",
-		.ctrlbit	= (1 << 11),
-		.enable		= s5p64x0_sclk_ctrl,
-	},
-	.sources = &clkset_audio,
-	.reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
-	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
-};
-
-static struct clksrc_clk clk_sclk_spi0 = {
-	.clk	= {
-		.name		= "sclk_spi",
-		.devname	= "s5p64x0-spi.0",
-		.ctrlbit	= (1 << 20),
-		.enable		= s5p64x0_sclk_ctrl,
-	},
-	.sources = &clkset_group1,
-	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
-	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
-};
-
-static struct clksrc_clk clk_sclk_spi1 = {
-	.clk	= {
-		.name		= "sclk_spi",
-		.devname	= "s5p64x0-spi.1",
-		.ctrlbit	= (1 << 21),
-		.enable		= s5p64x0_sclk_ctrl,
-	},
-	.sources = &clkset_group1,
-	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
-	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
-};
-
-/* Clock initialization code */
-static struct clksrc_clk *sysclks[] = {
-	&clk_mout_apll,
-	&clk_mout_epll,
-	&clk_mout_mpll,
-	&clk_dout_mpll,
-	&clk_armclk,
-	&clk_hclk,
-	&clk_pclk,
-	&clk_hclk_low,
-	&clk_pclk_low,
-};
-
-static struct clk dummy_apb_pclk = {
-	.name		= "apb_pclk",
-	.id		= -1,
-};
-
-static struct clk *clk_cdev[] = {
-	&clk_i2s0,
-};
-
-static struct clksrc_clk *clksrc_cdev[] = {
-	&clk_sclk_uclk,
-	&clk_sclk_spi0,
-	&clk_sclk_spi1,
-	&clk_sclk_mmc0,
-	&clk_sclk_mmc1,
-	&clk_sclk_mmc2,
-	&clk_audio_bus2,
-};
-
-static struct clk_lookup s5p6440_clk_lookup[] = {
-	CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk),
-	CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk),
-	CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
-	CLKDEV_INIT("s5p64x0-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
-	CLKDEV_INIT("s5p64x0-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
-	CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
-	CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
-	CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
-	CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
-	CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus2.clk),
-};
-
-void __init_or_cpufreq s5p6440_setup_clocks(void)
-{
-	struct clk *xtal_clk;
-
-	unsigned long xtal;
-	unsigned long fclk;
-	unsigned long hclk;
-	unsigned long hclk_low;
-	unsigned long pclk;
-	unsigned long pclk_low;
-
-	unsigned long apll;
-	unsigned long mpll;
-	unsigned long epll;
-	unsigned int ptr;
-
-	/* Set S5P6440 functions for clk_fout_epll */
-
-	clk_fout_epll.enable = s5p_epll_enable;
-	clk_fout_epll.ops = &s5p6440_epll_ops;
-
-	clk_48m.enable = s5p64x0_clk48m_ctrl;
-
-	xtal_clk = clk_get(NULL, "ext_xtal");
-	BUG_ON(IS_ERR(xtal_clk));
-
-	xtal = clk_get_rate(xtal_clk);
-	clk_put(xtal_clk);
-
-	apll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_APLL_CON), pll_4502);
-	mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_MPLL_CON), pll_4502);
-	epll = s5p_get_pll90xx(xtal, __raw_readl(S5P64X0_EPLL_CON),
-				__raw_readl(S5P64X0_EPLL_CON_K));
-
-	clk_fout_apll.rate = apll;
-	clk_fout_mpll.rate = mpll;
-	clk_fout_epll.rate = epll;
-
-	printk(KERN_INFO "S5P6440: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \
-			" E=%ld.%ldMHz\n",
-			print_mhz(apll), print_mhz(mpll), print_mhz(epll));
-
-	fclk = clk_get_rate(&clk_armclk.clk);
-	hclk = clk_get_rate(&clk_hclk.clk);
-	pclk = clk_get_rate(&clk_pclk.clk);
-	hclk_low = clk_get_rate(&clk_hclk_low.clk);
-	pclk_low = clk_get_rate(&clk_pclk_low.clk);
-
-	printk(KERN_INFO "S5P6440: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \
-			" PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n",
-			print_mhz(hclk), print_mhz(hclk_low),
-			print_mhz(pclk), print_mhz(pclk_low));
-
-	clk_f.rate = fclk;
-	clk_h.rate = hclk;
-	clk_p.rate = pclk;
-
-	for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
-		s3c_set_clksrc(&clksrcs[ptr], true);
-}
-
-static struct clk *clks[] __initdata = {
-	&clk_ext,
-	&clk_iis_cd_v40,
-	&clk_pcm_cd,
-};
-
-void __init s5p6440_register_clocks(void)
-{
-	int ptr;
-	unsigned int cnt;
-
-	s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
-
-	for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
-		s3c_register_clksrc(sysclks[ptr], 1);
-
-	s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
-	for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
-		s3c_disable_clocks(clk_cdev[cnt], 1);
-
-	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
-	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
-	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
-		s3c_register_clksrc(clksrc_cdev[ptr], 1);
-
-	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-	s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-	clkdev_add_table(s5p6440_clk_lookup, ARRAY_SIZE(s5p6440_clk_lookup));
-
-	s3c24xx_register_clock(&dummy_apb_pclk);
-}
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
deleted file mode 100644
index 0b3ca2e..0000000
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ /dev/null
@@ -1,701 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/clock-s5p6450.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P6450 - Clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/device.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <mach/regs-clock.h>
-
-#include <plat/cpu-freq.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-#include <plat/pll.h>
-#include <plat/s5p-clock.h>
-#include <plat/clock-clksrc.h>
-
-#include "clock.h"
-#include "common.h"
-
-static struct clksrc_clk clk_mout_dpll = {
-	.clk	= {
-		.name		= "mout_dpll",
-	},
-	.sources	= &clk_src_dpll,
-	.reg_src	= { .reg = S5P64X0_CLK_SRC0, .shift = 5, .size = 1 },
-};
-
-static u32 epll_div[][5] = {
-	{ 133000000,	27307,	55, 2, 2 },
-	{ 100000000,	43691,	41, 2, 2 },
-	{ 480000000,	0,	80, 2, 0 },
-};
-
-static int s5p6450_epll_set_rate(struct clk *clk, unsigned long rate)
-{
-	unsigned int epll_con, epll_con_k;
-	unsigned int i;
-
-	if (clk->rate == rate)	/* Return if nothing changed */
-		return 0;
-
-	epll_con = __raw_readl(S5P64X0_EPLL_CON);
-	epll_con_k = __raw_readl(S5P64X0_EPLL_CON_K);
-
-	epll_con_k &= ~(PLL90XX_KDIV_MASK);
-	epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK);
-
-	for (i = 0; i < ARRAY_SIZE(epll_div); i++) {
-		 if (epll_div[i][0] == rate) {
-			epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT);
-			epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) |
-				    (epll_div[i][3] << PLL90XX_PDIV_SHIFT) |
-				    (epll_div[i][4] << PLL90XX_SDIV_SHIFT);
-			break;
-		}
-	}
-
-	if (i == ARRAY_SIZE(epll_div)) {
-		printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__);
-		return -EINVAL;
-	}
-
-	__raw_writel(epll_con, S5P64X0_EPLL_CON);
-	__raw_writel(epll_con_k, S5P64X0_EPLL_CON_K);
-
-	printk(KERN_WARNING "EPLL Rate changes from %lu to %lu\n",
-			clk->rate, rate);
-
-	clk->rate = rate;
-
-	return 0;
-}
-
-static struct clk_ops s5p6450_epll_ops = {
-	.get_rate = s5p_epll_get_rate,
-	.set_rate = s5p6450_epll_set_rate,
-};
-
-static struct clksrc_clk clk_dout_epll = {
-	.clk	= {
-		.name		= "dout_epll",
-		.parent		= &clk_mout_epll.clk,
-	},
-	.reg_div	= { .reg = S5P64X0_CLK_DIV1, .shift = 24, .size = 4 },
-};
-
-static struct clksrc_clk clk_mout_hclk_sel = {
-	.clk	= {
-		.name		= "mout_hclk_sel",
-	},
-	.sources	= &clkset_hclk_low,
-	.reg_src	= { .reg = S5P64X0_OTHERS, .shift = 15, .size = 1 },
-};
-
-static struct clk *clkset_hclk_list[] = {
-	&clk_mout_hclk_sel.clk,
-	&clk_armclk.clk,
-};
-
-static struct clksrc_sources clkset_hclk = {
-	.sources	= clkset_hclk_list,
-	.nr_sources	= ARRAY_SIZE(clkset_hclk_list),
-};
-
-static struct clksrc_clk clk_hclk = {
-	.clk	= {
-		.name		= "clk_hclk",
-	},
-	.sources	= &clkset_hclk,
-	.reg_src	= { .reg = S5P64X0_OTHERS, .shift = 14, .size = 1 },
-	.reg_div	= { .reg = S5P64X0_CLK_DIV0, .shift = 8, .size = 4 },
-};
-
-static struct clksrc_clk clk_pclk = {
-	.clk	= {
-		.name		= "clk_pclk",
-		.parent		= &clk_hclk.clk,
-	},
-	.reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 12, .size = 4 },
-};
-static struct clksrc_clk clk_dout_pwm_ratio0 = {
-	.clk	= {
-		.name		= "clk_dout_pwm_ratio0",
-		.parent		= &clk_mout_hclk_sel.clk,
-	},
-	.reg_div	= { .reg = S5P64X0_CLK_DIV3, .shift = 16, .size = 4 },
-};
-
-static struct clksrc_clk clk_pclk_to_wdt_pwm = {
-	.clk	= {
-		.name		= "clk_pclk_to_wdt_pwm",
-		.parent		= &clk_dout_pwm_ratio0.clk,
-	},
-	.reg_div	= { .reg = S5P64X0_CLK_DIV3, .shift = 20, .size = 4 },
-};
-
-static struct clksrc_clk clk_hclk_low = {
-	.clk	= {
-		.name		= "clk_hclk_low",
-	},
-	.sources	= &clkset_hclk_low,
-	.reg_src	= { .reg = S5P64X0_OTHERS, .shift = 6, .size = 1 },
-	.reg_div	= { .reg = S5P64X0_CLK_DIV3, .shift = 8, .size = 4 },
-};
-
-static struct clksrc_clk clk_pclk_low = {
-	.clk	= {
-		.name		= "clk_pclk_low",
-		.parent		= &clk_hclk_low.clk,
-	},
-	.reg_div	= { .reg = S5P64X0_CLK_DIV3, .shift = 12, .size = 4 },
-};
-
-/*
- * The following clocks will be disabled during clock initialization. It is
- * recommended to keep the following clocks disabled until the driver requests
- * for enabling the clock.
- */
-static struct clk init_clocks_off[] = {
-	{
-		.name		= "usbhost",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 3),
-	}, {
-		.name		= "dma",
-		.devname	= "dma-pl330",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 12),
-	}, {
-		.name		= "hsmmc",
-		.devname	= "s3c-sdhci.0",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 17),
-	}, {
-		.name		= "hsmmc",
-		.devname	= "s3c-sdhci.1",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 18),
-	}, {
-		.name		= "hsmmc",
-		.devname	= "s3c-sdhci.2",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 19),
-	}, {
-		.name		= "usbotg",
-		.parent		= &clk_hclk_low.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 20),
-	}, {
-		.name		= "lcd",
-		.parent		= &clk_h,
-		.enable		= s5p64x0_hclk1_ctrl,
-		.ctrlbit	= (1 << 1),
-	}, {
-		.name		= "watchdog",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 5),
-	}, {
-		.name		= "rtc",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 6),
-	}, {
-		.name		= "adc",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 12),
-	}, {
-		.name		= "i2c",
-		.devname	= "s3c2440-i2c.0",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 17),
-	}, {
-		.name		= "spi",
-		.devname	= "s5p64x0-spi.0",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 21),
-	}, {
-		.name		= "spi",
-		.devname	= "s5p64x0-spi.1",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 22),
-	}, {
-		.name		= "i2c",
-		.devname	= "s3c2440-i2c.1",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 27),
-	}, {
-		.name		= "dmc0",
-		.parent		= &clk_pclk.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 30),
-	}
-};
-
-/*
- * The following clocks will be enabled during clock initialization.
- */
-static struct clk init_clocks[] = {
-	{
-		.name		= "intc",
-		.parent		= &clk_hclk.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 1),
-	}, {
-		.name		= "mem",
-		.parent		= &clk_hclk.clk,
-		.enable		= s5p64x0_hclk0_ctrl,
-		.ctrlbit	= (1 << 21),
-	}, {
-		.name		= "uart",
-		.devname	= "s3c6400-uart.0",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 1),
-	}, {
-		.name		= "uart",
-		.devname	= "s3c6400-uart.1",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 2),
-	}, {
-		.name		= "uart",
-		.devname	= "s3c6400-uart.2",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 3),
-	}, {
-		.name		= "uart",
-		.devname	= "s3c6400-uart.3",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 4),
-	}, {
-		.name		= "timers",
-		.parent		= &clk_pclk_to_wdt_pwm.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 7),
-	}, {
-		.name		= "gpio",
-		.parent		= &clk_pclk_low.clk,
-		.enable		= s5p64x0_pclk_ctrl,
-		.ctrlbit	= (1 << 18),
-	},
-};
-
-static struct clk *clkset_uart_list[] = {
-	&clk_dout_epll.clk,
-	&clk_dout_mpll.clk,
-};
-
-static struct clksrc_sources clkset_uart = {
-	.sources	= clkset_uart_list,
-	.nr_sources	= ARRAY_SIZE(clkset_uart_list),
-};
-
-static struct clk *clkset_mali_list[] = {
-	&clk_mout_epll.clk,
-	&clk_mout_apll.clk,
-	&clk_mout_mpll.clk,
-};
-
-static struct clksrc_sources clkset_mali = {
-	.sources	= clkset_mali_list,
-	.nr_sources	= ARRAY_SIZE(clkset_mali_list),
-};
-
-static struct clk *clkset_group2_list[] = {
-	&clk_dout_epll.clk,
-	&clk_dout_mpll.clk,
-	&clk_ext_xtal_mux,
-};
-
-static struct clksrc_sources clkset_group2 = {
-	.sources	= clkset_group2_list,
-	.nr_sources	= ARRAY_SIZE(clkset_group2_list),
-};
-
-static struct clk *clkset_dispcon_list[] = {
-	&clk_dout_epll.clk,
-	&clk_dout_mpll.clk,
-	&clk_ext_xtal_mux,
-	&clk_mout_dpll.clk,
-};
-
-static struct clksrc_sources clkset_dispcon = {
-	.sources	= clkset_dispcon_list,
-	.nr_sources	= ARRAY_SIZE(clkset_dispcon_list),
-};
-
-static struct clk *clkset_hsmmc44_list[] = {
-	&clk_dout_epll.clk,
-	&clk_dout_mpll.clk,
-	&clk_ext_xtal_mux,
-	&s5p_clk_27m,
-	&clk_48m,
-};
-
-static struct clksrc_sources clkset_hsmmc44 = {
-	.sources	= clkset_hsmmc44_list,
-	.nr_sources	= ARRAY_SIZE(clkset_hsmmc44_list),
-};
-
-static struct clk *clkset_sclk_audio0_list[] = {
-	[0] = &clk_dout_epll.clk,
-	[1] = &clk_dout_mpll.clk,
-	[2] = &clk_ext_xtal_mux,
-	[3] = NULL,
-	[4] = NULL,
-};
-
-static struct clksrc_sources clkset_sclk_audio0 = {
-	.sources	= clkset_sclk_audio0_list,
-	.nr_sources	= ARRAY_SIZE(clkset_sclk_audio0_list),
-};
-
-static struct clksrc_clk clk_sclk_audio0 = {
-	.clk		= {
-		.name		= "audio-bus",
-		.devname	= "samsung-i2s.0",
-		.enable		= s5p64x0_sclk_ctrl,
-		.ctrlbit	= (1 << 8),
-		.parent		= &clk_dout_epll.clk,
-	},
-	.sources	= &clkset_sclk_audio0,
-	.reg_src	= { .reg = S5P64X0_CLK_SRC1, .shift = 10, .size = 3 },
-	.reg_div	= { .reg = S5P64X0_CLK_DIV2, .shift = 8, .size = 4 },
-};
-
-static struct clksrc_clk clksrcs[] = {
-	{
-		.clk	= {
-			.name		= "sclk_fimc",
-			.ctrlbit	= (1 << 10),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_group2,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 26, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 12, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "aclk_mali",
-			.ctrlbit	= (1 << 2),
-			.enable		= s5p64x0_sclk1_ctrl,
-		},
-		.sources = &clkset_mali,
-		.reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_2d",
-			.ctrlbit	= (1 << 12),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_mali,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 30, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 20, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_usi",
-			.ctrlbit	= (1 << 7),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_group2,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 10, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 16, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_camif",
-			.ctrlbit	= (1 << 6),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_group2,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 28, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 20, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_dispcon",
-			.ctrlbit	= (1 << 1),
-			.enable		= s5p64x0_sclk1_ctrl,
-		},
-		.sources = &clkset_dispcon,
-		.reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 4, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 0, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_hsmmc44",
-			.ctrlbit	= (1 << 30),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_hsmmc44,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 6, .size = 3 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 28, .size = 4 },
-	},
-};
-
-static struct clksrc_clk clk_sclk_mmc0 = {
-	.clk	= {
-		.name		= "sclk_mmc",
-		.devname	= "s3c-sdhci.0",
-		.ctrlbit	= (1 << 24),
-		.enable		= s5p64x0_sclk_ctrl,
-	},
-	.sources = &clkset_group2,
-	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
-	.reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
-};
-
-static struct clksrc_clk clk_sclk_mmc1 = {
-	.clk	= {
-		.name		= "sclk_mmc",
-		.devname	= "s3c-sdhci.1",
-		.ctrlbit	= (1 << 25),
-		.enable		= s5p64x0_sclk_ctrl,
-	},
-	.sources = &clkset_group2,
-	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
-	.reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
-};
-
-static struct clksrc_clk clk_sclk_mmc2 = {
-	.clk	= {
-		.name		= "sclk_mmc",
-		.devname	= "s3c-sdhci.2",
-		.ctrlbit	= (1 << 26),
-		.enable		= s5p64x0_sclk_ctrl,
-	},
-	.sources = &clkset_group2,
-	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
-	.reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
-};
-
-static struct clksrc_clk clk_sclk_uclk = {
-	.clk	= {
-		.name		= "uclk1",
-		.ctrlbit	= (1 << 5),
-		.enable		= s5p64x0_sclk_ctrl,
-	},
-	.sources = &clkset_uart,
-	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
-	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
-};
-
-static struct clksrc_clk clk_sclk_spi0 = {
-	.clk	= {
-		.name		= "sclk_spi",
-		.devname	= "s5p64x0-spi.0",
-		.ctrlbit	= (1 << 20),
-		.enable		= s5p64x0_sclk_ctrl,
-	},
-	.sources = &clkset_group2,
-	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
-	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
-};
-
-static struct clksrc_clk clk_sclk_spi1 = {
-	.clk	= {
-		.name		= "sclk_spi",
-		.devname	= "s5p64x0-spi.1",
-		.ctrlbit	= (1 << 21),
-		.enable		= s5p64x0_sclk_ctrl,
-	},
-	.sources = &clkset_group2,
-	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
-	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
-};
-
-static struct clk clk_i2s0 = {
-	.name		= "iis",
-	.devname	= "samsung-i2s.0",
-	.parent		= &clk_pclk_low.clk,
-	.enable		= s5p64x0_pclk_ctrl,
-	.ctrlbit	= (1 << 26),
-};
-
-static struct clk clk_i2s1 = {
-	.name		= "iis",
-	.devname	= "samsung-i2s.1",
-	.parent		= &clk_pclk_low.clk,
-	.enable		= s5p64x0_pclk_ctrl,
-	.ctrlbit	= (1 << 15),
-};
-
-static struct clk clk_i2s2 = {
-	.name		= "iis",
-	.devname	= "samsung-i2s.2",
-	.parent		= &clk_pclk_low.clk,
-	.enable		= s5p64x0_pclk_ctrl,
-	.ctrlbit	= (1 << 16),
-};
-
-static struct clk *clk_cdev[] = {
-	&clk_i2s0,
-	&clk_i2s1,
-	&clk_i2s2,
-};
-
-static struct clksrc_clk *clksrc_cdev[] = {
-	&clk_sclk_uclk,
-	&clk_sclk_spi0,
-	&clk_sclk_spi1,
-	&clk_sclk_mmc0,
-	&clk_sclk_mmc1,
-	&clk_sclk_mmc2,
-	&clk_sclk_audio0,
-};
-
-static struct clk_lookup s5p6450_clk_lookup[] = {
-	CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_pclk_low.clk),
-	CLKDEV_INIT(NULL, "clk_uart_baud3", &clk_sclk_uclk.clk),
-	CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
-	CLKDEV_INIT("s5p64x0-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
-	CLKDEV_INIT("s5p64x0-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
-	CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
-	CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
-	CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
-	CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
-	CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_sclk_audio0.clk),
-	CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1),
-	CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2),
-};
-
-/* Clock initialization code */
-static struct clksrc_clk *sysclks[] = {
-	&clk_mout_apll,
-	&clk_mout_epll,
-	&clk_dout_epll,
-	&clk_mout_mpll,
-	&clk_dout_mpll,
-	&clk_armclk,
-	&clk_mout_hclk_sel,
-	&clk_dout_pwm_ratio0,
-	&clk_pclk_to_wdt_pwm,
-	&clk_hclk,
-	&clk_pclk,
-	&clk_hclk_low,
-	&clk_pclk_low,
-};
-
-static struct clk dummy_apb_pclk = {
-	.name		= "apb_pclk",
-	.id		= -1,
-};
-
-void __init_or_cpufreq s5p6450_setup_clocks(void)
-{
-	struct clk *xtal_clk;
-
-	unsigned long xtal;
-	unsigned long fclk;
-	unsigned long hclk;
-	unsigned long hclk_low;
-	unsigned long pclk;
-	unsigned long pclk_low;
-
-	unsigned long apll;
-	unsigned long mpll;
-	unsigned long epll;
-	unsigned long dpll;
-	unsigned int ptr;
-
-	/* Set S5P6450 functions for clk_fout_epll */
-
-	clk_fout_epll.enable = s5p_epll_enable;
-	clk_fout_epll.ops = &s5p6450_epll_ops;
-
-	clk_48m.enable = s5p64x0_clk48m_ctrl;
-
-	xtal_clk = clk_get(NULL, "ext_xtal");
-	BUG_ON(IS_ERR(xtal_clk));
-
-	xtal = clk_get_rate(xtal_clk);
-	clk_put(xtal_clk);
-
-	apll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_APLL_CON), pll_4502);
-	mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_MPLL_CON), pll_4502);
-	epll = s5p_get_pll90xx(xtal, __raw_readl(S5P64X0_EPLL_CON),
-				__raw_readl(S5P64X0_EPLL_CON_K));
-	dpll = s5p_get_pll46xx(xtal, __raw_readl(S5P6450_DPLL_CON),
-				__raw_readl(S5P6450_DPLL_CON_K), pll_4650c);
-
-	clk_fout_apll.rate = apll;
-	clk_fout_mpll.rate = mpll;
-	clk_fout_epll.rate = epll;
-	clk_fout_dpll.rate = dpll;
-
-	printk(KERN_INFO "S5P6450: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \
-			" E=%ld.%ldMHz, D=%ld.%ldMHz\n",
-			print_mhz(apll), print_mhz(mpll), print_mhz(epll),
-			print_mhz(dpll));
-
-	fclk = clk_get_rate(&clk_armclk.clk);
-	hclk = clk_get_rate(&clk_hclk.clk);
-	pclk = clk_get_rate(&clk_pclk.clk);
-	hclk_low = clk_get_rate(&clk_hclk_low.clk);
-	pclk_low = clk_get_rate(&clk_pclk_low.clk);
-
-	printk(KERN_INFO "S5P6450: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \
-			" PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n",
-			print_mhz(hclk), print_mhz(hclk_low),
-			print_mhz(pclk), print_mhz(pclk_low));
-
-	clk_f.rate = fclk;
-	clk_h.rate = hclk;
-	clk_p.rate = pclk;
-
-	for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
-		s3c_set_clksrc(&clksrcs[ptr], true);
-}
-
-void __init s5p6450_register_clocks(void)
-{
-	int ptr;
-	unsigned int cnt;
-
-	for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
-		s3c_register_clksrc(sysclks[ptr], 1);
-
-
-	s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
-	for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
-		s3c_disable_clocks(clk_cdev[cnt], 1);
-
-	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
-	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
-	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
-		s3c_register_clksrc(clksrc_cdev[ptr], 1);
-
-	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-	s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
-	clkdev_add_table(s5p6450_clk_lookup, ARRAY_SIZE(s5p6450_clk_lookup));
-
-	s3c24xx_register_clock(&dummy_apb_pclk);
-}
diff --git a/arch/arm/mach-s5p64x0/clock.c b/arch/arm/mach-s5p64x0/clock.c
deleted file mode 100644
index 57e7189..0000000
--- a/arch/arm/mach-s5p64x0/clock.c
+++ /dev/null
@@ -1,236 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/clock.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P64X0 - Clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/device.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <mach/regs-clock.h>
-
-#include <plat/cpu-freq.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-#include <plat/pll.h>
-#include <plat/s5p-clock.h>
-#include <plat/clock-clksrc.h>
-
-#include "common.h"
-
-struct clksrc_clk clk_mout_apll = {
-	.clk	= {
-		.name		= "mout_apll",
-		.id		= -1,
-	},
-	.sources	= &clk_src_apll,
-	.reg_src	= { .reg = S5P64X0_CLK_SRC0, .shift = 0, .size = 1 },
-};
-
-struct clksrc_clk clk_mout_mpll = {
-	.clk	= {
-		.name		= "mout_mpll",
-		.id		= -1,
-	},
-	.sources	= &clk_src_mpll,
-	.reg_src	= { .reg = S5P64X0_CLK_SRC0, .shift = 1, .size = 1 },
-};
-
-struct clksrc_clk clk_mout_epll = {
-	.clk	= {
-		.name		= "mout_epll",
-		.id		= -1,
-	},
-	.sources	= &clk_src_epll,
-	.reg_src	= { .reg = S5P64X0_CLK_SRC0, .shift = 2, .size = 1 },
-};
-
-enum perf_level {
-	L0 = 532*1000,
-	L1 = 266*1000,
-	L2 = 133*1000,
-};
-
-static const u32 clock_table[][3] = {
-	/*{ARM_CLK, DIVarm, DIVhclk}*/
-	{L0 * 1000, (0 << ARM_DIV_RATIO_SHIFT), (3 << S5P64X0_CLKDIV0_HCLK_SHIFT)},
-	{L1 * 1000, (1 << ARM_DIV_RATIO_SHIFT), (1 << S5P64X0_CLKDIV0_HCLK_SHIFT)},
-	{L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P64X0_CLKDIV0_HCLK_SHIFT)},
-};
-
-static unsigned long s5p64x0_armclk_get_rate(struct clk *clk)
-{
-	unsigned long rate = clk_get_rate(clk->parent);
-	u32 clkdiv;
-
-	/* divisor mask starts at bit0, so no need to shift */
-	clkdiv = __raw_readl(ARM_CLK_DIV) & ARM_DIV_MASK;
-
-	return rate / (clkdiv + 1);
-}
-
-static unsigned long s5p64x0_armclk_round_rate(struct clk *clk,
-					       unsigned long rate)
-{
-	u32 iter;
-
-	for (iter = 1 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
-		if (rate > clock_table[iter][0])
-			return clock_table[iter-1][0];
-	}
-
-	return clock_table[ARRAY_SIZE(clock_table) - 1][0];
-}
-
-static int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate)
-{
-	u32 round_tmp;
-	u32 iter;
-	u32 clk_div0_tmp;
-	u32 cur_rate = clk->ops->get_rate(clk);
-	unsigned long flags;
-
-	round_tmp = clk->ops->round_rate(clk, rate);
-	if (round_tmp == cur_rate)
-		return 0;
-
-
-	for (iter = 0 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
-		if (round_tmp == clock_table[iter][0])
-			break;
-	}
-
-	if (iter >= ARRAY_SIZE(clock_table))
-		iter = ARRAY_SIZE(clock_table) - 1;
-
-	local_irq_save(flags);
-	if (cur_rate > round_tmp) {
-		/* Frequency Down */
-		clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
-		clk_div0_tmp |= clock_table[iter][1];
-		__raw_writel(clk_div0_tmp, ARM_CLK_DIV);
-
-		clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
-				~(S5P64X0_CLKDIV0_HCLK_MASK);
-		clk_div0_tmp |= clock_table[iter][2];
-		__raw_writel(clk_div0_tmp, ARM_CLK_DIV);
-
-
-	} else {
-		/* Frequency Up */
-		clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
-				~(S5P64X0_CLKDIV0_HCLK_MASK);
-		clk_div0_tmp |= clock_table[iter][2];
-		__raw_writel(clk_div0_tmp, ARM_CLK_DIV);
-
-		clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
-		clk_div0_tmp |= clock_table[iter][1];
-		__raw_writel(clk_div0_tmp, ARM_CLK_DIV);
-	}
-	local_irq_restore(flags);
-
-	clk->rate = clock_table[iter][0];
-
-	return 0;
-}
-
-static struct clk_ops s5p64x0_clkarm_ops = {
-	.get_rate	= s5p64x0_armclk_get_rate,
-	.set_rate	= s5p64x0_armclk_set_rate,
-	.round_rate	= s5p64x0_armclk_round_rate,
-};
-
-struct clksrc_clk clk_armclk = {
-	.clk	= {
-		.name		= "armclk",
-		.id		= 1,
-		.parent		= &clk_mout_apll.clk,
-		.ops		= &s5p64x0_clkarm_ops,
-	},
-	.reg_div	= { .reg = S5P64X0_CLK_DIV0, .shift = 0, .size = 4 },
-};
-
-struct clksrc_clk clk_dout_mpll = {
-	.clk	= {
-		.name		= "dout_mpll",
-		.id		= -1,
-		.parent		= &clk_mout_mpll.clk,
-	},
-	.reg_div	= { .reg = S5P64X0_CLK_DIV0, .shift = 4, .size = 1 },
-};
-
-static struct clk *clkset_hclk_low_list[] = {
-	&clk_mout_apll.clk,
-	&clk_mout_mpll.clk,
-};
-
-struct clksrc_sources clkset_hclk_low = {
-	.sources	= clkset_hclk_low_list,
-	.nr_sources	= ARRAY_SIZE(clkset_hclk_low_list),
-};
-
-int s5p64x0_pclk_ctrl(struct clk *clk, int enable)
-{
-	return s5p_gatectrl(S5P64X0_CLK_GATE_PCLK, clk, enable);
-}
-
-int s5p64x0_hclk0_ctrl(struct clk *clk, int enable)
-{
-	return s5p_gatectrl(S5P64X0_CLK_GATE_HCLK0, clk, enable);
-}
-
-int s5p64x0_hclk1_ctrl(struct clk *clk, int enable)
-{
-	return s5p_gatectrl(S5P64X0_CLK_GATE_HCLK1, clk, enable);
-}
-
-int s5p64x0_sclk_ctrl(struct clk *clk, int enable)
-{
-	return s5p_gatectrl(S5P64X0_CLK_GATE_SCLK0, clk, enable);
-}
-
-int s5p64x0_sclk1_ctrl(struct clk *clk, int enable)
-{
-	return s5p_gatectrl(S5P64X0_CLK_GATE_SCLK1, clk, enable);
-}
-
-int s5p64x0_mem_ctrl(struct clk *clk, int enable)
-{
-	return s5p_gatectrl(S5P64X0_CLK_GATE_MEM0, clk, enable);
-}
-
-int s5p64x0_clk48m_ctrl(struct clk *clk, int enable)
-{
-	unsigned long flags;
-	u32 val;
-
-	/* can't rely on clock lock, this register has other usages */
-	local_irq_save(flags);
-
-	val = __raw_readl(S5P64X0_OTHERS);
-	if (enable)
-		val |= S5P64X0_OTHERS_USB_SIG_MASK;
-	else
-		val &= ~S5P64X0_OTHERS_USB_SIG_MASK;
-
-	__raw_writel(val, S5P64X0_OTHERS);
-
-	local_irq_restore(flags);
-
-	return 0;
-}
diff --git a/arch/arm/mach-s5p64x0/clock.h b/arch/arm/mach-s5p64x0/clock.h
deleted file mode 100644
index 28b8e3c..0000000
--- a/arch/arm/mach-s5p64x0/clock.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * Header file for s5p64x0 clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __MACH_S5P64X0_CLOCK_H
-#define __MACH_S5P64X0_CLOCK_H __FILE__
-
-#include <linux/clk.h>
-
-extern struct clksrc_clk clk_mout_apll;
-extern struct clksrc_clk clk_mout_mpll;
-extern struct clksrc_clk clk_mout_epll;
-
-extern int s5p64x0_epll_enable(struct clk *clk, int enable);
-extern unsigned long s5p64x0_epll_get_rate(struct clk *clk);
-
-extern struct clksrc_clk clk_armclk;
-extern struct clksrc_clk clk_dout_mpll;
-
-extern struct clksrc_sources clkset_hclk_low;
-
-extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable);
-extern int s5p64x0_hclk0_ctrl(struct clk *clk, int enable);
-extern int s5p64x0_hclk1_ctrl(struct clk *clk, int enable);
-extern int s5p64x0_sclk_ctrl(struct clk *clk, int enable);
-extern int s5p64x0_sclk1_ctrl(struct clk *clk, int enable);
-extern int s5p64x0_mem_ctrl(struct clk *clk, int enable);
-
-extern int s5p64x0_clk48m_ctrl(struct clk *clk, int enable);
-
-#endif /* __MACH_S5P64X0_CLOCK_H */
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
deleted file mode 100644
index 9a43be0..0000000
--- a/arch/arm/mach-s5p64x0/common.c
+++ /dev/null
@@ -1,490 +0,0 @@
-/*
- * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * Common Codes for S5P64X0 machines
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/device.h>
-#include <linux/serial_core.h>
-#include <linux/serial_s3c.h>
-#include <clocksource/samsung_pwm.h>
-#include <linux/platform_device.h>
-#include <linux/sched.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-#include <linux/irq.h>
-#include <linux/reboot.h>
-
-#include <asm/irq.h>
-#include <asm/proc-fns.h>
-#include <asm/system_misc.h>
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <mach/map.h>
-#include <mach/hardware.h>
-#include <mach/regs-clock.h>
-#include <mach/regs-gpio.h>
-
-#include <plat/cpu.h>
-#include <plat/clock.h>
-#include <plat/devs.h>
-#include <plat/pm.h>
-#include <plat/sdhci.h>
-#include <plat/adc-core.h>
-#include <plat/fb-core.h>
-#include <plat/spi-core.h>
-#include <plat/gpio-cfg.h>
-#include <plat/pwm-core.h>
-#include <plat/regs-irqtype.h>
-#include <plat/watchdog-reset.h>
-
-#include "common.h"
-
-static const char name_s5p6440[] = "S5P6440";
-static const char name_s5p6450[] = "S5P6450";
-
-static struct cpu_table cpu_ids[] __initdata = {
-	{
-		.idcode		= S5P6440_CPU_ID,
-		.idmask		= S5P64XX_CPU_MASK,
-		.map_io		= s5p6440_map_io,
-		.init_clocks	= s5p6440_init_clocks,
-		.init_uarts	= s5p6440_init_uarts,
-		.init		= s5p64x0_init,
-		.name		= name_s5p6440,
-	}, {
-		.idcode		= S5P6450_CPU_ID,
-		.idmask		= S5P64XX_CPU_MASK,
-		.map_io		= s5p6450_map_io,
-		.init_clocks	= s5p6450_init_clocks,
-		.init_uarts	= s5p6450_init_uarts,
-		.init		= s5p64x0_init,
-		.name		= name_s5p6450,
-	},
-};
-
-/* Initial IO mappings */
-
-static struct map_desc s5p64x0_iodesc[] __initdata = {
-	{
-		.virtual	= (unsigned long)S5P_VA_CHIPID,
-		.pfn		= __phys_to_pfn(S5P64X0_PA_CHIPID),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S3C_VA_SYS,
-		.pfn		= __phys_to_pfn(S5P64X0_PA_SYSCON),
-		.length		= SZ_64K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S3C_VA_TIMER,
-		.pfn		= __phys_to_pfn(S5P64X0_PA_TIMER),
-		.length		= SZ_16K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S3C_VA_WATCHDOG,
-		.pfn		= __phys_to_pfn(S5P64X0_PA_WDT),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S5P_VA_SROMC,
-		.pfn		= __phys_to_pfn(S5P64X0_PA_SROMC),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S5P_VA_GPIO,
-		.pfn		= __phys_to_pfn(S5P64X0_PA_GPIO),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)VA_VIC0,
-		.pfn		= __phys_to_pfn(S5P64X0_PA_VIC0),
-		.length		= SZ_16K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)VA_VIC1,
-		.pfn		= __phys_to_pfn(S5P64X0_PA_VIC1),
-		.length		= SZ_16K,
-		.type		= MT_DEVICE,
-	},
-};
-
-static struct map_desc s5p6440_iodesc[] __initdata = {
-	{
-		.virtual	= (unsigned long)S3C_VA_UART,
-		.pfn		= __phys_to_pfn(S5P6440_PA_UART(0)),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	},
-};
-
-static struct map_desc s5p6450_iodesc[] __initdata = {
-	{
-		.virtual	= (unsigned long)S3C_VA_UART,
-		.pfn		= __phys_to_pfn(S5P6450_PA_UART(0)),
-		.length		= SZ_512K,
-		.type		= MT_DEVICE,
-	}, {
-		.virtual	= (unsigned long)S3C_VA_UART + SZ_512K,
-		.pfn		= __phys_to_pfn(S5P6450_PA_UART(5)),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	},
-};
-
-static void s5p64x0_idle(void)
-{
-	unsigned long val;
-
-	val = __raw_readl(S5P64X0_PWR_CFG);
-	val &= ~(0x3 << 5);
-	val |= (0x1 << 5);
-	__raw_writel(val, S5P64X0_PWR_CFG);
-
-	cpu_do_idle();
-}
-
-static struct samsung_pwm_variant s5p64x0_pwm_variant = {
-	.bits		= 32,
-	.div_base	= 0,
-	.has_tint_cstat	= true,
-	.tclk_mask	= 0,
-};
-
-void __init samsung_set_timer_source(unsigned int event, unsigned int source)
-{
-	s5p64x0_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
-	s5p64x0_pwm_variant.output_mask &= ~(BIT(event) | BIT(source));
-}
-
-void __init samsung_timer_init(void)
-{
-	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
-		IRQ_TIMER0_VIC, IRQ_TIMER1_VIC, IRQ_TIMER2_VIC,
-		IRQ_TIMER3_VIC, IRQ_TIMER4_VIC,
-	};
-
-	samsung_pwm_clocksource_init(S3C_VA_TIMER,
-					timer_irqs, &s5p64x0_pwm_variant);
-}
-
-/*
- * s5p64x0_map_io
- *
- * register the standard CPU IO areas
- */
-
-void __init s5p64x0_init_io(struct map_desc *mach_desc, int size)
-{
-	/* initialize the io descriptors we need for initialization */
-	iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
-	if (mach_desc)
-		iotable_init(mach_desc, size);
-
-	/* detect cpu id and rev. */
-	s5p_init_cpu(S5P64X0_SYS_ID);
-
-	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
-	samsung_wdt_reset_init(S3C_VA_WATCHDOG);
-
-	samsung_pwm_set_platdata(&s5p64x0_pwm_variant);
-}
-
-#ifdef CONFIG_CPU_S5P6440
-void __init s5p6440_map_io(void)
-{
-	/* initialize any device information early */
-	s3c_adc_setname("s3c64xx-adc");
-	s3c_fb_setname("s5p64x0-fb");
-	s3c64xx_spi_setname("s5p64x0-spi");
-
-	s5p64x0_default_sdhci0();
-	s5p64x0_default_sdhci1();
-	s5p6440_default_sdhci2();
-
-	iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
-}
-#endif
-
-#ifdef CONFIG_CPU_S5P6450
-void __init s5p6450_map_io(void)
-{
-	/* initialize any device information early */
-	s3c_adc_setname("s3c64xx-adc");
-	s3c_fb_setname("s5p64x0-fb");
-	s3c64xx_spi_setname("s5p64x0-spi");
-
-	s5p64x0_default_sdhci0();
-	s5p64x0_default_sdhci1();
-	s5p6450_default_sdhci2();
-
-	iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
-}
-#endif
-
-/*
- * s5p64x0_init_clocks
- *
- * register and setup the CPU clocks
- */
-#ifdef CONFIG_CPU_S5P6440
-void __init s5p6440_init_clocks(int xtal)
-{
-	printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
-
-	s3c24xx_register_baseclocks(xtal);
-	s5p_register_clocks(xtal);
-	s5p6440_register_clocks();
-	s5p6440_setup_clocks();
-}
-#endif
-
-#ifdef CONFIG_CPU_S5P6450
-void __init s5p6450_init_clocks(int xtal)
-{
-	printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
-
-	s3c24xx_register_baseclocks(xtal);
-	s5p_register_clocks(xtal);
-	s5p6450_register_clocks();
-	s5p6450_setup_clocks();
-}
-#endif
-
-/*
- * s5p64x0_init_irq
- *
- * register the CPU interrupts
- */
-#ifdef CONFIG_CPU_S5P6440
-void __init s5p6440_init_irq(void)
-{
-	/* S5P6440 supports 2 VIC */
-	u32 vic[2];
-
-	/*
-	 * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
-	 * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
-	 */
-	vic[0] = 0xff800ae7;
-	vic[1] = 0xffbf23e5;
-
-	s5p_init_irq(vic, ARRAY_SIZE(vic));
-}
-#endif
-
-#ifdef CONFIG_CPU_S5P6450
-void __init s5p6450_init_irq(void)
-{
-	/* S5P6450 supports only 2 VIC */
-	u32 vic[2];
-
-	/*
-	 * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
-	 * VIC1 is missing IRQ VIC1[12, 14, 23]
-	 */
-	vic[0] = 0xff9f1fff;
-	vic[1] = 0xff7fafff;
-
-	s5p_init_irq(vic, ARRAY_SIZE(vic));
-}
-#endif
-
-struct bus_type s5p64x0_subsys = {
-	.name		= "s5p64x0-core",
-	.dev_name	= "s5p64x0-core",
-};
-
-static struct device s5p64x0_dev = {
-	.bus	= &s5p64x0_subsys,
-};
-
-static int __init s5p64x0_core_init(void)
-{
-	return subsys_system_register(&s5p64x0_subsys, NULL);
-}
-core_initcall(s5p64x0_core_init);
-
-int __init s5p64x0_init(void)
-{
-	printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
-
-	/* set idle function */
-	arm_pm_idle = s5p64x0_idle;
-
-	return device_register(&s5p64x0_dev);
-}
-
-/* uart registration process */
-#ifdef CONFIG_CPU_S5P6440
-void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-	int uart;
-
-	for (uart = 0; uart < no; uart++) {
-		s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart);
-		s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
-	}
-
-	s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
-}
-#endif
-
-#ifdef CONFIG_CPU_S5P6450
-void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
-	s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
-}
-#endif
-
-#define eint_offset(irq)	((irq) - IRQ_EINT(0))
-
-static int s5p64x0_irq_eint_set_type(struct irq_data *data, unsigned int type)
-{
-	int offs = eint_offset(data->irq);
-	int shift;
-	u32 ctrl, mask;
-	u32 newvalue = 0;
-
-	if (offs > 15)
-		return -EINVAL;
-
-	switch (type) {
-	case IRQ_TYPE_NONE:
-		printk(KERN_WARNING "No edge setting!\n");
-		break;
-	case IRQ_TYPE_EDGE_RISING:
-		newvalue = S3C2410_EXTINT_RISEEDGE;
-		break;
-	case IRQ_TYPE_EDGE_FALLING:
-		newvalue = S3C2410_EXTINT_FALLEDGE;
-		break;
-	case IRQ_TYPE_EDGE_BOTH:
-		newvalue = S3C2410_EXTINT_BOTHEDGE;
-		break;
-	case IRQ_TYPE_LEVEL_LOW:
-		newvalue = S3C2410_EXTINT_LOWLEV;
-		break;
-	case IRQ_TYPE_LEVEL_HIGH:
-		newvalue = S3C2410_EXTINT_HILEV;
-		break;
-	default:
-		printk(KERN_ERR "No such irq type %d", type);
-		return -EINVAL;
-	}
-
-	shift = (offs / 2) * 4;
-	mask = 0x7 << shift;
-
-	ctrl = __raw_readl(S5P64X0_EINT0CON0) & ~mask;
-	ctrl |= newvalue << shift;
-	__raw_writel(ctrl, S5P64X0_EINT0CON0);
-
-	/* Configure the GPIO pin for 6450 or 6440 based on CPU ID */
-	if (soc_is_s5p6450())
-		s3c_gpio_cfgpin(S5P6450_GPN(offs), S3C_GPIO_SFN(2));
-	else
-		s3c_gpio_cfgpin(S5P6440_GPN(offs), S3C_GPIO_SFN(2));
-
-	return 0;
-}
-
-/*
- * s5p64x0_irq_demux_eint
- *
- * This function demuxes the IRQ from the group0 external interrupts,
- * from IRQ_EINT(0) to IRQ_EINT(15). It is designed to be inlined into
- * the specific handlers s5p64x0_irq_demux_eintX_Y.
- */
-static inline void s5p64x0_irq_demux_eint(unsigned int start, unsigned int end)
-{
-	u32 status = __raw_readl(S5P64X0_EINT0PEND);
-	u32 mask = __raw_readl(S5P64X0_EINT0MASK);
-	unsigned int irq;
-
-	status &= ~mask;
-	status >>= start;
-	status &= (1 << (end - start + 1)) - 1;
-
-	for (irq = IRQ_EINT(start); irq <= IRQ_EINT(end); irq++) {
-		if (status & 1)
-			generic_handle_irq(irq);
-		status >>= 1;
-	}
-}
-
-static void s5p64x0_irq_demux_eint0_3(unsigned int irq, struct irq_desc *desc)
-{
-	s5p64x0_irq_demux_eint(0, 3);
-}
-
-static void s5p64x0_irq_demux_eint4_11(unsigned int irq, struct irq_desc *desc)
-{
-	s5p64x0_irq_demux_eint(4, 11);
-}
-
-static void s5p64x0_irq_demux_eint12_15(unsigned int irq,
-					struct irq_desc *desc)
-{
-	s5p64x0_irq_demux_eint(12, 15);
-}
-
-static int s5p64x0_alloc_gc(void)
-{
-	struct irq_chip_generic *gc;
-	struct irq_chip_type *ct;
-
-	gc = irq_alloc_generic_chip("s5p64x0-eint", 1, S5P_IRQ_EINT_BASE,
-				    S5P_VA_GPIO, handle_level_irq);
-	if (!gc) {
-		printk(KERN_ERR "%s: irq_alloc_generic_chip for group 0"
-			"external interrupts failed\n", __func__);
-		return -EINVAL;
-	}
-
-	ct = gc->chip_types;
-	ct->chip.irq_ack = irq_gc_ack_set_bit;
-	ct->chip.irq_mask = irq_gc_mask_set_bit;
-	ct->chip.irq_unmask = irq_gc_mask_clr_bit;
-	ct->chip.irq_set_type = s5p64x0_irq_eint_set_type;
-	ct->chip.irq_set_wake = s3c_irqext_wake;
-	ct->regs.ack = EINT0PEND_OFFSET;
-	ct->regs.mask = EINT0MASK_OFFSET;
-	irq_setup_generic_chip(gc, IRQ_MSK(16), IRQ_GC_INIT_MASK_CACHE,
-			       IRQ_NOREQUEST | IRQ_NOPROBE, 0);
-	return 0;
-}
-
-static int __init s5p64x0_init_irq_eint(void)
-{
-	int ret = s5p64x0_alloc_gc();
-	irq_set_chained_handler(IRQ_EINT0_3, s5p64x0_irq_demux_eint0_3);
-	irq_set_chained_handler(IRQ_EINT4_11, s5p64x0_irq_demux_eint4_11);
-	irq_set_chained_handler(IRQ_EINT12_15, s5p64x0_irq_demux_eint12_15);
-
-	return ret;
-}
-arch_initcall(s5p64x0_init_irq_eint);
-
-void s5p64x0_restart(enum reboot_mode mode, const char *cmd)
-{
-	if (mode != REBOOT_SOFT)
-		samsung_wdt_reset();
-
-	soft_restart(0);
-}
diff --git a/arch/arm/mach-s5p64x0/common.h b/arch/arm/mach-s5p64x0/common.h
deleted file mode 100644
index cbe7f3d..0000000
--- a/arch/arm/mach-s5p64x0/common.h
+++ /dev/null
@@ -1,56 +0,0 @@
-/*
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * Common Header for S5P64X0 machines
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __ARCH_ARM_MACH_S5P64X0_COMMON_H
-#define __ARCH_ARM_MACH_S5P64X0_COMMON_H
-
-#include <linux/reboot.h>
-
-void s5p6440_init_irq(void);
-void s5p6450_init_irq(void);
-void s5p64x0_init_io(struct map_desc *mach_desc, int size);
-
-void s5p6440_register_clocks(void);
-void s5p6440_setup_clocks(void);
-
-void s5p6450_register_clocks(void);
-void s5p6450_setup_clocks(void);
-
-void s5p64x0_restart(enum reboot_mode mode, const char *cmd);
-extern  int s5p64x0_init(void);
-
-#ifdef CONFIG_CPU_S5P6440
-
-extern void s5p6440_map_io(void);
-extern void s5p6440_init_clocks(int xtal);
-
-extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-
-#else
-#define s5p6440_init_clocks NULL
-#define s5p6440_init_uarts NULL
-#define s5p6440_map_io NULL
-#endif
-
-#ifdef CONFIG_CPU_S5P6450
-
-extern void s5p6450_map_io(void);
-extern void s5p6450_init_clocks(int xtal);
-
-extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
-
-#else
-#define s5p6450_init_clocks NULL
-#define s5p6450_init_uarts NULL
-#define s5p6450_map_io NULL
-#endif
-
-#endif /* __ARCH_ARM_MACH_S5P64X0_COMMON_H */
diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c
deleted file mode 100644
index 723d4773c..0000000
--- a/arch/arm/mach-s5p64x0/dev-audio.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/dev-audio.c
- *
- * Copyright (c) 2010 Samsung Electronics Co. Ltd
- *	Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-
-#include <plat/gpio-cfg.h>
-#include <linux/platform_data/asoc-s3c.h>
-
-#include <mach/map.h>
-#include <mach/dma.h>
-#include <mach/irqs.h>
-
-static int s5p6440_cfg_i2s(struct platform_device *pdev)
-{
-	switch (pdev->id) {
-	case 0:
-		s3c_gpio_cfgpin_range(S5P6440_GPC(4), 2, S3C_GPIO_SFN(5));
-		s3c_gpio_cfgpin(S5P6440_GPC(7), S3C_GPIO_SFN(5));
-		s3c_gpio_cfgpin_range(S5P6440_GPH(6), 4, S3C_GPIO_SFN(5));
-		break;
-	default:
-		printk(KERN_ERR "Invalid Device %d\n", pdev->id);
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static struct s3c_audio_pdata s5p6440_i2s_pdata = {
-	.cfg_gpio = s5p6440_cfg_i2s,
-	.type = {
-		.i2s = {
-			.quirks = QUIRK_PRI_6CHAN,
-		},
-	},
-};
-
-static struct resource s5p64x0_i2s0_resource[] = {
-	[0] = DEFINE_RES_MEM(S5P64X0_PA_I2S, SZ_256),
-	[1] = DEFINE_RES_DMA(DMACH_I2S0_TX),
-	[2] = DEFINE_RES_DMA(DMACH_I2S0_RX),
-};
-
-struct platform_device s5p6440_device_iis = {
-	.name		= "samsung-i2s",
-	.id		= 0,
-	.num_resources	= ARRAY_SIZE(s5p64x0_i2s0_resource),
-	.resource	= s5p64x0_i2s0_resource,
-	.dev = {
-		.platform_data = &s5p6440_i2s_pdata,
-	},
-};
-
-static int s5p6450_cfg_i2s(struct platform_device *pdev)
-{
-	switch (pdev->id) {
-	case 0:
-		s3c_gpio_cfgpin_range(S5P6450_GPR(4), 5, S3C_GPIO_SFN(5));
-		s3c_gpio_cfgpin_range(S5P6450_GPR(13), 2, S3C_GPIO_SFN(5));
-		break;
-	case 1:
-		s3c_gpio_cfgpin(S5P6440_GPB(4), S3C_GPIO_SFN(5));
-		s3c_gpio_cfgpin_range(S5P6450_GPC(0), 4, S3C_GPIO_SFN(5));
-		break;
-	case 2:
-		s3c_gpio_cfgpin_range(S5P6450_GPK(0), 5, S3C_GPIO_SFN(5));
-		break;
-	default:
-		printk(KERN_ERR "Invalid Device %d\n", pdev->id);
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static struct s3c_audio_pdata s5p6450_i2s0_pdata = {
-	.cfg_gpio = s5p6450_cfg_i2s,
-	.type = {
-		.i2s = {
-			.quirks = QUIRK_PRI_6CHAN,
-		},
-	},
-};
-
-struct platform_device s5p6450_device_iis0 = {
-	.name		= "samsung-i2s",
-	.id		= 0,
-	.num_resources	= ARRAY_SIZE(s5p64x0_i2s0_resource),
-	.resource	= s5p64x0_i2s0_resource,
-	.dev = {
-		.platform_data = &s5p6450_i2s0_pdata,
-	},
-};
-
-static struct s3c_audio_pdata s5p6450_i2s_pdata = {
-	.cfg_gpio = s5p6450_cfg_i2s,
-};
-
-static struct resource s5p6450_i2s1_resource[] = {
-	[0] = DEFINE_RES_MEM(S5P6450_PA_I2S1, SZ_256),
-	[1] = DEFINE_RES_DMA(DMACH_I2S1_TX),
-	[2] = DEFINE_RES_DMA(DMACH_I2S1_RX),
-};
-
-struct platform_device s5p6450_device_iis1 = {
-	.name		= "samsung-i2s",
-	.id		= 1,
-	.num_resources	= ARRAY_SIZE(s5p6450_i2s1_resource),
-	.resource	= s5p6450_i2s1_resource,
-	.dev = {
-		.platform_data = &s5p6450_i2s_pdata,
-	},
-};
-
-static struct resource s5p6450_i2s2_resource[] = {
-	[0] = DEFINE_RES_MEM(S5P6450_PA_I2S2, SZ_256),
-	[1] = DEFINE_RES_DMA(DMACH_I2S2_TX),
-	[2] = DEFINE_RES_DMA(DMACH_I2S2_RX),
-};
-
-struct platform_device s5p6450_device_iis2 = {
-	.name		= "samsung-i2s",
-	.id		= 2,
-	.num_resources	= ARRAY_SIZE(s5p6450_i2s2_resource),
-	.resource	= s5p6450_i2s2_resource,
-	.dev = {
-		.platform_data = &s5p6450_i2s_pdata,
-	},
-};
-
-/* PCM Controller platform_devices */
-
-static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev)
-{
-	switch (pdev->id) {
-	case 0:
-		s3c_gpio_cfgpin_range(S5P6440_GPR(6), 3, S3C_GPIO_SFN(2));
-		s3c_gpio_cfgpin_range(S5P6440_GPR(13), 2, S3C_GPIO_SFN(2));
-		break;
-
-	default:
-		printk(KERN_DEBUG "Invalid PCM Controller number!");
-		return -EINVAL;
-	}
-
-	return 0;
-}
-
-static struct s3c_audio_pdata s5p6440_pcm_pdata = {
-	.cfg_gpio = s5p6440_pcm_cfg_gpio,
-};
-
-static struct resource s5p6440_pcm0_resource[] = {
-	[0] = DEFINE_RES_MEM(S5P64X0_PA_PCM, SZ_256),
-	[1] = DEFINE_RES_DMA(DMACH_PCM0_TX),
-	[2] = DEFINE_RES_DMA(DMACH_PCM0_RX),
-};
-
-struct platform_device s5p6440_device_pcm = {
-	.name		= "samsung-pcm",
-	.id		= 0,
-	.num_resources	= ARRAY_SIZE(s5p6440_pcm0_resource),
-	.resource	= s5p6440_pcm0_resource,
-	.dev = {
-		.platform_data = &s5p6440_pcm_pdata,
-	},
-};
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c
deleted file mode 100644
index 9c4ce08..0000000
--- a/arch/arm/mach-s5p64x0/dma.c
+++ /dev/null
@@ -1,128 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/dma.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *	Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
-*/
-
-#include <linux/dma-mapping.h>
-#include <linux/amba/bus.h>
-#include <linux/amba/pl330.h>
-
-#include <asm/irq.h>
-
-#include <mach/map.h>
-#include <mach/irqs.h>
-#include <mach/regs-clock.h>
-#include <mach/dma.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/irqs.h>
-
-static u8 s5p6440_pdma_peri[] = {
-	DMACH_UART0_RX,
-	DMACH_UART0_TX,
-	DMACH_UART1_RX,
-	DMACH_UART1_TX,
-	DMACH_UART2_RX,
-	DMACH_UART2_TX,
-	DMACH_UART3_RX,
-	DMACH_UART3_TX,
-	DMACH_MAX,
-	DMACH_MAX,
-	DMACH_PCM0_TX,
-	DMACH_PCM0_RX,
-	DMACH_I2S0_TX,
-	DMACH_I2S0_RX,
-	DMACH_SPI0_TX,
-	DMACH_SPI0_RX,
-	DMACH_MAX,
-	DMACH_MAX,
-	DMACH_MAX,
-	DMACH_MAX,
-	DMACH_SPI1_TX,
-	DMACH_SPI1_RX,
-};
-
-static struct dma_pl330_platdata s5p6440_pdma_pdata = {
-	.nr_valid_peri = ARRAY_SIZE(s5p6440_pdma_peri),
-	.peri_id = s5p6440_pdma_peri,
-};
-
-static u8 s5p6450_pdma_peri[] = {
-	DMACH_UART0_RX,
-	DMACH_UART0_TX,
-	DMACH_UART1_RX,
-	DMACH_UART1_TX,
-	DMACH_UART2_RX,
-	DMACH_UART2_TX,
-	DMACH_UART3_RX,
-	DMACH_UART3_TX,
-	DMACH_UART4_RX,
-	DMACH_UART4_TX,
-	DMACH_PCM0_TX,
-	DMACH_PCM0_RX,
-	DMACH_I2S0_TX,
-	DMACH_I2S0_RX,
-	DMACH_SPI0_TX,
-	DMACH_SPI0_RX,
-	DMACH_PCM1_TX,
-	DMACH_PCM1_RX,
-	DMACH_PCM2_TX,
-	DMACH_PCM2_RX,
-	DMACH_SPI1_TX,
-	DMACH_SPI1_RX,
-	DMACH_USI_TX,
-	DMACH_USI_RX,
-	DMACH_MAX,
-	DMACH_I2S1_TX,
-	DMACH_I2S1_RX,
-	DMACH_I2S2_TX,
-	DMACH_I2S2_RX,
-	DMACH_PWM,
-	DMACH_UART5_RX,
-	DMACH_UART5_TX,
-};
-
-static struct dma_pl330_platdata s5p6450_pdma_pdata = {
-	.nr_valid_peri = ARRAY_SIZE(s5p6450_pdma_peri),
-	.peri_id = s5p6450_pdma_peri,
-};
-
-static AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330,
-	S5P64X0_PA_PDMA, {IRQ_DMA0}, NULL);
-
-static int __init s5p64x0_dma_init(void)
-{
-	if (soc_is_s5p6450()) {
-		dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask);
-		dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask);
-		s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata;
-	} else {
-		dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask);
-		dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask);
-		s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata;
-	}
-
-	amba_device_register(&s5p64x0_pdma_device, &iomem_resource);
-
-	return 0;
-}
-arch_initcall(s5p64x0_dma_init);
diff --git a/arch/arm/mach-s5p64x0/i2c.h b/arch/arm/mach-s5p64x0/i2c.h
deleted file mode 100644
index 1e5bb4e..0000000
--- a/arch/arm/mach-s5p64x0/i2c.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/*
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P64X0 I2C configuration
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-extern void s5p6440_i2c0_cfg_gpio(struct platform_device *dev);
-extern void s5p6440_i2c1_cfg_gpio(struct platform_device *dev);
-
-extern void s5p6450_i2c0_cfg_gpio(struct platform_device *dev);
-extern void s5p6450_i2c1_cfg_gpio(struct platform_device *dev);
diff --git a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
deleted file mode 100644
index 8759e78..0000000
--- a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
+++ /dev/null
@@ -1,32 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* pull in the relevant register and map files. */
-
-#include <linux/serial_s3c.h>
-#include <plat/map-base.h>
-#include <plat/map-s5p.h>
-
-	.macro addruart, rp, rv, tmp
-		mov	\rp, #0xE0000000
-		orr	\rp, \rp, #0x00100000
-		ldr	\rp, [\rp, #0x118 ]
-		and	\rp, \rp, #0xff000
-		teq	\rp, #0x50000		@@ S5P6450
-		ldreq	\rp, =0xEC800000
-		movne	\rp, #0xEC000000	@@ S5P6440
-		ldrne	\rv, = S3C_VA_UART
-#if CONFIG_DEBUG_S3C_UART != 0
-		add	\rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART)
-		add	\rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART)
-#endif
-	.endm
-
-#include <debug/samsung.S>
diff --git a/arch/arm/mach-s5p64x0/include/mach/dma.h b/arch/arm/mach-s5p64x0/include/mach/dma.h
deleted file mode 100644
index 5a622af..0000000
--- a/arch/arm/mach-s5p64x0/include/mach/dma.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- *	Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
-
-#ifndef __MACH_DMA_H
-#define __MACH_DMA_H
-
-/* This platform uses the common common DMA API driver for PL330 */
-#include <plat/dma-pl330.h>
-
-#endif /* __MACH_DMA_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/gpio.h b/arch/arm/mach-s5p64x0/include/mach/gpio.h
deleted file mode 100644
index 06cd3c9..0000000
--- a/arch/arm/mach-s5p64x0/include/mach/gpio.h
+++ /dev/null
@@ -1,132 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/gpio.h
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P64X0 - GPIO lib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H __FILE__
-
-/* GPIO bank sizes */
-
-#define S5P6440_GPIO_A_NR	(6)
-#define S5P6440_GPIO_B_NR	(7)
-#define S5P6440_GPIO_C_NR	(8)
-#define S5P6440_GPIO_F_NR	(16)
-#define S5P6440_GPIO_G_NR	(7)
-#define S5P6440_GPIO_H_NR	(10)
-#define S5P6440_GPIO_I_NR	(16)
-#define S5P6440_GPIO_J_NR	(12)
-#define S5P6440_GPIO_N_NR	(16)
-#define S5P6440_GPIO_P_NR	(8)
-#define S5P6440_GPIO_R_NR	(15)
-
-#define S5P6450_GPIO_A_NR	(6)
-#define S5P6450_GPIO_B_NR	(7)
-#define S5P6450_GPIO_C_NR	(8)
-#define S5P6450_GPIO_D_NR	(8)
-#define S5P6450_GPIO_F_NR	(16)
-#define S5P6450_GPIO_G_NR	(14)
-#define S5P6450_GPIO_H_NR	(10)
-#define S5P6450_GPIO_I_NR	(16)
-#define S5P6450_GPIO_J_NR	(12)
-#define S5P6450_GPIO_K_NR	(5)
-#define S5P6450_GPIO_N_NR	(16)
-#define S5P6450_GPIO_P_NR	(11)
-#define S5P6450_GPIO_Q_NR	(14)
-#define S5P6450_GPIO_R_NR	(15)
-#define S5P6450_GPIO_S_NR	(8)
-
-/* GPIO bank numbers */
-
-/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
- * space for debugging purposes so that any accidental
- * change from one gpio bank to another can be caught.
-*/
-
-#define S5P64X0_GPIO_NEXT(__gpio) \
-	((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
-
-enum s5p6440_gpio_number {
-	S5P6440_GPIO_A_START	= 0,
-	S5P6440_GPIO_B_START	= S5P64X0_GPIO_NEXT(S5P6440_GPIO_A),
-	S5P6440_GPIO_C_START	= S5P64X0_GPIO_NEXT(S5P6440_GPIO_B),
-	S5P6440_GPIO_F_START	= S5P64X0_GPIO_NEXT(S5P6440_GPIO_C),
-	S5P6440_GPIO_G_START	= S5P64X0_GPIO_NEXT(S5P6440_GPIO_F),
-	S5P6440_GPIO_H_START	= S5P64X0_GPIO_NEXT(S5P6440_GPIO_G),
-	S5P6440_GPIO_I_START	= S5P64X0_GPIO_NEXT(S5P6440_GPIO_H),
-	S5P6440_GPIO_J_START	= S5P64X0_GPIO_NEXT(S5P6440_GPIO_I),
-	S5P6440_GPIO_N_START	= S5P64X0_GPIO_NEXT(S5P6440_GPIO_J),
-	S5P6440_GPIO_P_START	= S5P64X0_GPIO_NEXT(S5P6440_GPIO_N),
-	S5P6440_GPIO_R_START	= S5P64X0_GPIO_NEXT(S5P6440_GPIO_P),
-};
-
-enum s5p6450_gpio_number {
-	S5P6450_GPIO_A_START	= 0,
-	S5P6450_GPIO_B_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_A),
-	S5P6450_GPIO_C_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_B),
-	S5P6450_GPIO_D_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_C),
-	S5P6450_GPIO_F_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_D),
-	S5P6450_GPIO_G_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_F),
-	S5P6450_GPIO_H_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_G),
-	S5P6450_GPIO_I_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_H),
-	S5P6450_GPIO_J_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_I),
-	S5P6450_GPIO_K_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_J),
-	S5P6450_GPIO_N_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_K),
-	S5P6450_GPIO_P_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_N),
-	S5P6450_GPIO_Q_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_P),
-	S5P6450_GPIO_R_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_Q),
-	S5P6450_GPIO_S_START	= S5P64X0_GPIO_NEXT(S5P6450_GPIO_R),
-};
-
-/* GPIO number definitions */
-
-#define S5P6440_GPA(_nr)	(S5P6440_GPIO_A_START + (_nr))
-#define S5P6440_GPB(_nr)	(S5P6440_GPIO_B_START + (_nr))
-#define S5P6440_GPC(_nr)	(S5P6440_GPIO_C_START + (_nr))
-#define S5P6440_GPF(_nr)	(S5P6440_GPIO_F_START + (_nr))
-#define S5P6440_GPG(_nr)	(S5P6440_GPIO_G_START + (_nr))
-#define S5P6440_GPH(_nr)	(S5P6440_GPIO_H_START + (_nr))
-#define S5P6440_GPI(_nr)	(S5P6440_GPIO_I_START + (_nr))
-#define S5P6440_GPJ(_nr)	(S5P6440_GPIO_J_START + (_nr))
-#define S5P6440_GPN(_nr)	(S5P6440_GPIO_N_START + (_nr))
-#define S5P6440_GPP(_nr)	(S5P6440_GPIO_P_START + (_nr))
-#define S5P6440_GPR(_nr)	(S5P6440_GPIO_R_START + (_nr))
-
-#define S5P6450_GPA(_nr)	(S5P6450_GPIO_A_START + (_nr))
-#define S5P6450_GPB(_nr)	(S5P6450_GPIO_B_START + (_nr))
-#define S5P6450_GPC(_nr)	(S5P6450_GPIO_C_START + (_nr))
-#define S5P6450_GPD(_nr)	(S5P6450_GPIO_D_START + (_nr))
-#define S5P6450_GPF(_nr)	(S5P6450_GPIO_F_START + (_nr))
-#define S5P6450_GPG(_nr)	(S5P6450_GPIO_G_START + (_nr))
-#define S5P6450_GPH(_nr)	(S5P6450_GPIO_H_START + (_nr))
-#define S5P6450_GPI(_nr)	(S5P6450_GPIO_I_START + (_nr))
-#define S5P6450_GPJ(_nr)	(S5P6450_GPIO_J_START + (_nr))
-#define S5P6450_GPK(_nr)	(S5P6450_GPIO_K_START + (_nr))
-#define S5P6450_GPN(_nr)	(S5P6450_GPIO_N_START + (_nr))
-#define S5P6450_GPP(_nr)	(S5P6450_GPIO_P_START + (_nr))
-#define S5P6450_GPQ(_nr)	(S5P6450_GPIO_Q_START + (_nr))
-#define S5P6450_GPR(_nr)	(S5P6450_GPIO_R_START + (_nr))
-#define S5P6450_GPS(_nr)	(S5P6450_GPIO_S_START + (_nr))
-
-/* the end of the S5P64X0 specific gpios */
-
-#define S5P6440_GPIO_END	(S5P6440_GPR(S5P6440_GPIO_R_NR) + 1)
-#define S5P6450_GPIO_END	(S5P6450_GPS(S5P6450_GPIO_S_NR) + 1)
-
-#define S5P64X0_GPIO_END	(S5P6440_GPIO_END > S5P6450_GPIO_END ?	\
-				 S5P6440_GPIO_END : S5P6450_GPIO_END)
-
-#define S3C_GPIO_END		S5P64X0_GPIO_END
-
-/* define the number of gpios we need to the one after the last GPIO range */
-
-#define ARCH_NR_GPIOS		(S5P64X0_GPIO_END + CONFIG_SAMSUNG_GPIO_EXTRA)
-
-#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/hardware.h b/arch/arm/mach-s5p64x0/include/mach/hardware.h
deleted file mode 100644
index d3e8799..0000000
--- a/arch/arm/mach-s5p64x0/include/mach/hardware.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/hardware.h
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P64X0 - Hardware support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_HARDWARE_H
-#define __ASM_ARCH_HARDWARE_H __FILE__
-
-/* currently nothing here, placeholder */
-
-#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
deleted file mode 100644
index 53982db..0000000
--- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
+++ /dev/null
@@ -1,148 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/irqs.h
- *
- * Copyright 2009-2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P64X0 - IRQ definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_IRQS_H
-#define __ASM_ARCH_IRQS_H __FILE__
-
-#include <plat/irqs.h>
-
-/* VIC0 */
-
-#define IRQ_EINT0_3		S5P_IRQ_VIC0(0)
-#define IRQ_EINT4_11		S5P_IRQ_VIC0(1)
-#define IRQ_RTC_TIC		S5P_IRQ_VIC0(2)
-#define IRQ_IIS1		S5P_IRQ_VIC0(3)	/* for only S5P6450 */
-#define IRQ_IIS2		S5P_IRQ_VIC0(4)	/* for only S5P6450 */
-#define IRQ_IIC1		S5P_IRQ_VIC0(5)
-#define IRQ_I2SV40		S5P_IRQ_VIC0(6)
-#define IRQ_GPS			S5P_IRQ_VIC0(7)	/* for only S5P6450 */
-
-#define IRQ_2D			S5P_IRQ_VIC0(11)
-#define IRQ_TIMER0_VIC		S5P_IRQ_VIC0(23)
-#define IRQ_TIMER1_VIC		S5P_IRQ_VIC0(24)
-#define IRQ_TIMER2_VIC		S5P_IRQ_VIC0(25)
-#define IRQ_WDT			S5P_IRQ_VIC0(26)
-#define IRQ_TIMER3_VIC		S5P_IRQ_VIC0(27)
-#define IRQ_TIMER4_VIC		S5P_IRQ_VIC0(28)
-#define IRQ_DISPCON0		S5P_IRQ_VIC0(29)
-#define IRQ_DISPCON1		S5P_IRQ_VIC0(30)
-#define IRQ_DISPCON2		S5P_IRQ_VIC0(31)
-
-/* VIC1 */
-
-#define IRQ_EINT12_15		S5P_IRQ_VIC1(0)
-#define IRQ_PCM0		S5P_IRQ_VIC1(2)
-#define IRQ_PCM1		S5P_IRQ_VIC1(3)	/* for only S5P6450 */
-#define IRQ_PCM2		S5P_IRQ_VIC1(4)	/* for only S5P6450 */
-#define IRQ_UART0		S5P_IRQ_VIC1(5)
-#define IRQ_UART1		S5P_IRQ_VIC1(6)
-#define IRQ_UART2		S5P_IRQ_VIC1(7)
-#define IRQ_UART3		S5P_IRQ_VIC1(8)
-#define IRQ_DMA0		S5P_IRQ_VIC1(9)
-#define IRQ_UART4		S5P_IRQ_VIC1(10)	/* S5P6450 */
-#define IRQ_UART5		S5P_IRQ_VIC1(11)	/* S5P6450 */
-#define IRQ_NFC			S5P_IRQ_VIC1(13)
-#define IRQ_USI			S5P_IRQ_VIC1(15)	/* S5P6450 */
-#define IRQ_SPI0		S5P_IRQ_VIC1(16)
-#define IRQ_SPI1		S5P_IRQ_VIC1(17)
-#define IRQ_HSMMC2		S5P_IRQ_VIC1(17)	/* Shared */
-#define IRQ_IIC			S5P_IRQ_VIC1(18)
-#define IRQ_DISPCON3		S5P_IRQ_VIC1(19)
-#define IRQ_EINT_GROUPS		S5P_IRQ_VIC1(21)
-#define IRQ_PMU			S5P_IRQ_VIC1(23)	/* S5P6440 */
-#define IRQ_HSMMC0		S5P_IRQ_VIC1(24)
-#define IRQ_HSMMC1		S5P_IRQ_VIC1(25)
-#define IRQ_OTG			S5P_IRQ_VIC1(26)
-#define IRQ_DSI			S5P_IRQ_VIC1(27)
-#define IRQ_RTC_ALARM		S5P_IRQ_VIC1(28)
-#define IRQ_TSI			S5P_IRQ_VIC1(29)
-#define IRQ_PENDN		S5P_IRQ_VIC1(30)
-#define IRQ_TC			IRQ_PENDN
-#define IRQ_ADC			S5P_IRQ_VIC1(31)
-
-/* UART interrupts, S5P6450 has 5 UARTs */
-#define IRQ_S5P_UART_BASE4	(96)
-#define IRQ_S5P_UART_BASE5	(100)
-
-#define IRQ_S5P_UART_RX4	(IRQ_S5P_UART_BASE4 + UART_IRQ_RXD)
-#define IRQ_S5P_UART_TX4	(IRQ_S5P_UART_BASE4 + UART_IRQ_TXD)
-#define IRQ_S5P_UART_ERR4	(IRQ_S5P_UART_BASE4 + UART_IRQ_ERR)
-
-#define IRQ_S5P_UART_RX5	(IRQ_S5P_UART_BASE5 + UART_IRQ_RXD)
-#define IRQ_S5P_UART_TX5	(IRQ_S5P_UART_BASE5 + UART_IRQ_TXD)
-#define IRQ_S5P_UART_ERR5	(IRQ_S5P_UART_BASE5 + UART_IRQ_ERR)
-
-/* S3C compatibilty defines */
-#define IRQ_S3CUART_RX4		IRQ_S5P_UART_RX4
-#define IRQ_S3CUART_RX5		IRQ_S5P_UART_RX5
-
-#define IRQ_I2S0		IRQ_I2SV40
-
-#define IRQ_LCD_FIFO		IRQ_DISPCON0
-#define IRQ_LCD_VSYNC		IRQ_DISPCON1
-#define IRQ_LCD_SYSTEM		IRQ_DISPCON2
-
-/* S5P6450 EINT feature will be added */
-
-/*
- * Since the IRQ_EINT(x) are a linear mapping on s5p6440 we just defined
- * them as an IRQ_EINT(x) macro from S5P_IRQ_EINT_BASE which we place
- * after the pair of VICs.
- */
-
-#define S5P_IRQ_EINT_BASE	(S5P_IRQ_VIC1(31) + 6)
-
-#define S5P_EINT(x)		((x) + S5P_IRQ_EINT_BASE)
-
-#define S5P_EINT_BASE1		(S5P_IRQ_EINT_BASE)
-/*
- * S5P6440 has 0-15 external interrupts in group 0. Only these can be used
- * to wake up from sleep. If request is beyond this range, by mistake, a large
- * return value for an irq number should be indication of something amiss.
- */
-#define S5P_EINT_BASE2		(0xf0000000)
-
-/*
- * Next the external interrupt groups. These are similar to the IRQ_EINT(x)
- * that they are sourced from the GPIO pins but with a different scheme for
- * priority and source indication.
- *
- * The IRQ_EINT(x) can be thought of as 'group 0' of the available GPIO
- * interrupts, but for historical reasons they are kept apart from these
- * next interrupts.
- *
- * Use IRQ_EINT_GROUP(group, offset) to get the number for use in the
- * machine specific support files.
- */
-
-/* Actually, #6 and #7 are missing in the EINT_GROUP1 */
-#define IRQ_EINT_GROUP1_NR	(15)
-#define IRQ_EINT_GROUP2_NR	(8)
-#define IRQ_EINT_GROUP5_NR	(7)
-#define IRQ_EINT_GROUP6_NR	(10)
-/* Actually, #0, #1 and #2 are missing in the EINT_GROUP8 */
-#define IRQ_EINT_GROUP8_NR	(11)
-
-#define IRQ_EINT_GROUP_BASE	S5P_EINT(16)
-#define IRQ_EINT_GROUP1_BASE	(IRQ_EINT_GROUP_BASE + 0)
-#define IRQ_EINT_GROUP2_BASE	(IRQ_EINT_GROUP1_BASE + IRQ_EINT_GROUP1_NR)
-#define IRQ_EINT_GROUP5_BASE	(IRQ_EINT_GROUP2_BASE + IRQ_EINT_GROUP2_NR)
-#define IRQ_EINT_GROUP6_BASE	(IRQ_EINT_GROUP5_BASE + IRQ_EINT_GROUP5_NR)
-#define IRQ_EINT_GROUP8_BASE	(IRQ_EINT_GROUP6_BASE + IRQ_EINT_GROUP6_NR)
-
-#define IRQ_EINT_GROUP(grp, x)	(IRQ_EINT_GROUP##grp##_BASE + (x))
-
-/* Set the default NR_IRQS */
-
-#define NR_IRQS			(IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
-
-#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
deleted file mode 100644
index 50a6e96..0000000
--- a/arch/arm/mach-s5p64x0/include/mach/map.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/map.h
- *
- * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P64X0 - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_MAP_H
-#define __ASM_ARCH_MAP_H __FILE__
-
-#include <plat/map-base.h>
-#include <plat/map-s5p.h>
-
-#define S5P64X0_PA_SDRAM	0x20000000
-
-#define S5P64X0_PA_CHIPID	0xE0000000
-
-#define S5P64X0_PA_SYSCON	0xE0100000
-
-#define S5P64X0_PA_GPIO		0xE0308000
-
-#define S5P64X0_PA_VIC0		0xE4000000
-#define S5P64X0_PA_VIC1		0xE4100000
-
-#define S5P64X0_PA_SROMC	0xE7000000
-
-#define S5P64X0_PA_PDMA		0xE9000000
-
-#define S5P64X0_PA_TIMER	0xEA000000
-#define S5P64X0_PA_RTC		0xEA100000
-#define S5P64X0_PA_WDT		0xEA200000
-
-#define S5P6440_PA_IIC0		0xEC104000
-#define S5P6440_PA_IIC1		0xEC20F000
-#define S5P6450_PA_IIC0		0xEC100000
-#define S5P6450_PA_IIC1		0xEC200000
-
-#define S5P64X0_PA_SPI0		0xEC400000
-#define S5P64X0_PA_SPI1		0xEC500000
-
-#define S5P64X0_PA_HSOTG	0xED100000
-
-#define S5P64X0_PA_HSMMC(x)	(0xED800000 + ((x) * 0x100000))
-
-#define S5P64X0_PA_FB		0xEE000000
-
-#define S5P64X0_PA_I2S		0xF2000000
-#define S5P6450_PA_I2S1		0xF2800000
-#define S5P6450_PA_I2S2		0xF2900000
-
-#define S5P64X0_PA_PCM		0xF2100000
-
-#define S5P64X0_PA_ADC		0xF3000000
-
-/* Compatibiltiy Defines */
-
-#define S3C_PA_HSMMC0		S5P64X0_PA_HSMMC(0)
-#define S3C_PA_HSMMC1		S5P64X0_PA_HSMMC(1)
-#define S3C_PA_HSMMC2		S5P64X0_PA_HSMMC(2)
-#define S3C_PA_IIC		S5P6440_PA_IIC0
-#define S3C_PA_IIC1		S5P6440_PA_IIC1
-#define S3C_PA_RTC		S5P64X0_PA_RTC
-#define S3C_PA_WDT		S5P64X0_PA_WDT
-#define S3C_PA_FB		S5P64X0_PA_FB
-#define S3C_PA_SPI0		S5P64X0_PA_SPI0
-#define S3C_PA_SPI1		S5P64X0_PA_SPI1
-
-#define S5P_PA_CHIPID		S5P64X0_PA_CHIPID
-#define S5P_PA_SROMC		S5P64X0_PA_SROMC
-#define S5P_PA_SYSCON		S5P64X0_PA_SYSCON
-#define S5P_PA_TIMER		S5P64X0_PA_TIMER
-
-#define SAMSUNG_PA_ADC		S5P64X0_PA_ADC
-#define SAMSUNG_PA_TIMER	S5P64X0_PA_TIMER
-
-/* UART */
-
-#define S5P6440_PA_UART(x)	(0xEC000000 + ((x) * S3C_UART_OFFSET))
-#define S5P6450_PA_UART(x)	((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000))
-
-#define S5P_PA_UART0		S5P6450_PA_UART(0)
-#define S5P_PA_UART1		S5P6450_PA_UART(1)
-#define S5P_PA_UART2		S5P6450_PA_UART(2)
-#define S5P_PA_UART3		S5P6450_PA_UART(3)
-#define S5P_PA_UART4		S5P6450_PA_UART(4)
-#define S5P_PA_UART5		S5P6450_PA_UART(5)
-
-#define S5P_SZ_UART		SZ_256
-#define S3C_VA_UARTx(x)		(S3C_VA_UART + ((x) * S3C_UART_OFFSET))
-
-#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/pm-core.h b/arch/arm/mach-s5p64x0/include/mach/pm-core.h
deleted file mode 100644
index 1e0eb65..0000000
--- a/arch/arm/mach-s5p64x0/include/mach/pm-core.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/pm-core.h
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P64X0 - PM core support for arch/arm/plat-samsung/pm.c
- *
- * Based on PM core support for S3C64XX by Ben Dooks
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/serial_s3c.h>
-
-#include <mach/regs-gpio.h>
-
-static inline void s3c_pm_debug_init_uart(void)
-{
-	u32 tmp = __raw_readl(S5P64X0_CLK_GATE_PCLK);
-
-	/*
-	 * As a note, since the S5P64X0 UARTs generally have multiple
-	 * clock sources, we simply enable PCLK at the moment and hope
-	 * that the resume settings for the UART are suitable for the
-	 * use with PCLK.
-	 */
-	tmp |= S5P64X0_CLK_GATE_PCLK_UART0;
-	tmp |= S5P64X0_CLK_GATE_PCLK_UART1;
-	tmp |= S5P64X0_CLK_GATE_PCLK_UART2;
-	tmp |= S5P64X0_CLK_GATE_PCLK_UART3;
-
-	__raw_writel(tmp, S5P64X0_CLK_GATE_PCLK);
-	udelay(10);
-}
-
-static inline void s3c_pm_arch_prepare_irqs(void)
-{
-	/* VIC should have already been taken care of */
-
-	/* clear any pending EINT0 interrupts */
-	__raw_writel(__raw_readl(S5P64X0_EINT0PEND), S5P64X0_EINT0PEND);
-}
-
-static inline void s3c_pm_arch_stop_clocks(void) { }
-static inline void s3c_pm_arch_show_resume_irqs(void) { }
-
-/*
- * make these defines, we currently do not have any need to change
- * the IRQ wake controls depending on the CPU we are running on
- */
-#define s3c_irqwake_eintallow	((1 << 16) - 1)
-#define s3c_irqwake_intallow	(~0)
-
-static inline void s3c_pm_arch_update_uart(void __iomem *regs,
-					struct pm_uart_save *save)
-{
-	u32 ucon = __raw_readl(regs + S3C2410_UCON);
-	u32 ucon_clk = ucon & S3C6400_UCON_CLKMASK;
-	u32 save_clk = save->ucon & S3C6400_UCON_CLKMASK;
-	u32 new_ucon;
-	u32 delta;
-
-	/*
-	 * S5P64X0 UART blocks only support level interrupts, so ensure that
-	 * when we restore unused UART blocks we force the level interrupt
-	 * settings.
-	 */
-	save->ucon |= S3C2410_UCON_TXILEVEL | S3C2410_UCON_RXILEVEL;
-
-	/*
-	 * We have a constraint on changing the clock type of the UART
-	 * between UCLKx and PCLK, so ensure that when we restore UCON
-	 * that the CLK field is correctly modified if the bootloader
-	 * has changed anything.
-	 */
-	if (ucon_clk != save_clk) {
-		new_ucon = save->ucon;
-		delta = ucon_clk ^ save_clk;
-
-		/*
-		 * change from UCLKx => wrong PCLK,
-		 * either UCLK can be tested for by a bit-test
-		 * with UCLK0
-		 */
-		if (ucon_clk & S3C6400_UCON_UCLK0 &&
-		!(save_clk & S3C6400_UCON_UCLK0) &&
-		delta & S3C6400_UCON_PCLK2) {
-			new_ucon &= ~S3C6400_UCON_UCLK0;
-		} else if (delta == S3C6400_UCON_PCLK2) {
-			/*
-			 * as a precaution, don't change from
-			 * PCLK2 => PCLK or vice-versa
-			 */
-			new_ucon ^= S3C6400_UCON_PCLK2;
-		}
-
-		S3C_PMDBG("ucon change %04x => %04x (save=%04x)\n",
-			ucon, new_ucon, save->ucon);
-		save->ucon = new_ucon;
-	}
-}
-
-static inline void s3c_pm_restored_gpios(void)
-{
-	/* ensure sleep mode has been cleared from the system */
-	__raw_writel(0, S5P64X0_SLPEN);
-}
-
-static inline void samsung_pm_saved_gpios(void)
-{
-	/*
-	 * turn on the sleep mode and keep it there, as it seems that during
-	 * suspend the xCON registers get re-set and thus you can end up with
-	 * problems between going to sleep and resuming.
-	 */
-	__raw_writel(S5P64X0_SLPEN_USE_xSLP, S5P64X0_SLPEN);
-}
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-clock.h b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h
deleted file mode 100644
index bd91112..0000000
--- a/arch/arm/mach-s5p64x0/include/mach/regs-clock.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/regs-clock.h
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P64X0 - Clock register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_REGS_CLOCK_H
-#define __ASM_ARCH_REGS_CLOCK_H __FILE__
-
-#include <mach/map.h>
-
-#define S5P_CLKREG(x)			(S3C_VA_SYS + (x))
-
-#define S5P64X0_APLL_CON		S5P_CLKREG(0x0C)
-#define S5P64X0_MPLL_CON		S5P_CLKREG(0x10)
-#define S5P64X0_EPLL_CON		S5P_CLKREG(0x14)
-#define S5P64X0_EPLL_CON_K		S5P_CLKREG(0x18)
-
-#define S5P64X0_CLK_SRC0		S5P_CLKREG(0x1C)
-
-#define S5P64X0_CLK_DIV0		S5P_CLKREG(0x20)
-#define S5P64X0_CLK_DIV1		S5P_CLKREG(0x24)
-#define S5P64X0_CLK_DIV2		S5P_CLKREG(0x28)
-
-#define S5P64X0_CLK_GATE_HCLK0		S5P_CLKREG(0x30)
-#define S5P64X0_CLK_GATE_PCLK		S5P_CLKREG(0x34)
-#define S5P64X0_CLK_GATE_SCLK0		S5P_CLKREG(0x38)
-#define S5P64X0_CLK_GATE_MEM0		S5P_CLKREG(0x3C)
-
-#define S5P64X0_CLK_DIV3		S5P_CLKREG(0x40)
-
-#define S5P64X0_CLK_GATE_HCLK1		S5P_CLKREG(0x44)
-#define S5P64X0_CLK_GATE_SCLK1		S5P_CLKREG(0x48)
-
-#define S5P6450_DPLL_CON		S5P_CLKREG(0x50)
-#define S5P6450_DPLL_CON_K		S5P_CLKREG(0x54)
-
-#define S5P64X0_AHB_CON0		S5P_CLKREG(0x100)
-#define S5P64X0_CLK_SRC1		S5P_CLKREG(0x10C)
-
-#define S5P64X0_SYS_ID			S5P_CLKREG(0x118)
-#define S5P64X0_SYS_OTHERS		S5P_CLKREG(0x11C)
-
-#define S5P64X0_PWR_CFG			S5P_CLKREG(0x804)
-#define S5P64X0_EINT_WAKEUP_MASK	S5P_CLKREG(0x808)
-#define S5P64X0_SLEEP_CFG		S5P_CLKREG(0x818)
-#define S5P64X0_PWR_STABLE		S5P_CLKREG(0x828)
-
-#define S5P64X0_OTHERS			S5P_CLKREG(0x900)
-#define S5P64X0_WAKEUP_STAT		S5P_CLKREG(0x908)
-
-#define S5P64X0_INFORM0			S5P_CLKREG(0xA00)
-
-#define S5P64X0_CLKDIV0_HCLK_SHIFT	(8)
-#define S5P64X0_CLKDIV0_HCLK_MASK	(0xF << S5P64X0_CLKDIV0_HCLK_SHIFT)
-
-/* HCLK GATE Registers */
-#define S5P64X0_CLK_GATE_HCLK1_FIMGVG	(1 << 2)
-#define S5P64X0_CLK_GATE_SCLK1_FIMGVG	(1 << 2)
-
-/* PCLK GATE Registers */
-#define S5P64X0_CLK_GATE_PCLK_UART3	(1 << 4)
-#define S5P64X0_CLK_GATE_PCLK_UART2	(1 << 3)
-#define S5P64X0_CLK_GATE_PCLK_UART1	(1 << 2)
-#define S5P64X0_CLK_GATE_PCLK_UART0	(1 << 1)
-
-#define S5P64X0_PWR_CFG_MMC1_DISABLE		(1 << 15)
-#define S5P64X0_PWR_CFG_MMC0_DISABLE		(1 << 14)
-#define S5P64X0_PWR_CFG_RTC_TICK_DISABLE	(1 << 11)
-#define S5P64X0_PWR_CFG_RTC_ALRM_DISABLE	(1 << 10)
-#define S5P64X0_PWR_CFG_WFI_MASK		(3 << 5)
-#define S5P64X0_PWR_CFG_WFI_SLEEP		(3 << 5)
-
-#define S5P64X0_SLEEP_CFG_OSC_EN	(1 << 0)
-
-#define S5P64X0_PWR_STABLE_PWR_CNT_VAL4	(4 << 0)
-
-#define S5P6450_OTHERS_DISABLE_INT	(1 << 31)
-#define S5P64X0_OTHERS_RET_UART		(1 << 26)
-#define S5P64X0_OTHERS_RET_MMC1		(1 << 25)
-#define S5P64X0_OTHERS_RET_MMC0		(1 << 24)
-#define S5P64X0_OTHERS_USB_SIG_MASK	(1 << 16)
-
-/* Compatibility defines */
-
-#define ARM_CLK_DIV			S5P64X0_CLK_DIV0
-#define ARM_DIV_RATIO_SHIFT		0
-#define ARM_DIV_MASK			(0xF << ARM_DIV_RATIO_SHIFT)
-
-#define S5P_EPLL_CON			S5P64X0_EPLL_CON
-
-#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
deleted file mode 100644
index cfdfa4f..0000000
--- a/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
+++ /dev/null
@@ -1,68 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P64X0 - GPIO register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_REGS_GPIO_H
-#define __ASM_ARCH_REGS_GPIO_H __FILE__
-
-#include <mach/map.h>
-
-/* Base addresses for each of the banks */
-
-#define S5P64X0_GPA_BASE		(S5P_VA_GPIO + 0x0000)
-#define S5P64X0_GPB_BASE		(S5P_VA_GPIO + 0x0020)
-#define S5P64X0_GPC_BASE		(S5P_VA_GPIO + 0x0040)
-#define S5P64X0_GPF_BASE		(S5P_VA_GPIO + 0x00A0)
-#define S5P64X0_GPG_BASE		(S5P_VA_GPIO + 0x00C0)
-#define S5P64X0_GPH_BASE		(S5P_VA_GPIO + 0x00E0)
-#define S5P64X0_GPI_BASE		(S5P_VA_GPIO + 0x0100)
-#define S5P64X0_GPJ_BASE		(S5P_VA_GPIO + 0x0120)
-#define S5P64X0_GPN_BASE		(S5P_VA_GPIO + 0x0830)
-#define S5P64X0_GPP_BASE		(S5P_VA_GPIO + 0x0160)
-#define S5P64X0_GPR_BASE		(S5P_VA_GPIO + 0x0290)
-
-#define S5P6450_GPD_BASE		(S5P_VA_GPIO + 0x0060)
-#define S5P6450_GPK_BASE		(S5P_VA_GPIO + 0x0140)
-#define S5P6450_GPQ_BASE		(S5P_VA_GPIO + 0x0180)
-#define S5P6450_GPS_BASE		(S5P_VA_GPIO + 0x0300)
-
-#define S5P64X0_SPCON0			(S5P_VA_GPIO + 0x1A0)
-#define S5P64X0_SPCON0_LCD_SEL_MASK	(0x3 << 0)
-#define S5P64X0_SPCON0_LCD_SEL_RGB	(0x1 << 0)
-#define S5P64X0_SPCON1			(S5P_VA_GPIO + 0x2B0)
-
-#define S5P64X0_MEM0CONSLP0		(S5P_VA_GPIO + 0x1C0)
-#define S5P64X0_MEM0CONSLP1		(S5P_VA_GPIO + 0x1C4)
-#define S5P64X0_MEM0DRVCON		(S5P_VA_GPIO + 0x1D0)
-#define S5P64X0_MEM1DRVCON		(S5P_VA_GPIO + 0x1D4)
-
-#define S5P64X0_EINT12CON		(S5P_VA_GPIO + 0x200)
-#define S5P64X0_EINT12FLTCON		(S5P_VA_GPIO + 0x220)
-#define S5P64X0_EINT12MASK		(S5P_VA_GPIO + 0x240)
-
-/* External interrupt control registers for group0 */
-
-#define EINT0CON0_OFFSET		(0x900)
-#define EINT0FLTCON0_OFFSET		(0x910)
-#define EINT0FLTCON1_OFFSET		(0x914)
-#define EINT0MASK_OFFSET		(0x920)
-#define EINT0PEND_OFFSET		(0x924)
-
-#define S5P64X0_EINT0CON0		(S5P_VA_GPIO + EINT0CON0_OFFSET)
-#define S5P64X0_EINT0FLTCON0		(S5P_VA_GPIO + EINT0FLTCON0_OFFSET)
-#define S5P64X0_EINT0FLTCON1		(S5P_VA_GPIO + EINT0FLTCON1_OFFSET)
-#define S5P64X0_EINT0MASK		(S5P_VA_GPIO + EINT0MASK_OFFSET)
-#define S5P64X0_EINT0PEND		(S5P_VA_GPIO + EINT0PEND_OFFSET)
-
-#define S5P64X0_SLPEN			(S5P_VA_GPIO + 0x930)
-#define S5P64X0_SLPEN_USE_xSLP		(1 << 0)
-
-#endif /* __ASM_ARCH_REGS_GPIO_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-irq.h b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
deleted file mode 100644
index d60397d..0000000
--- a/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P64X0 - IRQ register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_REGS_IRQ_H
-#define __ASM_ARCH_REGS_IRQ_H __FILE__
-
-#include <mach/map.h>
-
-#endif /* __ASM_ARCH_REGS_IRQ_H */
diff --git a/arch/arm/mach-s5p64x0/irq-pm.c b/arch/arm/mach-s5p64x0/irq-pm.c
deleted file mode 100644
index 2ed921e..0000000
--- a/arch/arm/mach-s5p64x0/irq-pm.c
+++ /dev/null
@@ -1,98 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/irq-pm.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P64X0 - Interrupt handling Power Management
- *
- * Based on arch/arm/mach-s3c64xx/irq-pm.c by Ben Dooks
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/syscore_ops.h>
-#include <linux/serial_core.h>
-#include <linux/serial_s3c.h>
-#include <linux/io.h>
-
-#include <plat/pm.h>
-
-#include <mach/regs-gpio.h>
-
-static struct sleep_save irq_save[] = {
-	SAVE_ITEM(S5P64X0_EINT0CON0),
-	SAVE_ITEM(S5P64X0_EINT0FLTCON0),
-	SAVE_ITEM(S5P64X0_EINT0FLTCON1),
-	SAVE_ITEM(S5P64X0_EINT0MASK),
-};
-
-static struct irq_grp_save {
-	u32	con;
-	u32	fltcon;
-	u32	mask;
-} eint_grp_save[4];
-
-#ifdef CONFIG_SERIAL_SAMSUNG
-static u32 irq_uart_mask[CONFIG_SERIAL_SAMSUNG_UARTS];
-#endif
-
-static int s5p64x0_irq_pm_suspend(void)
-{
-	struct irq_grp_save *grp = eint_grp_save;
-	int i;
-
-	S3C_PMDBG("%s: suspending IRQs\n", __func__);
-
-	s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));
-
-#ifdef CONFIG_SERIAL_SAMSUNG
-	for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
-		irq_uart_mask[i] = __raw_readl(S3C_VA_UARTx(i) + S3C64XX_UINTM);
-#endif
-
-	for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
-		grp->con = __raw_readl(S5P64X0_EINT12CON + (i * 4));
-		grp->mask = __raw_readl(S5P64X0_EINT12MASK + (i * 4));
-		grp->fltcon = __raw_readl(S5P64X0_EINT12FLTCON + (i * 4));
-	}
-
-	return 0;
-}
-
-static void s5p64x0_irq_pm_resume(void)
-{
-	struct irq_grp_save *grp = eint_grp_save;
-	int i;
-
-	S3C_PMDBG("%s: resuming IRQs\n", __func__);
-
-	s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));
-
-#ifdef CONFIG_SERIAL_SAMSUNG
-	for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)
-		__raw_writel(irq_uart_mask[i], S3C_VA_UARTx(i) + S3C64XX_UINTM);
-#endif
-
-	for (i = 0; i < ARRAY_SIZE(eint_grp_save); i++, grp++) {
-		__raw_writel(grp->con, S5P64X0_EINT12CON + (i * 4));
-		__raw_writel(grp->mask, S5P64X0_EINT12MASK + (i * 4));
-		__raw_writel(grp->fltcon, S5P64X0_EINT12FLTCON + (i * 4));
-	}
-
-	S3C_PMDBG("%s: IRQ configuration restored\n", __func__);
-}
-
-static struct syscore_ops s5p64x0_irq_syscore_ops = {
-	.suspend = s5p64x0_irq_pm_suspend,
-	.resume  = s5p64x0_irq_pm_resume,
-};
-
-static int __init s5p64x0_syscore_init(void)
-{
-	register_syscore_ops(&s5p64x0_irq_syscore_ops);
-
-	return 0;
-}
-core_initcall(s5p64x0_syscore_init);
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
deleted file mode 100644
index 6840e19..0000000
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ /dev/null
@@ -1,280 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/mach-smdk6440.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/i2c.h>
-#include <linux/serial_core.h>
-#include <linux/serial_s3c.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/clk.h>
-#include <linux/gpio.h>
-#include <linux/pwm_backlight.h>
-#include <linux/fb.h>
-#include <linux/mmc/host.h>
-
-#include <video/platform_lcd.h>
-#include <video/samsung_fimd.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/irq.h>
-#include <asm/mach-types.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <mach/regs-clock.h>
-#include <mach/regs-gpio.h>
-
-#include <plat/gpio-cfg.h>
-#include <plat/clock.h>
-#include <plat/devs.h>
-#include <plat/cpu.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <plat/pll.h>
-#include <plat/adc.h>
-#include <linux/platform_data/touchscreen-s3c2410.h>
-#include <plat/samsung-time.h>
-#include <plat/backlight.h>
-#include <plat/fb.h>
-#include <plat/sdhci.h>
-
-#include "common.h"
-#include "i2c.h"
-
-#define SMDK6440_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
-				S3C2410_UCON_RXILEVEL |		\
-				S3C2410_UCON_TXIRQMODE |	\
-				S3C2410_UCON_RXIRQMODE |	\
-				S3C2410_UCON_RXFIFO_TOI |	\
-				S3C2443_UCON_RXERR_IRQEN)
-
-#define SMDK6440_ULCON_DEFAULT	S3C2410_LCON_CS8
-
-#define SMDK6440_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\
-				S3C2440_UFCON_TXTRIG16 |	\
-				S3C2410_UFCON_RXTRIG8)
-
-static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
-	[0] = {
-		.hwport		= 0,
-		.flags		= 0,
-		.ucon		= SMDK6440_UCON_DEFAULT,
-		.ulcon		= SMDK6440_ULCON_DEFAULT,
-		.ufcon		= SMDK6440_UFCON_DEFAULT,
-	},
-	[1] = {
-		.hwport		= 1,
-		.flags		= 0,
-		.ucon		= SMDK6440_UCON_DEFAULT,
-		.ulcon		= SMDK6440_ULCON_DEFAULT,
-		.ufcon		= SMDK6440_UFCON_DEFAULT,
-	},
-	[2] = {
-		.hwport		= 2,
-		.flags		= 0,
-		.ucon		= SMDK6440_UCON_DEFAULT,
-		.ulcon		= SMDK6440_ULCON_DEFAULT,
-		.ufcon		= SMDK6440_UFCON_DEFAULT,
-	},
-	[3] = {
-		.hwport		= 3,
-		.flags		= 0,
-		.ucon		= SMDK6440_UCON_DEFAULT,
-		.ulcon		= SMDK6440_ULCON_DEFAULT,
-		.ufcon		= SMDK6440_UFCON_DEFAULT,
-	},
-};
-
-/* Frame Buffer */
-static struct s3c_fb_pd_win smdk6440_fb_win0 = {
-	.max_bpp	= 32,
-	.default_bpp	= 24,
-	.xres		= 800,
-	.yres		= 480,
-};
-
-static struct fb_videomode smdk6440_lcd_timing = {
-	.left_margin	= 8,
-	.right_margin	= 13,
-	.upper_margin	= 7,
-	.lower_margin	= 5,
-	.hsync_len	= 3,
-	.vsync_len	= 1,
-	.xres		= 800,
-	.yres		= 480,
-};
-
-static struct s3c_fb_platdata smdk6440_lcd_pdata __initdata = {
-	.win[0]		= &smdk6440_fb_win0,
-	.vtiming	= &smdk6440_lcd_timing,
-	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
-	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
-	.setup_gpio	= s5p64x0_fb_gpio_setup_24bpp,
-};
-
-/* LCD power controller */
-static void smdk6440_lte480_reset_power(struct plat_lcd_data *pd,
-					 unsigned int power)
-{
-	int err;
-
-	if (power) {
-		err = gpio_request(S5P6440_GPN(5), "GPN");
-		if (err) {
-			printk(KERN_ERR "failed to request GPN for lcd reset\n");
-			return;
-		}
-
-		gpio_direction_output(S5P6440_GPN(5), 1);
-		gpio_set_value(S5P6440_GPN(5), 0);
-		gpio_set_value(S5P6440_GPN(5), 1);
-		gpio_free(S5P6440_GPN(5));
-	}
-}
-
-static struct plat_lcd_data smdk6440_lcd_power_data = {
-	.set_power	= smdk6440_lte480_reset_power,
-};
-
-static struct platform_device smdk6440_lcd_lte480wv = {
-	.name			= "platform-lcd",
-	.dev.parent		= &s3c_device_fb.dev,
-	.dev.platform_data	= &smdk6440_lcd_power_data,
-};
-
-static struct platform_device *smdk6440_devices[] __initdata = {
-	&s3c_device_adc,
-	&s3c_device_rtc,
-	&s3c_device_i2c0,
-	&s3c_device_i2c1,
-	&samsung_device_pwm,
-	&s3c_device_ts,
-	&s3c_device_wdt,
-	&s5p6440_device_iis,
-	&s3c_device_fb,
-	&smdk6440_lcd_lte480wv,
-	&s3c_device_hsmmc0,
-	&s3c_device_hsmmc1,
-	&s3c_device_hsmmc2,
-};
-
-static struct s3c_sdhci_platdata smdk6440_hsmmc0_pdata __initdata = {
-	.cd_type	= S3C_SDHCI_CD_NONE,
-};
-
-static struct s3c_sdhci_platdata smdk6440_hsmmc1_pdata __initdata = {
-	.cd_type	= S3C_SDHCI_CD_INTERNAL,
-#if defined(CONFIG_S5P64X0_SD_CH1_8BIT)
-	.max_width	= 8,
-	.host_caps	= MMC_CAP_8_BIT_DATA,
-#endif
-};
-
-static struct s3c_sdhci_platdata smdk6440_hsmmc2_pdata __initdata = {
-	.cd_type	= S3C_SDHCI_CD_NONE,
-};
-
-static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = {
-	.flags		= 0,
-	.slave_addr	= 0x10,
-	.frequency	= 100*1000,
-	.sda_delay	= 100,
-	.cfg_gpio	= s5p6440_i2c0_cfg_gpio,
-};
-
-static struct s3c2410_platform_i2c s5p6440_i2c1_data __initdata = {
-	.flags		= 0,
-	.bus_num	= 1,
-	.slave_addr	= 0x10,
-	.frequency	= 100*1000,
-	.sda_delay	= 100,
-	.cfg_gpio	= s5p6440_i2c1_cfg_gpio,
-};
-
-static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = {
-	{ I2C_BOARD_INFO("24c08", 0x50), },
-	{ I2C_BOARD_INFO("wm8580", 0x1b), },
-};
-
-static struct i2c_board_info smdk6440_i2c_devs1[] __initdata = {
-	/* To be populated */
-};
-
-/* LCD Backlight data */
-static struct samsung_bl_gpio_info smdk6440_bl_gpio_info = {
-	.no = S5P6440_GPF(15),
-	.func = S3C_GPIO_SFN(2),
-};
-
-static struct platform_pwm_backlight_data smdk6440_bl_data = {
-	.pwm_id = 1,
-	.enable_gpio = -1,
-};
-
-static void __init smdk6440_map_io(void)
-{
-	s5p64x0_init_io(NULL, 0);
-	s3c24xx_init_clocks(12000000);
-	s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
-	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
-}
-
-static void s5p6440_set_lcd_interface(void)
-{
-	unsigned int cfg;
-
-	/* select TFT LCD type (RGB I/F) */
-	cfg = __raw_readl(S5P64X0_SPCON0);
-	cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK;
-	cfg |= S5P64X0_SPCON0_LCD_SEL_RGB;
-	__raw_writel(cfg, S5P64X0_SPCON0);
-}
-
-static void __init smdk6440_machine_init(void)
-{
-	s3c24xx_ts_set_platdata(NULL);
-
-	s3c_i2c0_set_platdata(&s5p6440_i2c0_data);
-	s3c_i2c1_set_platdata(&s5p6440_i2c1_data);
-	i2c_register_board_info(0, smdk6440_i2c_devs0,
-			ARRAY_SIZE(smdk6440_i2c_devs0));
-	i2c_register_board_info(1, smdk6440_i2c_devs1,
-			ARRAY_SIZE(smdk6440_i2c_devs1));
-
-	s5p6440_set_lcd_interface();
-	s3c_fb_set_platdata(&smdk6440_lcd_pdata);
-
-	s3c_sdhci0_set_platdata(&smdk6440_hsmmc0_pdata);
-	s3c_sdhci1_set_platdata(&smdk6440_hsmmc1_pdata);
-	s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata);
-
-	platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
-
-	samsung_bl_set(&smdk6440_bl_gpio_info, &smdk6440_bl_data);
-}
-
-MACHINE_START(SMDK6440, "SMDK6440")
-	/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
-	.atag_offset	= 0x100,
-
-	.init_irq	= s5p6440_init_irq,
-	.map_io		= smdk6440_map_io,
-	.init_machine	= smdk6440_machine_init,
-	.init_time	= samsung_timer_init,
-	.restart	= s5p64x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
deleted file mode 100644
index fa1341c..0000000
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ /dev/null
@@ -1,299 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/mach-smdk6450.c
- *
- * Copyright (c) 2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/delay.h>
-#include <linux/init.h>
-#include <linux/i2c.h>
-#include <linux/serial_core.h>
-#include <linux/serial_s3c.h>
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/module.h>
-#include <linux/clk.h>
-#include <linux/gpio.h>
-#include <linux/pwm_backlight.h>
-#include <linux/fb.h>
-#include <linux/mmc/host.h>
-
-#include <video/platform_lcd.h>
-#include <video/samsung_fimd.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/irq.h>
-#include <asm/mach-types.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <mach/regs-clock.h>
-#include <mach/regs-gpio.h>
-
-#include <plat/gpio-cfg.h>
-#include <plat/clock.h>
-#include <plat/devs.h>
-#include <plat/cpu.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-#include <plat/pll.h>
-#include <plat/adc.h>
-#include <linux/platform_data/touchscreen-s3c2410.h>
-#include <plat/samsung-time.h>
-#include <plat/backlight.h>
-#include <plat/fb.h>
-#include <plat/sdhci.h>
-
-#include "common.h"
-#include "i2c.h"
-
-#define SMDK6450_UCON_DEFAULT	(S3C2410_UCON_TXILEVEL |	\
-				S3C2410_UCON_RXILEVEL |		\
-				S3C2410_UCON_TXIRQMODE |	\
-				S3C2410_UCON_RXIRQMODE |	\
-				S3C2410_UCON_RXFIFO_TOI |	\
-				S3C2443_UCON_RXERR_IRQEN)
-
-#define SMDK6450_ULCON_DEFAULT	S3C2410_LCON_CS8
-
-#define SMDK6450_UFCON_DEFAULT	(S3C2410_UFCON_FIFOMODE |	\
-				S3C2440_UFCON_TXTRIG16 |	\
-				S3C2410_UFCON_RXTRIG8)
-
-static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = {
-	[0] = {
-		.hwport		= 0,
-		.flags		= 0,
-		.ucon		= SMDK6450_UCON_DEFAULT,
-		.ulcon		= SMDK6450_ULCON_DEFAULT,
-		.ufcon		= SMDK6450_UFCON_DEFAULT,
-	},
-	[1] = {
-		.hwport		= 1,
-		.flags		= 0,
-		.ucon		= SMDK6450_UCON_DEFAULT,
-		.ulcon		= SMDK6450_ULCON_DEFAULT,
-		.ufcon		= SMDK6450_UFCON_DEFAULT,
-	},
-	[2] = {
-		.hwport		= 2,
-		.flags		= 0,
-		.ucon		= SMDK6450_UCON_DEFAULT,
-		.ulcon		= SMDK6450_ULCON_DEFAULT,
-		.ufcon		= SMDK6450_UFCON_DEFAULT,
-	},
-	[3] = {
-		.hwport		= 3,
-		.flags		= 0,
-		.ucon		= SMDK6450_UCON_DEFAULT,
-		.ulcon		= SMDK6450_ULCON_DEFAULT,
-		.ufcon		= SMDK6450_UFCON_DEFAULT,
-	},
-#if CONFIG_SERIAL_SAMSUNG_UARTS > 4
-	[4] = {
-		.hwport		= 4,
-		.flags		= 0,
-		.ucon		= SMDK6450_UCON_DEFAULT,
-		.ulcon		= SMDK6450_ULCON_DEFAULT,
-		.ufcon		= SMDK6450_UFCON_DEFAULT,
-	},
-#endif
-#if CONFIG_SERIAL_SAMSUNG_UARTS > 5
-	[5] = {
-		.hwport		= 5,
-		.flags		= 0,
-		.ucon		= SMDK6450_UCON_DEFAULT,
-		.ulcon		= SMDK6450_ULCON_DEFAULT,
-		.ufcon		= SMDK6450_UFCON_DEFAULT,
-	},
-#endif
-};
-
-/* Frame Buffer */
-static struct s3c_fb_pd_win smdk6450_fb_win0 = {
-	.max_bpp	= 32,
-	.default_bpp	= 24,
-	.xres		= 800,
-	.yres		= 480,
-};
-
-static struct fb_videomode smdk6450_lcd_timing = {
-	.left_margin	= 8,
-	.right_margin	= 13,
-	.upper_margin	= 7,
-	.lower_margin	= 5,
-	.hsync_len	= 3,
-	.vsync_len	= 1,
-	.xres		= 800,
-	.yres		= 480,
-};
-
-static struct s3c_fb_platdata smdk6450_lcd_pdata __initdata = {
-	.win[0]		= &smdk6450_fb_win0,
-	.vtiming	= &smdk6450_lcd_timing,
-	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
-	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
-	.setup_gpio	= s5p64x0_fb_gpio_setup_24bpp,
-};
-
-/* LCD power controller */
-static void smdk6450_lte480_reset_power(struct plat_lcd_data *pd,
-					 unsigned int power)
-{
-	int err;
-
-	if (power) {
-		err = gpio_request(S5P6450_GPN(5), "GPN");
-		if (err) {
-			printk(KERN_ERR "failed to request GPN for lcd reset\n");
-			return;
-		}
-
-		gpio_direction_output(S5P6450_GPN(5), 1);
-		gpio_set_value(S5P6450_GPN(5), 0);
-		gpio_set_value(S5P6450_GPN(5), 1);
-		gpio_free(S5P6450_GPN(5));
-	}
-}
-
-static struct plat_lcd_data smdk6450_lcd_power_data = {
-	.set_power	= smdk6450_lte480_reset_power,
-};
-
-static struct platform_device smdk6450_lcd_lte480wv = {
-	.name			= "platform-lcd",
-	.dev.parent		= &s3c_device_fb.dev,
-	.dev.platform_data	= &smdk6450_lcd_power_data,
-};
-
-static struct platform_device *smdk6450_devices[] __initdata = {
-	&s3c_device_adc,
-	&s3c_device_rtc,
-	&s3c_device_i2c0,
-	&s3c_device_i2c1,
-	&samsung_device_pwm,
-	&s3c_device_ts,
-	&s3c_device_wdt,
-	&s5p6450_device_iis0,
-	&s3c_device_fb,
-	&smdk6450_lcd_lte480wv,
-	&s3c_device_hsmmc0,
-	&s3c_device_hsmmc1,
-	&s3c_device_hsmmc2,
-	/* s5p6450_device_spi0 will be added */
-};
-
-static struct s3c_sdhci_platdata smdk6450_hsmmc0_pdata __initdata = {
-	.cd_type	= S3C_SDHCI_CD_NONE,
-};
-
-static struct s3c_sdhci_platdata smdk6450_hsmmc1_pdata __initdata = {
-	.cd_type	= S3C_SDHCI_CD_NONE,
-#if defined(CONFIG_S5P64X0_SD_CH1_8BIT)
-	.max_width	= 8,
-	.host_caps	= MMC_CAP_8_BIT_DATA,
-#endif
-};
-
-static struct s3c_sdhci_platdata smdk6450_hsmmc2_pdata __initdata = {
-	.cd_type	= S3C_SDHCI_CD_NONE,
-};
-
-static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = {
-	.flags		= 0,
-	.slave_addr	= 0x10,
-	.frequency	= 100*1000,
-	.sda_delay	= 100,
-	.cfg_gpio	= s5p6450_i2c0_cfg_gpio,
-};
-
-static struct s3c2410_platform_i2c s5p6450_i2c1_data __initdata = {
-	.flags		= 0,
-	.bus_num	= 1,
-	.slave_addr	= 0x10,
-	.frequency	= 100*1000,
-	.sda_delay	= 100,
-	.cfg_gpio	= s5p6450_i2c1_cfg_gpio,
-};
-
-static struct i2c_board_info smdk6450_i2c_devs0[] __initdata = {
-	{ I2C_BOARD_INFO("wm8580", 0x1b), },
-	{ I2C_BOARD_INFO("24c08", 0x50), },	/* Samsung KS24C080C EEPROM */
-};
-
-static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = {
-	{ I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */
-};
-
-/* LCD Backlight data */
-static struct samsung_bl_gpio_info smdk6450_bl_gpio_info = {
-	.no = S5P6450_GPF(15),
-	.func = S3C_GPIO_SFN(2),
-};
-
-static struct platform_pwm_backlight_data smdk6450_bl_data = {
-	.pwm_id = 1,
-	.enable_gpio = -1,
-};
-
-static void __init smdk6450_map_io(void)
-{
-	s5p64x0_init_io(NULL, 0);
-	s3c24xx_init_clocks(19200000);
-	s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
-	samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
-}
-
-static void s5p6450_set_lcd_interface(void)
-{
-	unsigned int cfg;
-
-	/* select TFT LCD type (RGB I/F) */
-	cfg = __raw_readl(S5P64X0_SPCON0);
-	cfg &= ~S5P64X0_SPCON0_LCD_SEL_MASK;
-	cfg |= S5P64X0_SPCON0_LCD_SEL_RGB;
-	__raw_writel(cfg, S5P64X0_SPCON0);
-}
-
-static void __init smdk6450_machine_init(void)
-{
-	s3c24xx_ts_set_platdata(NULL);
-
-	s3c_i2c0_set_platdata(&s5p6450_i2c0_data);
-	s3c_i2c1_set_platdata(&s5p6450_i2c1_data);
-	i2c_register_board_info(0, smdk6450_i2c_devs0,
-			ARRAY_SIZE(smdk6450_i2c_devs0));
-	i2c_register_board_info(1, smdk6450_i2c_devs1,
-			ARRAY_SIZE(smdk6450_i2c_devs1));
-
-	s5p6450_set_lcd_interface();
-	s3c_fb_set_platdata(&smdk6450_lcd_pdata);
-
-	s3c_sdhci0_set_platdata(&smdk6450_hsmmc0_pdata);
-	s3c_sdhci1_set_platdata(&smdk6450_hsmmc1_pdata);
-	s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata);
-
-	platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
-
-	samsung_bl_set(&smdk6450_bl_gpio_info, &smdk6450_bl_data);
-}
-
-MACHINE_START(SMDK6450, "SMDK6450")
-	/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
-	.atag_offset	= 0x100,
-
-	.init_irq	= s5p6450_init_irq,
-	.map_io		= smdk6450_map_io,
-	.init_machine	= smdk6450_machine_init,
-	.init_time	= samsung_timer_init,
-	.restart	= s5p64x0_restart,
-MACHINE_END
diff --git a/arch/arm/mach-s5p64x0/pm.c b/arch/arm/mach-s5p64x0/pm.c
deleted file mode 100644
index ec8229c..0000000
--- a/arch/arm/mach-s5p64x0/pm.c
+++ /dev/null
@@ -1,202 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/pm.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * S5P64X0 Power Management Support
- *
- * Based on arch/arm/mach-s3c64xx/pm.c by Ben Dooks
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/suspend.h>
-#include <linux/syscore_ops.h>
-#include <linux/io.h>
-
-#include <plat/cpu.h>
-#include <plat/pm.h>
-#include <plat/wakeup-mask.h>
-
-#include <mach/regs-clock.h>
-#include <mach/regs-gpio.h>
-
-static struct sleep_save s5p64x0_core_save[] = {
-	SAVE_ITEM(S5P64X0_APLL_CON),
-	SAVE_ITEM(S5P64X0_MPLL_CON),
-	SAVE_ITEM(S5P64X0_EPLL_CON),
-	SAVE_ITEM(S5P64X0_EPLL_CON_K),
-	SAVE_ITEM(S5P64X0_CLK_SRC0),
-	SAVE_ITEM(S5P64X0_CLK_SRC1),
-	SAVE_ITEM(S5P64X0_CLK_DIV0),
-	SAVE_ITEM(S5P64X0_CLK_DIV1),
-	SAVE_ITEM(S5P64X0_CLK_DIV2),
-	SAVE_ITEM(S5P64X0_CLK_DIV3),
-	SAVE_ITEM(S5P64X0_CLK_GATE_MEM0),
-	SAVE_ITEM(S5P64X0_CLK_GATE_HCLK1),
-	SAVE_ITEM(S5P64X0_CLK_GATE_SCLK1),
-};
-
-static struct sleep_save s5p64x0_misc_save[] = {
-	SAVE_ITEM(S5P64X0_AHB_CON0),
-	SAVE_ITEM(S5P64X0_SPCON0),
-	SAVE_ITEM(S5P64X0_SPCON1),
-	SAVE_ITEM(S5P64X0_MEM0CONSLP0),
-	SAVE_ITEM(S5P64X0_MEM0CONSLP1),
-	SAVE_ITEM(S5P64X0_MEM0DRVCON),
-	SAVE_ITEM(S5P64X0_MEM1DRVCON),
-};
-
-/* DPLL is present only in S5P6450 */
-static struct sleep_save s5p6450_core_save[] = {
-	SAVE_ITEM(S5P6450_DPLL_CON),
-	SAVE_ITEM(S5P6450_DPLL_CON_K),
-};
-
-void s3c_pm_configure_extint(void)
-{
-	__raw_writel(s3c_irqwake_eintmask, S5P64X0_EINT_WAKEUP_MASK);
-}
-
-void s3c_pm_restore_core(void)
-{
-	__raw_writel(0, S5P64X0_EINT_WAKEUP_MASK);
-
-	s3c_pm_do_restore_core(s5p64x0_core_save,
-				ARRAY_SIZE(s5p64x0_core_save));
-
-	if (soc_is_s5p6450())
-		s3c_pm_do_restore_core(s5p6450_core_save,
-				ARRAY_SIZE(s5p6450_core_save));
-
-	s3c_pm_do_restore(s5p64x0_misc_save, ARRAY_SIZE(s5p64x0_misc_save));
-}
-
-void s3c_pm_save_core(void)
-{
-	s3c_pm_do_save(s5p64x0_misc_save, ARRAY_SIZE(s5p64x0_misc_save));
-
-	if (soc_is_s5p6450())
-		s3c_pm_do_save(s5p6450_core_save,
-				ARRAY_SIZE(s5p6450_core_save));
-
-	s3c_pm_do_save(s5p64x0_core_save, ARRAY_SIZE(s5p64x0_core_save));
-}
-
-static int s5p64x0_cpu_suspend(unsigned long arg)
-{
-	unsigned long tmp = 0;
-
-	/*
-	 * Issue the standby signal into the pm unit. Note, we
-	 * issue a write-buffer drain just in case.
-	 */
-	asm("b 1f\n\t"
-	    ".align 5\n\t"
-	    "1:\n\t"
-	    "mcr p15, 0, %0, c7, c10, 5\n\t"
-	    "mcr p15, 0, %0, c7, c10, 4\n\t"
-	    "mcr p15, 0, %0, c7, c0, 4" : : "r" (tmp));
-
-	pr_info("Failed to suspend the system\n");
-	return 1; /* Aborting suspend */
-}
-
-/* mapping of interrupts to parts of the wakeup mask */
-static struct samsung_wakeup_mask s5p64x0_wake_irqs[] = {
-	{ .irq = IRQ_RTC_ALARM,	.bit = S5P64X0_PWR_CFG_RTC_ALRM_DISABLE, },
-	{ .irq = IRQ_RTC_TIC,	.bit = S5P64X0_PWR_CFG_RTC_TICK_DISABLE, },
-	{ .irq = IRQ_HSMMC0,	.bit = S5P64X0_PWR_CFG_MMC0_DISABLE, },
-	{ .irq = IRQ_HSMMC1,	.bit = S5P64X0_PWR_CFG_MMC1_DISABLE, },
-};
-
-static void s5p64x0_pm_prepare(void)
-{
-	u32 tmp;
-
-	samsung_sync_wakemask(S5P64X0_PWR_CFG,
-			s5p64x0_wake_irqs, ARRAY_SIZE(s5p64x0_wake_irqs));
-
-	/* store the resume address in INFORM0 register */
-	__raw_writel(virt_to_phys(s3c_cpu_resume), S5P64X0_INFORM0);
-
-	/* setup clock gating for FIMGVG block */
-	__raw_writel((__raw_readl(S5P64X0_CLK_GATE_HCLK1) | \
-		(S5P64X0_CLK_GATE_HCLK1_FIMGVG)), S5P64X0_CLK_GATE_HCLK1);
-	__raw_writel((__raw_readl(S5P64X0_CLK_GATE_SCLK1) | \
-		(S5P64X0_CLK_GATE_SCLK1_FIMGVG)), S5P64X0_CLK_GATE_SCLK1);
-
-	/* Configure the stabilization counter with wait time required */
-	__raw_writel(S5P64X0_PWR_STABLE_PWR_CNT_VAL4, S5P64X0_PWR_STABLE);
-
-	/* set WFI to SLEEP mode configuration */
-	tmp = __raw_readl(S5P64X0_SLEEP_CFG);
-	tmp &= ~(S5P64X0_SLEEP_CFG_OSC_EN);
-	__raw_writel(tmp, S5P64X0_SLEEP_CFG);
-
-	tmp = __raw_readl(S5P64X0_PWR_CFG);
-	tmp &= ~(S5P64X0_PWR_CFG_WFI_MASK);
-	tmp |= S5P64X0_PWR_CFG_WFI_SLEEP;
-	__raw_writel(tmp, S5P64X0_PWR_CFG);
-
-	/*
-	 * set OTHERS register to disable interrupt before going to
-	 * sleep. This bit is present only in S5P6450, it is reserved
-	 * in S5P6440.
-	 */
-	if (soc_is_s5p6450()) {
-		tmp = __raw_readl(S5P64X0_OTHERS);
-		tmp |= S5P6450_OTHERS_DISABLE_INT;
-		__raw_writel(tmp, S5P64X0_OTHERS);
-	}
-
-	/* ensure previous wakeup state is cleared before sleeping */
-	__raw_writel(__raw_readl(S5P64X0_WAKEUP_STAT), S5P64X0_WAKEUP_STAT);
-
-}
-
-static int s5p64x0_pm_add(struct device *dev, struct subsys_interface *sif)
-{
-	pm_cpu_prep = s5p64x0_pm_prepare;
-	pm_cpu_sleep = s5p64x0_cpu_suspend;
-
-	return 0;
-}
-
-static struct subsys_interface s5p64x0_pm_interface = {
-	.name		= "s5p64x0_pm",
-	.subsys		= &s5p64x0_subsys,
-	.add_dev	= s5p64x0_pm_add,
-};
-
-static __init int s5p64x0_pm_drvinit(void)
-{
-	s3c_pm_init();
-
-	return subsys_interface_register(&s5p64x0_pm_interface);
-}
-arch_initcall(s5p64x0_pm_drvinit);
-
-static void s5p64x0_pm_resume(void)
-{
-	u32 tmp;
-
-	tmp = __raw_readl(S5P64X0_OTHERS);
-	tmp |= (S5P64X0_OTHERS_RET_MMC0 | S5P64X0_OTHERS_RET_MMC1 | \
-			S5P64X0_OTHERS_RET_UART);
-	__raw_writel(tmp , S5P64X0_OTHERS);
-}
-
-static struct syscore_ops s5p64x0_pm_syscore_ops = {
-	.resume		= s5p64x0_pm_resume,
-};
-
-static __init int s5p64x0_pm_syscore_init(void)
-{
-	register_syscore_ops(&s5p64x0_pm_syscore_ops);
-
-	return 0;
-}
-arch_initcall(s5p64x0_pm_syscore_init);
diff --git a/arch/arm/mach-s5p64x0/setup-fb-24bpp.c b/arch/arm/mach-s5p64x0/setup-fb-24bpp.c
deleted file mode 100644
index f346ee4..0000000
--- a/arch/arm/mach-s5p64x0/setup-fb-24bpp.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/setup-fb-24bpp.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- *             http://www.samsung.com/
- *
- * Base S5P64X0 GPIO setup information for LCD framebuffer
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/fb.h>
-#include <linux/gpio.h>
-
-#include <plat/cpu.h>
-#include <plat/fb.h>
-#include <plat/gpio-cfg.h>
-
-void s5p64x0_fb_gpio_setup_24bpp(void)
-{
-	if (soc_is_s5p6440()) {
-		s3c_gpio_cfgrange_nopull(S5P6440_GPI(0), 16, S3C_GPIO_SFN(2));
-		s3c_gpio_cfgrange_nopull(S5P6440_GPJ(0), 12, S3C_GPIO_SFN(2));
-	} else if (soc_is_s5p6450()) {
-		s3c_gpio_cfgrange_nopull(S5P6450_GPI(0), 16, S3C_GPIO_SFN(2));
-		s3c_gpio_cfgrange_nopull(S5P6450_GPJ(0), 12, S3C_GPIO_SFN(2));
-	}
-}
diff --git a/arch/arm/mach-s5p64x0/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c
deleted file mode 100644
index 569b76a..0000000
--- a/arch/arm/mach-s5p64x0/setup-i2c0.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/setup-i2c0.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * I2C0 GPIO configuration.
- *
- * Based on plat-s3c64x0/setup-i2c0.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/gpio.h>
-
-struct platform_device; /* don't need the contents */
-
-#include <plat/gpio-cfg.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-
-#include "i2c.h"
-
-void s5p6440_i2c0_cfg_gpio(struct platform_device *dev)
-{
-	s3c_gpio_cfgall_range(S5P6440_GPB(5), 2,
-			      S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-}
-
-void s5p6450_i2c0_cfg_gpio(struct platform_device *dev)
-{
-	s3c_gpio_cfgall_range(S5P6450_GPB(5), 2,
-			      S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-}
-
-void s3c_i2c0_cfg_gpio(struct platform_device *dev) { }
diff --git a/arch/arm/mach-s5p64x0/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c
deleted file mode 100644
index 867374e..0000000
--- a/arch/arm/mach-s5p64x0/setup-i2c1.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/* linux/arch/arm/mach-s5p64xx/setup-i2c1.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com
- *
- * I2C1 GPIO configuration.
- *
- * Based on plat-s3c64xx/setup-i2c0.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/gpio.h>
-
-struct platform_device; /* don't need the contents */
-
-#include <plat/gpio-cfg.h>
-#include <linux/platform_data/i2c-s3c2410.h>
-
-#include "i2c.h"
-
-void s5p6440_i2c1_cfg_gpio(struct platform_device *dev)
-{
-	s3c_gpio_cfgall_range(S5P6440_GPR(9), 2,
-			      S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP);
-}
-
-void s5p6450_i2c1_cfg_gpio(struct platform_device *dev)
-{
-	s3c_gpio_cfgall_range(S5P6450_GPR(9), 2,
-			      S3C_GPIO_SFN(6), S3C_GPIO_PULL_UP);
-}
-
-void s3c_i2c1_cfg_gpio(struct platform_device *dev) { }
diff --git a/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c b/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c
deleted file mode 100644
index 8410af0..0000000
--- a/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c
+++ /dev/null
@@ -1,104 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c
- *
- * Copyright (c) 2011 Samsung Electronics Co., Ltd.
- *		http://www.samsung.com/
- *
- * S5P64X0 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/platform_device.h>
-#include <linux/io.h>
-#include <linux/gpio.h>
-
-#include <mach/regs-gpio.h>
-#include <mach/regs-clock.h>
-
-#include <plat/gpio-cfg.h>
-#include <plat/sdhci.h>
-#include <plat/cpu.h>
-
-void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
-{
-	struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
-
-	/* Set all the necessary GPG pins to special-function 2 */
-	if (soc_is_s5p6450())
-		s3c_gpio_cfgrange_nopull(S5P6450_GPG(0), 2 + width,
-					 S3C_GPIO_SFN(2));
-	else
-		s3c_gpio_cfgrange_nopull(S5P6440_GPG(0), 2 + width,
-					 S3C_GPIO_SFN(2));
-
-	/* Set GPG[6] pin to special-function 2 - MMC0 CDn */
-	if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
-		if (soc_is_s5p6450()) {
-			s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP);
-			s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(2));
-		} else {
-			s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP);
-			s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(2));
-		}
-	}
-}
-
-void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
-{
-	struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
-
-	/* Set GPH[0:1] pins to special-function 2 - CLK and CMD */
-	if (soc_is_s5p6450())
-		s3c_gpio_cfgrange_nopull(S5P6450_GPH(0), 2, S3C_GPIO_SFN(2));
-	else
-		s3c_gpio_cfgrange_nopull(S5P6440_GPH(0), 2 , S3C_GPIO_SFN(2));
-
-	switch (width) {
-	case 8:
-		/* Set data pins GPH[6:9] special-function 2 */
-		if (soc_is_s5p6450())
-			s3c_gpio_cfgrange_nopull(S5P6450_GPH(6), 4,
-						 S3C_GPIO_SFN(2));
-		else
-			s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4,
-						 S3C_GPIO_SFN(2));
-	case 4:
-		/* set data pins GPH[2:5] special-function 2 */
-		if (soc_is_s5p6450())
-			s3c_gpio_cfgrange_nopull(S5P6450_GPH(2), 4,
-						 S3C_GPIO_SFN(2));
-		else
-			s3c_gpio_cfgrange_nopull(S5P6440_GPH(2), 4,
-						 S3C_GPIO_SFN(2));
-	default:
-		break;
-	}
-
-	/* Set GPG[6] pin to special-funtion 3 : MMC1 CDn */
-	if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
-		if (soc_is_s5p6450()) {
-			s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP);
-			s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(3));
-		} else {
-			s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP);
-			s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(3));
-		}
-	}
-}
-
-void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
-{
-	/* Set GPC[4:5] pins to special-function 3 - CLK and CMD */
-	s3c_gpio_cfgrange_nopull(S5P6440_GPC(4), 2, S3C_GPIO_SFN(3));
-
-	/* Set data pins GPH[6:9] pins to special-function 3 */
-	s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4, S3C_GPIO_SFN(3));
-}
-
-void s5p6450_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
-{
-	/* Set all the necessary GPG pins to special-function 3 */
-	s3c_gpio_cfgrange_nopull(S5P6450_GPG(7), 2 + width, S3C_GPIO_SFN(3));
-}
diff --git a/arch/arm/mach-s5p64x0/setup-spi.c b/arch/arm/mach-s5p64x0/setup-spi.c
deleted file mode 100644
index 7664356..0000000
--- a/arch/arm/mach-s5p64x0/setup-spi.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/* linux/arch/arm/mach-s5p64x0/setup-spi.c
- *
- * Copyright (C) 2011 Samsung Electronics Ltd.
- *		http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/gpio.h>
-#include <plat/gpio-cfg.h>
-
-#ifdef CONFIG_S3C64XX_DEV_SPI0
-int s3c64xx_spi0_cfg_gpio(void)
-{
-	if (soc_is_s5p6450())
-		s3c_gpio_cfgall_range(S5P6450_GPC(0), 3,
-					S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-	else
-		s3c_gpio_cfgall_range(S5P6440_GPC(0), 3,
-					S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-	return 0;
-}
-#endif
-
-#ifdef CONFIG_S3C64XX_DEV_SPI1
-int s3c64xx_spi1_cfg_gpio(void)
-{
-	if (soc_is_s5p6450())
-		s3c_gpio_cfgall_range(S5P6450_GPC(4), 3,
-					S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-	else
-		s3c_gpio_cfgall_range(S5P6440_GPC(4), 3,
-					S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
-	return 0;
-}
-#endif
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 301b892..d2d375b 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -15,7 +15,7 @@
 
 config PLAT_S5P
 	bool
-	depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
+	depends on (ARCH_S5PC100 || ARCH_S5PV210)
 	default y
 	select ARCH_REQUIRE_GPIOLIB
 	select ARM_VIC
@@ -29,7 +29,7 @@
 
 config SAMSUNG_PM
 	bool
-	depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || S5P_PM)
+	depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || S5P_PM)
 	default y
 	help
 	  Base platform power management code for samsung code
@@ -78,14 +78,14 @@
 	  used by newer systems such as the S3C64XX.
 
 config S5P_CLOCK
-	def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
+	def_bool (ARCH_S5PC100 || ARCH_S5PV210)
 	help
 	  Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs
 
 # options for IRQ support
 
 config S5P_IRQ
-	def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
+	def_bool (ARCH_S5PC100 || ARCH_S5PV210)
 	help
 	  Support common interrupt part for ARCH_S5P SoCs
 
@@ -93,7 +93,6 @@
 	bool
 	help
 	  Use the external interrupts (other than GPIO interrupts.)
-	  Note: Do not choose this for S5P6440 and S5P6450.
 
 config S5P_GPIO_INT
 	bool
@@ -143,7 +142,7 @@
 
 config S5P_DEV_UART
 	def_bool y
-	depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
+	depends on (ARCH_S5PC100 || ARCH_S5PV210)
 
 # ADC driver
 
@@ -397,7 +396,7 @@
 
 config SAMSUNG_DMADEV
 	bool "Use legacy Samsung DMA abstraction"
-	depends on CPU_S5PV210 || CPU_S5PC100 || ARCH_S5P64X0 || ARCH_S3C64XX
+	depends on CPU_S5PV210 || CPU_S5PC100 || ARCH_S3C64XX
 	select DMADEVICES
 	default y
 	help
@@ -474,7 +473,6 @@
 	bool
 	help
 	  Common code for power management support on S5P and newer SoCs
-	  Note: Do not select this for S5P6440 and S5P6450.
 
 config S5P_SLEEP
 	bool
diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c
index 79690f2..8033561 100644
--- a/arch/arm/plat-samsung/adc.c
+++ b/arch/arm/plat-samsung/adc.c
@@ -43,7 +43,7 @@
 	TYPE_ADCV1, /* S3C24XX */
 	TYPE_ADCV11, /* S3C2443 */
 	TYPE_ADCV12, /* S3C2416, S3C2450 */
-	TYPE_ADCV2, /* S3C64XX, S5P64X0, S5PC100 */
+	TYPE_ADCV2, /* S3C64XX, S5PC100 */
 	TYPE_ADCV3, /* S5PV210, S5PC110, EXYNOS4210 */
 };
 
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 5a237db..18e4365 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -33,10 +33,6 @@
 #define S3C6410_CPU_ID		0x36410000
 #define S3C64XX_CPU_MASK	0xFFFFF000
 
-#define S5P6440_CPU_ID		0x56440000
-#define S5P6450_CPU_ID		0x36450000
-#define S5P64XX_CPU_MASK	0xFFFFF000
-
 #define S5PC100_CPU_ID		0x43100000
 #define S5PC100_CPU_MASK	0xFFFFF000
 
@@ -54,8 +50,6 @@
 IS_SAMSUNG_CPU(s3c2412, S3C2412_CPU_ID, S3C2412_CPU_MASK)
 IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK)
 IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK)
-IS_SAMSUNG_CPU(s5p6440, S5P6440_CPU_ID, S5P64XX_CPU_MASK)
-IS_SAMSUNG_CPU(s5p6450, S5P6450_CPU_ID, S5P64XX_CPU_MASK)
 IS_SAMSUNG_CPU(s5pc100, S5PC100_CPU_ID, S5PC100_CPU_MASK)
 IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
 
@@ -86,18 +80,6 @@
 # define soc_is_s3c64xx()	0
 #endif
 
-#if defined(CONFIG_CPU_S5P6440)
-# define soc_is_s5p6440()	is_samsung_s5p6440()
-#else
-# define soc_is_s5p6440()	0
-#endif
-
-#if defined(CONFIG_CPU_S5P6450)
-# define soc_is_s5p6450()	is_samsung_s5p6450()
-#else
-# define soc_is_s5p6450()	0
-#endif
-
 #if defined(CONFIG_CPU_S5PC100)
 # define soc_is_s5pc100()	is_samsung_s5pc100()
 #else
@@ -177,7 +159,6 @@
 extern struct bus_type s3c2442_subsys;
 extern struct bus_type s3c2443_subsys;
 extern struct bus_type s3c6410_subsys;
-extern struct bus_type s5p64x0_subsys;
 extern struct bus_type s5pv210_subsys;
 
 extern void (*s5pc1xx_idle)(void);
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index eece188..ca66f51 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -94,15 +94,6 @@
 extern struct platform_device s5p_device_onenand;
 extern struct platform_device s5p_device_sdo;
 
-extern struct platform_device s5p6440_device_iis;
-extern struct platform_device s5p6440_device_pcm;
-
-extern struct platform_device s5p6450_device_iis0;
-extern struct platform_device s5p6450_device_iis1;
-extern struct platform_device s5p6450_device_iis2;
-extern struct platform_device s5p6450_device_pcm0;
-
-
 extern struct platform_device s5pc100_device_ac97;
 extern struct platform_device s5pc100_device_iis0;
 extern struct platform_device s5pc100_device_iis1;
diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h
index 9ae5072..a400464 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -61,11 +61,4 @@
  */
 extern void exynos4_fimd0_gpio_setup_24bpp(void);
 
-/**
- * s5p64x0_fb_gpio_setup_24bpp() - S5P6440/S5P6450 setup function for 24bpp LCD
- *
- * Initialise the GPIO for an 24bpp LCD display on the RGB interface.
- */
-extern void s5p64x0_fb_gpio_setup_24bpp(void);
-
 #endif /* __PLAT_S3C_FB_H */
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index bf65021..7b2332f 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -68,10 +68,6 @@
 extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
 extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
 extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
-extern void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
-extern void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
-extern void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
-extern void s5p6450_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
 
 /* S3C2416 SDHCI setup */
 
@@ -151,45 +147,6 @@
 
 #endif /* CONFIG_S3C64XX_SETUP_SDHCI */
 
-/* S5P64X0 SDHCI setup */
-
-#ifdef CONFIG_S5P64X0_SETUP_SDHCI_GPIO
-static inline void s5p64x0_default_sdhci0(void)
-{
-#ifdef CONFIG_S3C_DEV_HSMMC
-	s3c_hsmmc0_def_platdata.cfg_gpio = s5p64x0_setup_sdhci0_cfg_gpio;
-#endif
-}
-
-static inline void s5p64x0_default_sdhci1(void)
-{
-#ifdef CONFIG_S3C_DEV_HSMMC1
-	s3c_hsmmc1_def_platdata.cfg_gpio = s5p64x0_setup_sdhci1_cfg_gpio;
-#endif
-}
-
-static inline void s5p6440_default_sdhci2(void)
-{
-#ifdef CONFIG_S3C_DEV_HSMMC2
-	s3c_hsmmc2_def_platdata.cfg_gpio = s5p6440_setup_sdhci2_cfg_gpio;
-#endif
-}
-
-static inline void s5p6450_default_sdhci2(void)
-{
-#ifdef CONFIG_S3C_DEV_HSMMC2
-	s3c_hsmmc2_def_platdata.cfg_gpio = s5p6450_setup_sdhci2_cfg_gpio;
-#endif
-}
-
-#else
-static inline void s5p64x0_default_sdhci0(void) { }
-static inline void s5p64x0_default_sdhci1(void) { }
-static inline void s5p6440_default_sdhci2(void) { }
-static inline void s5p6450_default_sdhci2(void) { }
-
-#endif /* CONFIG_S5P64X0_SETUP_SDHCI_GPIO */
-
 /* S5PC100 SDHCI setup */
 
 #ifdef CONFIG_S5PC100_SETUP_SDHCI