* Qualcomm Technologies Inc Q6 Integrated connectivity Platform Driver

This platform driver adds support for the Integrated WLAN that runs
on Q6 based platforms. WLAN FW on these architecture runs on Q6. This
platform driver communicates with WLAN FW over QMI, WLAN on/off messages
to FW are communicated thru this interface. This driver also listens to
WLAN PD restart notifications.

Required properties:
  - compatible: "qcom,icnss"
  - reg: Memory regions defined as starting address and size
  - reg-names: Names of the memory regions defined in reg entry
  - interrupts: Copy engine interrupt table
  - qcom,wlan-msa-memory: MSA memory size
  - clocks: List of clock phandles
  - clock-names: List of clock names corresponding to the "clocks" property
  - iommus: SMMUs and corresponding Stream IDs needed by WLAN
  - qcom,wlan-smmu-iova-address: I/O virtual address range as <start length>
    format to be used for allocations associated between WLAN and SMMU

Optional properties:
  - <supply-name>-supply: phandle to the regulator device tree node
			   optional "supply-name" is "vdd-0.8-cx-mx".
  - qcom,<supply>-config: Specifies voltage levels for supply. Should be
			   specified in pairs (min, max), units uV.  There can
			   be optional load in uA and Regulator settle delay in
			   uS.
  - qcom,icnss-vadc: VADC handle for vph_pwr read APIs.
  - qcom,icnss-adc_tm: VADC handle for vph_pwr notification APIs.
  - qcom,smmu-s1-bypass: Boolean context flag to set SMMU to S1 bypass
  - qcom,wlan-msa-fixed-region: phandle, specifier pairs to children of /reserved-memory
  - qcom,gpio-force-fatal-error: SMP2P bit triggered by WLAN FW to force error fatal.

Example:

    qcom,icnss@0a000000 {
        compatible = "qcom,icnss";
        reg = <0x0a000000 0x1000000>;
        reg-names = "membase";
        clocks = <&clock_gcc clk_aggre2_noc_clk>;
        clock-names = "smmu_aggre2_noc_clk";
        iommus = <&anoc2_smmu 0x1900>,
                 <&anoc2_smmu 0x1901>;
        qcom,wlan-smmu-iova-address = <0 0x10000000>;
        interrupts =
		   <0 130 0 /* CE0 */ >,
		   <0 131 0 /* CE1 */ >,
		   <0 132 0 /* CE2 */ >,
		   <0 133 0 /* CE3 */ >,
		   <0 134 0 /* CE4 */ >,
		   <0 135 0 /* CE5 */ >,
		   <0 136 0 /* CE6 */ >,
		   <0 137 0 /* CE7 */ >,
		   <0 138 0 /* CE8 */ >,
		   <0 139 0 /* CE9 */ >,
		   <0 140 0 /* CE10 */ >,
		   <0 141 0 /* CE11 */ >;
        qcom,wlan-msa-memory = <0x200000>;
	qcom,wlan-msa-fixed-region = <&wlan_msa_mem>;
	qcom,smmu-s1-bypass;
	vdd-0.8-cx-mx-supply = <&pm8998_l5>;
	qcom,vdd-0.8-cx-mx-config = <800000 800000 2400 1000>;
	qcom,gpio-forced-fatal-error = <&smp2pgpio_wlan_1_in 0 0>;
    };