[MIPS] Sibyte: pin timer interrupt to their cores.
Or strange things will happen.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/arch/mips/kernel/cevt-sb1250.c b/arch/mips/kernel/cevt-sb1250.c
index e2029d0..194e0f7 100644
--- a/arch/mips/kernel/cevt-sb1250.c
+++ b/arch/mips/kernel/cevt-sb1250.c
@@ -142,7 +142,10 @@
action->handler = sibyte_counter_handler;
action->flags = IRQF_DISABLED | IRQF_PERCPU;
+ action->mask = cpumask_of_cpu(cpu);
action->name = name;
action->dev_id = cd;
+
+ irq_set_affinity(irq, cpumask_of_cpu(cpu));
setup_irq(irq, action);
}