tree 5c2d9a2d455017bd91c63d7b40a1dca2aeb12244
parent 88e3c76a8ac1f0a8e334742df0a3f5b4d27e6c44
author Tomi Valkeinen <tomi.valkeinen@ti.com> 1410785401 +0300
committer Tomi Valkeinen <tomi.valkeinen@ti.com> 1413965478 +0300

OMAPDSS: HDMI: fix regsd write

HDMI PLL's REGSD field is only set by the driver if the PLL's output
clock is over 1GHz. This is clearly an error, as REGSD should be set
always.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>