tree 904619166f3b996addd2f7e8072473572ff204c9
parent 8b3fabd32c80ca0ee8d430dcdc546a5f5cfc7395
author Daniel Mack <daniel@zonque.org> 1553118116 +0100
committer Greg Kroah-Hartman <gregkh@linuxfoundation.org> 1557503528 +0200

ASoC: cs4270: Set auto-increment bit for register writes

[ Upstream commit f0f2338a9cfaf71db895fa989ea7234e8a9b471d ]

The CS4270 does not by default increment the register address on
consecutive writes. During normal operation it doesn't matter as all
register accesses are done individually. At resume time after suspend,
however, the regcache code gathers the biggest possible block of
registers to sync and sends them one on one go.

To fix this, set the INCR bit in all cases.

Signed-off-by: Daniel Mack <daniel@zonque.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>