| commit | 0a9bcf4e09c098d14b3a07a7782c4cc24cde21dd | [log] [tgz] |
|---|---|---|
| author | Stephen Boyd <sboyd@codeaurora.org> | Fri Jan 08 15:57:09 2016 -0800 |
| committer | Andy Gross <andy.gross@linaro.org> | Wed Feb 24 00:14:02 2016 -0600 |
| tree | 4a6f49cfbfbf970a565a75d41853b5b19b9235ab | |
| parent | 886c73babe5ed681467dfd3b44bee06005229b98 [diff] |
arm64: dts: Add L2 cache node to msm8916 The msm8916 SoC has an L2 cache for all 4 CPUs. Add it to the dtsi file so that the cache hierarchy can be probed. Cc: <devicetree@vger.kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Reviewed-by: Andy Gross <andy.gross@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>