commit 0d2c6de2255cb299fdd77d4543738adee45f4f3f
author Mike Frysinger <vapier@gentoo.org> Thu Oct 15 04:13:29 2009 +0000
committer Mike Frysinger <vapier@gentoo.org> Mon Oct 18 02:49:35 2010 -0400
tree 0d71e83b2bb0dc2fcb73416c9bbc2d4a8c0b47e9
parent 90008a641dd832cc2e2c4d21b7da94de91e9d0a4

Blackfin: SPI: expand SPI bitmasks

Expand the BIT_CTL defines to use the naming convention of the hardware,
and expand the masks to cover all documented bits.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>

arch/blackfin/include/asm/bfin5xx_spi.h

diff --git a/arch/blackfin/include/asm/bfin5xx_spi.h b/arch/blackfin/include/asm/bfin5xx_spi.h
index ee3ecb9..126d25e 100644
--- a/arch/blackfin/include/asm/bfin5xx_spi.h
+++ b/arch/blackfin/include/asm/bfin5xx_spi.h
@@ -26,11 +26,14 @@
 #define BIT_CTL_ENABLE      0x4000
 #define BIT_CTL_OPENDRAIN   0x2000
 #define BIT_CTL_MASTER      0x1000
-#define BIT_CTL_POLAR       0x0800
-#define BIT_CTL_PHASE       0x0400
-#define BIT_CTL_BITORDER    0x0200
+#define BIT_CTL_CPOL        0x0800
+#define BIT_CTL_CPHA        0x0400
+#define BIT_CTL_LSBF        0x0200
 #define BIT_CTL_WORDSIZE    0x0100
-#define BIT_CTL_MISOENABLE  0x0020
+#define BIT_CTL_EMISO       0x0020
+#define BIT_CTL_PSSE        0x0010
+#define BIT_CTL_GM          0x0008
+#define BIT_CTL_SZ          0x0004
 #define BIT_CTL_RXMOD       0x0000
 #define BIT_CTL_TXMOD       0x0001
 #define BIT_CTL_TIMOD_DMA_TX 0x0003